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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2017-10-06 06:12:41 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2017-10-06 06:12:41 +0200 |
| commit | ebde8820a04dd73a09f50ba84b8cf8ec3773d6ba (patch) | |
| tree | 031d15dcd26f5b737adddc5042a3ddabbb6051f7 /dts/src/arm/imx7s.dtsi | |
| parent | 15af9fc8cc9e18409893d2375271d64cac76924a (diff) | |
| download | barebox-ebde8820a04dd73a09f50ba84b8cf8ec3773d6ba.tar.gz barebox-ebde8820a04dd73a09f50ba84b8cf8ec3773d6ba.tar.xz | |
dts: update to v4.14-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm/imx7s.dtsi')
| -rw-r--r-- | dts/src/arm/imx7s.dtsi | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/dts/src/arm/imx7s.dtsi b/dts/src/arm/imx7s.dtsi index 4cf6c458b5..82ad26e766 100644 --- a/dts/src/arm/imx7s.dtsi +++ b/dts/src/arm/imx7s.dtsi @@ -540,6 +540,7 @@ compatible = "syscon-poweroff"; regmap = <&snvs>; offset = <0x38>; + value = <0x60>; mask = <0x60>; }; @@ -1021,5 +1022,36 @@ status = "disabled"; }; }; + + dma_apbh: dma-apbh@33000000 { + compatible = "fsl,imx7d-dma-apbh", "fsl,imx28-dma-apbh"; + reg = <0x33000000 0x2000>; + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3"; + #dma-cells = <1>; + dma-channels = <4>; + clocks = <&clks IMX7D_NAND_USDHC_BUS_RAWNAND_CLK>; + }; + + gpmi: gpmi-nand@33002000{ + compatible = "fsl,imx7d-gpmi-nand"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x33002000 0x2000>, <0x33004000 0x4000>; + reg-names = "gpmi-nand", "bch"; + interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "bch"; + clocks = <&clks IMX7D_NAND_RAWNAND_CLK>, + <&clks IMX7D_NAND_USDHC_BUS_RAWNAND_CLK>; + clock-names = "gpmi_io", "gpmi_bch_apb"; + dmas = <&dma_apbh 0>; + dma-names = "rx-tx"; + status = "disabled"; + assigned-clocks = <&clks IMX7D_NAND_ROOT_SRC>; + assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_500M_CLK>; + }; }; }; |