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authorSascha Hauer <s.hauer@pengutronix.de>2018-06-21 13:44:30 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2018-06-22 08:16:13 +0200
commite4067b75fb6ca83a58b2c342a0b3ee12e1223c4e (patch)
treebe013bf46292f4696ac776bc91c1cf35b7adab24 /dts/src/arm/meson8.dtsi
parentfe040e0977fab29216f5039e8f9b04e6dbec859a (diff)
downloadbarebox-e4067b75fb6ca83a58b2c342a0b3ee12e1223c4e.tar.gz
dts: update to v4.18-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm/meson8.dtsi')
-rw-r--r--dts/src/arm/meson8.dtsi33
1 files changed, 29 insertions, 4 deletions
diff --git a/dts/src/arm/meson8.dtsi b/dts/src/arm/meson8.dtsi
index dcc9292..d77dcf8 100644
--- a/dts/src/arm/meson8.dtsi
+++ b/dts/src/arm/meson8.dtsi
@@ -57,7 +57,7 @@
#address-cells = <1>;
#size-cells = <0>;
- cpu@200 {
+ cpu0: cpu@200 {
device_type = "cpu";
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
@@ -66,7 +66,7 @@
resets = <&clkc CLKC_RESET_CPU0_SOFT_RESET>;
};
- cpu@201 {
+ cpu1: cpu@201 {
device_type = "cpu";
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
@@ -75,7 +75,7 @@
resets = <&clkc CLKC_RESET_CPU1_SOFT_RESET>;
};
- cpu@202 {
+ cpu2: cpu@202 {
device_type = "cpu";
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
@@ -84,7 +84,7 @@
resets = <&clkc CLKC_RESET_CPU2_SOFT_RESET>;
};
- cpu@203 {
+ cpu3: cpu@203 {
device_type = "cpu";
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
@@ -94,6 +94,15 @@
};
};
+ pmu {
+ compatible = "arm,cortex-a9-pmu";
+ interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+ };
+
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
@@ -272,6 +281,22 @@
function = "pwm_e";
};
};
+
+ uart_a1_pins: uart-a1 {
+ mux {
+ groups = "uart_tx_a1",
+ "uart_rx_a1";
+ function = "uart_a";
+ };
+ };
+
+ uart_a1_cts_rts_pins: uart-a1-cts-rts {
+ mux {
+ groups = "uart_cts_a1",
+ "uart_rts_a1";
+ function = "uart_a";
+ };
+ };
};
};