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author | Sascha Hauer <s.hauer@pengutronix.de> | 2014-04-25 11:22:32 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2014-04-28 09:08:46 +0200 |
commit | 00ce25c6dcdae5582ae4be37147ab33678adc995 (patch) | |
tree | 41c93102ae304a61738c31353e3cb5336ef0b297 /dts/src/arm/omap36xx-clocks.dtsi | |
parent | 0af79fbb6779921d3f1962773adb7fb57d3c89d4 (diff) | |
download | barebox-00ce25c6dcdae5582ae4be37147ab33678adc995.tar.gz barebox-00ce25c6dcdae5582ae4be37147ab33678adc995.tar.xz |
Add devicetree source files as of Linux-3.15-rc2
This adds the Linux dts files to barebox. The dts files are
generated from Ian Campbells device-tree-rebasing.git:
git://xenbits.xen.org/people/ianc/device-tree-rebasing.git
The dts are found in dts/ in the barebox repository and
will be updated from upstream regularly, probably for each upstream
-rc.
To keep the synchronization with upstream easy no changes to
the original files are allowed under dts/. Instead changes to
upstream dts files will be done using overlays in arch/$ARCH/dts/.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm/omap36xx-clocks.dtsi')
-rw-r--r-- | dts/src/arm/omap36xx-clocks.dtsi | 110 |
1 files changed, 110 insertions, 0 deletions
diff --git a/dts/src/arm/omap36xx-clocks.dtsi b/dts/src/arm/omap36xx-clocks.dtsi new file mode 100644 index 0000000000..6b5280d04a --- /dev/null +++ b/dts/src/arm/omap36xx-clocks.dtsi @@ -0,0 +1,110 @@ +/* + * Device Tree Source for OMAP36xx clock data + * + * Copyright (C) 2013 Texas Instruments, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +&cm_clocks { + dpll4_ck: dpll4_ck { + #clock-cells = <0>; + compatible = "ti,omap3-dpll-per-j-type-clock"; + clocks = <&sys_ck>, <&sys_ck>; + reg = <0x0d00>, <0x0d20>, <0x0d44>, <0x0d30>; + }; + + dpll4_m5x2_ck: dpll4_m5x2_ck { + #clock-cells = <0>; + compatible = "ti,hsdiv-gate-clock"; + clocks = <&dpll4_m5x2_mul_ck>; + ti,bit-shift = <0x1e>; + reg = <0x0d00>; + ti,set-rate-parent; + ti,set-bit-to-disable; + }; + + dpll4_m2x2_ck: dpll4_m2x2_ck { + #clock-cells = <0>; + compatible = "ti,hsdiv-gate-clock"; + clocks = <&dpll4_m2x2_mul_ck>; + ti,bit-shift = <0x1b>; + reg = <0x0d00>; + ti,set-bit-to-disable; + }; + + dpll3_m3x2_ck: dpll3_m3x2_ck { + #clock-cells = <0>; + compatible = "ti,hsdiv-gate-clock"; + clocks = <&dpll3_m3x2_mul_ck>; + ti,bit-shift = <0xc>; + reg = <0x0d00>; + ti,set-bit-to-disable; + }; + + dpll4_m3x2_ck: dpll4_m3x2_ck { + #clock-cells = <0>; + compatible = "ti,hsdiv-gate-clock"; + clocks = <&dpll4_m3x2_mul_ck>; + ti,bit-shift = <0x1c>; + reg = <0x0d00>; + ti,set-bit-to-disable; + }; + + dpll4_m6x2_ck: dpll4_m6x2_ck { + #clock-cells = <0>; + compatible = "ti,hsdiv-gate-clock"; + clocks = <&dpll4_m6x2_mul_ck>; + ti,bit-shift = <0x1f>; + reg = <0x0d00>; + ti,set-bit-to-disable; + }; + + uart4_fck: uart4_fck { + #clock-cells = <0>; + compatible = "ti,wait-gate-clock"; + clocks = <&per_48m_fck>; + reg = <0x1000>; + ti,bit-shift = <18>; + }; +}; + +&dpll4_m2x2_mul_ck { + clock-mult = <1>; +}; + +&dpll4_m3x2_mul_ck { + clock-mult = <1>; +}; + +&dpll4_m4x2_mul_ck { + ti,clock-mult = <1>; +}; + +&dpll4_m5x2_mul_ck { + clock-mult = <1>; +}; + +&dpll4_m6x2_mul_ck { + clock-mult = <1>; +}; + +&cm_clockdomains { + dpll4_clkdm: dpll4_clkdm { + compatible = "ti,clockdomain"; + clocks = <&dpll4_ck>; + }; + + per_clkdm: per_clkdm { + compatible = "ti,clockdomain"; + clocks = <&uart3_fck>, <&gpio6_dbck>, <&gpio5_dbck>, + <&gpio4_dbck>, <&gpio3_dbck>, <&gpio2_dbck>, + <&wdt3_fck>, <&gpio6_ick>, <&gpio5_ick>, <&gpio4_ick>, + <&gpio3_ick>, <&gpio2_ick>, <&wdt3_ick>, <&uart3_ick>, + <&uart4_ick>, <&gpt9_ick>, <&gpt8_ick>, <&gpt7_ick>, + <&gpt6_ick>, <&gpt5_ick>, <&gpt4_ick>, <&gpt3_ick>, + <&gpt2_ick>, <&mcbsp2_ick>, <&mcbsp3_ick>, + <&mcbsp4_ick>, <&uart4_fck>; + }; +}; |