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-rw-r--r--dts/Bindings/ABI.txt39
-rw-r--r--dts/Bindings/arc/interrupts.txt24
-rw-r--r--dts/Bindings/arc/pmu.txt24
-rw-r--r--dts/Bindings/arm/altera/socfpga-clk-manager.txt11
-rw-r--r--dts/Bindings/arm/altera/socfpga-reset.txt11
-rw-r--r--dts/Bindings/arm/altera/socfpga-system.txt13
-rw-r--r--dts/Bindings/arm/arch_timer.txt81
-rw-r--r--dts/Bindings/arm/arm-boards88
-rw-r--r--dts/Bindings/arm/armada-370-xp-mpic.txt38
-rw-r--r--dts/Bindings/arm/armada-370-xp-pmsu.txt20
-rw-r--r--dts/Bindings/arm/armada-370-xp.txt24
-rw-r--r--dts/Bindings/arm/armada-375.txt9
-rw-r--r--dts/Bindings/arm/armada-38x.txt10
-rw-r--r--dts/Bindings/arm/armadeus.txt6
-rw-r--r--dts/Bindings/arm/atmel-aic.txt42
-rw-r--r--dts/Bindings/arm/atmel-at91.txt107
-rw-r--r--dts/Bindings/arm/atmel-pmc.txt11
-rw-r--r--dts/Bindings/arm/bcm/bcm11351.txt10
-rw-r--r--dts/Bindings/arm/bcm/bcm21664.txt15
-rw-r--r--dts/Bindings/arm/bcm/kona-resetmgr.txt14
-rw-r--r--dts/Bindings/arm/bcm/kona-timer.txt25
-rw-r--r--dts/Bindings/arm/bcm/kona-wdt.txt15
-rw-r--r--dts/Bindings/arm/bcm2835.txt8
-rw-r--r--dts/Bindings/arm/bcm4708.txt8
-rw-r--r--dts/Bindings/arm/calxeda.txt15
-rw-r--r--dts/Bindings/arm/calxeda/combophy.txt17
-rw-r--r--dts/Bindings/arm/calxeda/l2ecc.txt15
-rw-r--r--dts/Bindings/arm/calxeda/mem-ctrlr.txt16
-rw-r--r--dts/Bindings/arm/cci.txt224
-rw-r--r--dts/Bindings/arm/coherency-fabric.txt21
-rw-r--r--dts/Bindings/arm/cpus.txt407
-rw-r--r--dts/Bindings/arm/davinci.txt17
-rw-r--r--dts/Bindings/arm/davinci/cp-intc.txt27
-rw-r--r--dts/Bindings/arm/exynos/power_domain.txt28
-rw-r--r--dts/Bindings/arm/firmware/tlm,trusted-foundations.txt20
-rw-r--r--dts/Bindings/arm/fsl.txt76
-rw-r--r--dts/Bindings/arm/gic.txt97
-rw-r--r--dts/Bindings/arm/global_timer.txt24
-rw-r--r--dts/Bindings/arm/hisilicon/hisilicon.txt46
-rw-r--r--dts/Bindings/arm/insignal-boards.txt8
-rw-r--r--dts/Bindings/arm/keystone/keystone.txt20
-rw-r--r--dts/Bindings/arm/kirkwood.txt27
-rw-r--r--dts/Bindings/arm/l2cc.txt59
-rw-r--r--dts/Bindings/arm/lpc32xx-mic.txt38
-rw-r--r--dts/Bindings/arm/lpc32xx.txt8
-rw-r--r--dts/Bindings/arm/marvell,berlin.txt24
-rw-r--r--dts/Bindings/arm/marvell,dove.txt22
-rw-r--r--dts/Bindings/arm/marvell,kirkwood.txt97
-rw-r--r--dts/Bindings/arm/moxart.txt12
-rw-r--r--dts/Bindings/arm/mrvl/feroceon.txt16
-rw-r--r--dts/Bindings/arm/mrvl/intc.txt60
-rw-r--r--dts/Bindings/arm/mrvl/mrvl.txt14
-rw-r--r--dts/Bindings/arm/mrvl/tauros2.txt17
-rw-r--r--dts/Bindings/arm/mrvl/timer.txt13
-rw-r--r--dts/Bindings/arm/msm/qcom,kpss-acc.txt30
-rw-r--r--dts/Bindings/arm/msm/qcom,saw2.txt35
-rw-r--r--dts/Bindings/arm/msm/ssbi.txt18
-rw-r--r--dts/Bindings/arm/msm/timer.txt37
-rw-r--r--dts/Bindings/arm/mvebu-system-controller.txt18
-rw-r--r--dts/Bindings/arm/nspire.txt14
-rw-r--r--dts/Bindings/arm/olimex.txt6
-rw-r--r--dts/Bindings/arm/omap/counter.txt15
-rw-r--r--dts/Bindings/arm/omap/crossbar.txt27
-rw-r--r--dts/Bindings/arm/omap/dmm.txt22
-rw-r--r--dts/Bindings/arm/omap/dsp.txt14
-rw-r--r--dts/Bindings/arm/omap/intc.txt27
-rw-r--r--dts/Bindings/arm/omap/iva.txt19
-rw-r--r--dts/Bindings/arm/omap/l3-noc.txt20
-rw-r--r--dts/Bindings/arm/omap/mpu.txt35
-rw-r--r--dts/Bindings/arm/omap/omap.txt124
-rw-r--r--dts/Bindings/arm/omap/timer.txt44
-rw-r--r--dts/Bindings/arm/picoxcell.txt24
-rw-r--r--dts/Bindings/arm/pmu.txt34
-rw-r--r--dts/Bindings/arm/primecell.txt46
-rw-r--r--dts/Bindings/arm/psci.txt55
-rw-r--r--dts/Bindings/arm/rockchip/pmu.txt16
-rw-r--r--dts/Bindings/arm/rockchip/smp-sram.txt30
-rw-r--r--dts/Bindings/arm/rtsm-dcscb.txt19
-rw-r--r--dts/Bindings/arm/samsung-boards.txt18
-rw-r--r--dts/Bindings/arm/samsung/exynos-adc.txt60
-rw-r--r--dts/Bindings/arm/samsung/interrupt-combiner.txt52
-rw-r--r--dts/Bindings/arm/samsung/pmu.txt15
-rw-r--r--dts/Bindings/arm/samsung/sysreg.txt12
-rw-r--r--dts/Bindings/arm/sirf.txt9
-rw-r--r--dts/Bindings/arm/spear-timer.txt18
-rw-r--r--dts/Bindings/arm/spear.txt26
-rw-r--r--dts/Bindings/arm/spear/shirq.txt48
-rw-r--r--dts/Bindings/arm/ste-nomadik.txt32
-rw-r--r--dts/Bindings/arm/ste-u300.txt46
-rw-r--r--dts/Bindings/arm/tegra.txt39
-rw-r--r--dts/Bindings/arm/tegra/nvidia,tegra20-ahb.txt11
-rw-r--r--dts/Bindings/arm/tegra/nvidia,tegra20-emc.txt100
-rw-r--r--dts/Bindings/arm/tegra/nvidia,tegra20-mc.txt16
-rw-r--r--dts/Bindings/arm/tegra/nvidia,tegra20-pmc.txt85
-rw-r--r--dts/Bindings/arm/tegra/nvidia,tegra30-mc.txt18
-rw-r--r--dts/Bindings/arm/topology.txt475
-rw-r--r--dts/Bindings/arm/twd.txt48
-rw-r--r--dts/Bindings/arm/versatile-fpga-irq.txt36
-rw-r--r--dts/Bindings/arm/vexpress-scc.txt33
-rw-r--r--dts/Bindings/arm/vexpress-sysreg.txt50
-rw-r--r--dts/Bindings/arm/vexpress.txt224
-rw-r--r--dts/Bindings/arm/vic.txt41
-rw-r--r--dts/Bindings/arm/vt8500.txt22
-rw-r--r--dts/Bindings/arm/vt8500/via,vt8500-intc.txt16
-rw-r--r--dts/Bindings/arm/vt8500/via,vt8500-pmc.txt13
-rw-r--r--dts/Bindings/arm/vt8500/via,vt8500-timer.txt15
-rw-r--r--dts/Bindings/arm/xen.txt25
-rw-r--r--dts/Bindings/arm/xilinx.txt7
-rw-r--r--dts/Bindings/ata/ahci-platform.txt36
-rw-r--r--dts/Bindings/ata/apm-xgene.txt76
-rw-r--r--dts/Bindings/ata/atmel-at91_cf.txt19
-rw-r--r--dts/Bindings/ata/cavium-compact-flash.txt30
-rw-r--r--dts/Bindings/ata/exynos-sata.txt30
-rw-r--r--dts/Bindings/ata/fsl-sata.txt29
-rw-r--r--dts/Bindings/ata/imx-pata.txt17
-rw-r--r--dts/Bindings/ata/marvell.txt16
-rw-r--r--dts/Bindings/ata/pata-arasan.txt39
-rw-r--r--dts/Bindings/ata/sata_highbank.txt44
-rw-r--r--dts/Bindings/ata/sata_rcar.txt18
-rw-r--r--dts/Bindings/bus/imx-weim.txt82
-rw-r--r--dts/Bindings/bus/mvebu-mbus.txt276
-rw-r--r--dts/Bindings/bus/omap-ocp2scp.txt28
-rw-r--r--dts/Bindings/bus/ti-gpmc.txt130
-rw-r--r--dts/Bindings/c6x/clocks.txt40
-rw-r--r--dts/Bindings/c6x/dscr.txt127
-rw-r--r--dts/Bindings/c6x/emifa.txt62
-rw-r--r--dts/Bindings/c6x/interrupt.txt104
-rw-r--r--dts/Bindings/c6x/soc.txt28
-rw-r--r--dts/Bindings/c6x/timer64.txt26
-rw-r--r--dts/Bindings/clock/altr_socfpga.txt30
-rw-r--r--dts/Bindings/clock/arm-integrator.txt34
-rw-r--r--dts/Bindings/clock/at91-clock.txt339
-rw-r--r--dts/Bindings/clock/axi-clkgen.txt22
-rw-r--r--dts/Bindings/clock/bcm-kona-clock.txt93
-rw-r--r--dts/Bindings/clock/calxeda.txt17
-rw-r--r--dts/Bindings/clock/clk-exynos-audss.txt95
-rw-r--r--dts/Bindings/clock/clock-bindings.txt134
-rw-r--r--dts/Bindings/clock/corenet-clock.txt134
-rw-r--r--dts/Bindings/clock/efm32-clock.txt11
-rw-r--r--dts/Bindings/clock/emev2-clock.txt98
-rw-r--r--dts/Bindings/clock/exynos4-clock.txt43
-rw-r--r--dts/Bindings/clock/exynos5250-clock.txt41
-rw-r--r--dts/Bindings/clock/exynos5420-clock.txt41
-rw-r--r--dts/Bindings/clock/exynos5440-clock.txt28
-rw-r--r--dts/Bindings/clock/fixed-clock.txt24
-rw-r--r--dts/Bindings/clock/fixed-factor-clock.txt24
-rw-r--r--dts/Bindings/clock/hi3620-clock.txt20
-rw-r--r--dts/Bindings/clock/imx23-clock.txt71
-rw-r--r--dts/Bindings/clock/imx25-clock.txt158
-rw-r--r--dts/Bindings/clock/imx27-clock.txt118
-rw-r--r--dts/Bindings/clock/imx28-clock.txt94
-rw-r--r--dts/Bindings/clock/imx31-clock.txt91
-rw-r--r--dts/Bindings/clock/imx35-clock.txt113
-rw-r--r--dts/Bindings/clock/imx5-clock.txt29
-rw-r--r--dts/Bindings/clock/imx6q-clock.txt240
-rw-r--r--dts/Bindings/clock/imx6sl-clock.txt10
-rw-r--r--dts/Bindings/clock/keystone-gate.txt29
-rw-r--r--dts/Bindings/clock/keystone-pll.txt84
-rw-r--r--dts/Bindings/clock/maxim,max77686.txt38
-rw-r--r--dts/Bindings/clock/moxa,moxart-clock.txt48
-rw-r--r--dts/Bindings/clock/mvebu-core-clock.txt61
-rw-r--r--dts/Bindings/clock/mvebu-corediv-clock.txt22
-rw-r--r--dts/Bindings/clock/mvebu-cpu-clock.txt21
-rw-r--r--dts/Bindings/clock/mvebu-gated-clock.txt178
-rw-r--r--dts/Bindings/clock/nspire-clock.txt24
-rw-r--r--dts/Bindings/clock/nvidia,tegra114-car.txt63
-rw-r--r--dts/Bindings/clock/nvidia,tegra124-car.txt63
-rw-r--r--dts/Bindings/clock/nvidia,tegra20-car.txt63
-rw-r--r--dts/Bindings/clock/nvidia,tegra30-car.txt63
-rw-r--r--dts/Bindings/clock/prima2-clock.txt73
-rw-r--r--dts/Bindings/clock/qcom,gcc.txt21
-rw-r--r--dts/Bindings/clock/qcom,mmcc.txt21
-rw-r--r--dts/Bindings/clock/renesas,cpg-div6-clocks.txt28
-rw-r--r--dts/Bindings/clock/renesas,cpg-mstp-clocks.txt51
-rw-r--r--dts/Bindings/clock/renesas,rcar-gen2-cpg-clocks.txt32
-rw-r--r--dts/Bindings/clock/renesas,rz-cpg-clocks.txt29
-rw-r--r--dts/Bindings/clock/rockchip.txt74
-rw-r--r--dts/Bindings/clock/samsung,s3c64xx-clock.txt77
-rw-r--r--dts/Bindings/clock/silabs,si5351.txt119
-rw-r--r--dts/Bindings/clock/silabs,si570.txt39
-rw-r--r--dts/Bindings/clock/st,nomadik.txt104
-rw-r--r--dts/Bindings/clock/st/st,clkgen-divmux.txt49
-rw-r--r--dts/Bindings/clock/st/st,clkgen-mux.txt36
-rw-r--r--dts/Bindings/clock/st/st,clkgen-pll.txt48
-rw-r--r--dts/Bindings/clock/st/st,clkgen-prediv.txt36
-rw-r--r--dts/Bindings/clock/st/st,clkgen-vcc.txt53
-rw-r--r--dts/Bindings/clock/st/st,clkgen.txt83
-rw-r--r--dts/Bindings/clock/st/st,quadfs.txt45
-rw-r--r--dts/Bindings/clock/ste-u300-syscon-clock.txt80
-rw-r--r--dts/Bindings/clock/sunxi.txt134
-rw-r--r--dts/Bindings/clock/ti/apll.txt31
-rw-r--r--dts/Bindings/clock/ti/autoidle.txt39
-rw-r--r--dts/Bindings/clock/ti/clockdomain.txt24
-rw-r--r--dts/Bindings/clock/ti/composite.txt54
-rw-r--r--dts/Bindings/clock/ti/divider.txt114
-rw-r--r--dts/Bindings/clock/ti/dpll.txt75
-rw-r--r--dts/Bindings/clock/ti/fixed-factor-clock.txt43
-rw-r--r--dts/Bindings/clock/ti/gate.txt85
-rw-r--r--dts/Bindings/clock/ti/interface.txt54
-rw-r--r--dts/Bindings/clock/ti/mux.txt76
-rw-r--r--dts/Bindings/clock/vf610-clock.txt26
-rw-r--r--dts/Bindings/clock/vt8500.txt74
-rw-r--r--dts/Bindings/clock/xgene.txt111
-rw-r--r--dts/Bindings/clock/zynq-7000.txt110
-rw-r--r--dts/Bindings/cpufreq/arm_big_little_dt.txt65
-rw-r--r--dts/Bindings/cpufreq/cpufreq-cpu0.txt62
-rw-r--r--dts/Bindings/cpufreq/cpufreq-exynos5440.txt28
-rw-r--r--dts/Bindings/cpufreq/cpufreq-spear.txt42
-rw-r--r--dts/Bindings/crypto/atmel-crypto.txt68
-rw-r--r--dts/Bindings/crypto/fsl-dcp.txt17
-rw-r--r--dts/Bindings/crypto/fsl-imx-sahara.txt15
-rw-r--r--dts/Bindings/crypto/fsl-sec2.txt68
-rw-r--r--dts/Bindings/crypto/fsl-sec4.txt455
-rw-r--r--dts/Bindings/crypto/fsl-sec6.txt157
-rw-r--r--dts/Bindings/crypto/mv_cesa.txt20
-rw-r--r--dts/Bindings/crypto/omap-aes.txt31
-rw-r--r--dts/Bindings/crypto/omap-des.txt30
-rw-r--r--dts/Bindings/crypto/omap-sham.txt28
-rw-r--r--dts/Bindings/crypto/picochip-spacc.txt23
-rw-r--r--dts/Bindings/dma/arm-pl330.txt44
-rw-r--r--dts/Bindings/dma/atmel-dma.txt42
-rw-r--r--dts/Bindings/dma/bcm2835-dma.txt57
-rw-r--r--dts/Bindings/dma/dma.txt81
-rw-r--r--dts/Bindings/dma/fsl-edma.txt76
-rw-r--r--dts/Bindings/dma/fsl-imx-dma.txt48
-rw-r--r--dts/Bindings/dma/fsl-imx-sdma.txt83
-rw-r--r--dts/Bindings/dma/fsl-mxs-dma.txt60
-rw-r--r--dts/Bindings/dma/k3dma.txt46
-rw-r--r--dts/Bindings/dma/mmp-dma.txt74
-rw-r--r--dts/Bindings/dma/moxa,moxart-dma.txt45
-rw-r--r--dts/Bindings/dma/mv-xor.txt40
-rw-r--r--dts/Bindings/dma/qcom_bam_dma.txt41
-rw-r--r--dts/Bindings/dma/shdma.txt84
-rw-r--r--dts/Bindings/dma/sirfsoc-dma.txt43
-rw-r--r--dts/Bindings/dma/snps-dma.txt63
-rw-r--r--dts/Bindings/dma/ste-coh901318.txt32
-rw-r--r--dts/Bindings/dma/ste-dma40.txt69
-rw-r--r--dts/Bindings/dma/tegra20-apbdma.txt44
-rw-r--r--dts/Bindings/dma/ti-edma.txt34
-rw-r--r--dts/Bindings/drm/bridge/ptn3460.txt27
-rw-r--r--dts/Bindings/drm/i2c/tda998x.txt27
-rw-r--r--dts/Bindings/drm/tilcdc/panel.txt59
-rw-r--r--dts/Bindings/drm/tilcdc/slave.txt18
-rw-r--r--dts/Bindings/drm/tilcdc/tfp410.txt21
-rw-r--r--dts/Bindings/drm/tilcdc/tilcdc.txt29
-rw-r--r--dts/Bindings/eeprom.txt28
-rw-r--r--dts/Bindings/extcon/extcon-palmas.txt19
-rw-r--r--dts/Bindings/fb/mxsfb.txt49
-rw-r--r--dts/Bindings/fb/sm501fb.txt34
-rw-r--r--dts/Bindings/gpio/8xxx_gpio.txt74
-rw-r--r--dts/Bindings/gpio/abilis,tb10x-gpio.txt36
-rw-r--r--dts/Bindings/gpio/cavium-octeon-gpio.txt49
-rw-r--r--dts/Bindings/gpio/cirrus,clps711x-mctrl-gpio.txt17
-rw-r--r--dts/Bindings/gpio/fsl-imx-gpio.txt32
-rw-r--r--dts/Bindings/gpio/gpio-74x164.txt22
-rw-r--r--dts/Bindings/gpio/gpio-adnp.txt34
-rw-r--r--dts/Bindings/gpio/gpio-bcm-kona.txt52
-rw-r--r--dts/Bindings/gpio/gpio-clps711x.txt28
-rw-r--r--dts/Bindings/gpio/gpio-davinci.txt62
-rw-r--r--dts/Bindings/gpio/gpio-fan.txt25
-rw-r--r--dts/Bindings/gpio/gpio-grgpio.txt26
-rw-r--r--dts/Bindings/gpio/gpio-lp3943.txt37
-rw-r--r--dts/Bindings/gpio/gpio-mcp23s08.txt83
-rw-r--r--dts/Bindings/gpio/gpio-mm-lantiq.txt38
-rw-r--r--dts/Bindings/gpio/gpio-msm.txt26
-rw-r--r--dts/Bindings/gpio/gpio-mvebu.txt53
-rw-r--r--dts/Bindings/gpio/gpio-mxs.txt88
-rw-r--r--dts/Bindings/gpio/gpio-nmk.txt31
-rw-r--r--dts/Bindings/gpio/gpio-omap.txt39
-rw-r--r--dts/Bindings/gpio/gpio-palmas.txt27
-rw-r--r--dts/Bindings/gpio/gpio-pcf857x.txt71
-rw-r--r--dts/Bindings/gpio/gpio-poweroff.txt36
-rw-r--r--dts/Bindings/gpio/gpio-samsung.txt41
-rw-r--r--dts/Bindings/gpio/gpio-stericsson-coh901.txt7
-rw-r--r--dts/Bindings/gpio/gpio-stmpe.txt18
-rw-r--r--dts/Bindings/gpio/gpio-stp-xway.txt42
-rw-r--r--dts/Bindings/gpio/gpio-twl4030.txt29
-rw-r--r--dts/Bindings/gpio/gpio-tz1090-pdc.txt45
-rw-r--r--dts/Bindings/gpio/gpio-tz1090.txt88
-rw-r--r--dts/Bindings/gpio/gpio-xilinx.txt48
-rw-r--r--dts/Bindings/gpio/gpio-zevio.txt16
-rw-r--r--dts/Bindings/gpio/gpio.txt199
-rw-r--r--dts/Bindings/gpio/gpio_atmel.txt25
-rw-r--r--dts/Bindings/gpio/gpio_keys.txt36
-rw-r--r--dts/Bindings/gpio/gpio_lpc32xx.txt43
-rw-r--r--dts/Bindings/gpio/moxa,moxart-gpio.txt19
-rw-r--r--dts/Bindings/gpio/mrvl-gpio.txt56
-rw-r--r--dts/Bindings/gpio/nvidia,tegra20-gpio.txt40
-rw-r--r--dts/Bindings/gpio/pl061-gpio.txt10
-rw-r--r--dts/Bindings/gpio/renesas,gpio-rcar.txt55
-rw-r--r--dts/Bindings/gpio/snps-dwapb-gpio.txt60
-rw-r--r--dts/Bindings/gpio/sodaville.txt48
-rw-r--r--dts/Bindings/gpio/spear_spics.txt50
-rw-r--r--dts/Bindings/gpu/nvidia,tegra20-host1x.txt370
-rw-r--r--dts/Bindings/gpu/samsung-g2d.txt28
-rw-r--r--dts/Bindings/gpu/samsung-rotator.txt27
-rw-r--r--dts/Bindings/graph.txt129
-rw-r--r--dts/Bindings/hid/hid-over-i2c.txt28
-rw-r--r--dts/Bindings/hwmon/ads1015.txt73
-rw-r--r--dts/Bindings/hwmon/g762.txt47
-rw-r--r--dts/Bindings/hwmon/lm90.txt44
-rw-r--r--dts/Bindings/hwmon/ntc_thermistor.txt29
-rw-r--r--dts/Bindings/hwmon/vexpress.txt23
-rw-r--r--dts/Bindings/hwrng/omap_rng.txt22
-rw-r--r--dts/Bindings/hwrng/timeriomem_rng.txt18
-rw-r--r--dts/Bindings/i2c/brcm,bcm2835-i2c.txt20
-rw-r--r--dts/Bindings/i2c/i2c-arb-gpio-challenge.txt80
-rw-r--r--dts/Bindings/i2c/i2c-at91.txt34
-rw-r--r--dts/Bindings/i2c/i2c-bcm-kona.txt35
-rw-r--r--dts/Bindings/i2c/i2c-cadence.txt24
-rw-r--r--dts/Bindings/i2c/i2c-cbus-gpio.txt27
-rw-r--r--dts/Bindings/i2c/i2c-davinci.txt28
-rw-r--r--dts/Bindings/i2c/i2c-designware.txt45
-rw-r--r--dts/Bindings/i2c/i2c-efm32.txt34
-rw-r--r--dts/Bindings/i2c/i2c-exynos5.txt44
-rw-r--r--dts/Bindings/i2c/i2c-gpio.txt32
-rw-r--r--dts/Bindings/i2c/i2c-imx.txt28
-rw-r--r--dts/Bindings/i2c/i2c-mpc.txt64
-rw-r--r--dts/Bindings/i2c/i2c-mux-gpio.txt81
-rw-r--r--dts/Bindings/i2c/i2c-mux-pca954x.txt50
-rw-r--r--dts/Bindings/i2c/i2c-mux-pinctrl.txt93
-rw-r--r--dts/Bindings/i2c/i2c-mux.txt60
-rw-r--r--dts/Bindings/i2c/i2c-mv64xxx.txt44
-rw-r--r--dts/Bindings/i2c/i2c-mxs.txt25
-rw-r--r--dts/Bindings/i2c/i2c-nomadik.txt23
-rw-r--r--dts/Bindings/i2c/i2c-ocores.txt33
-rw-r--r--dts/Bindings/i2c/i2c-octeon.txt34
-rw-r--r--dts/Bindings/i2c/i2c-omap.txt31
-rw-r--r--dts/Bindings/i2c/i2c-pnx.txt36
-rw-r--r--dts/Bindings/i2c/i2c-pxa-pci-ce4100.txt93
-rw-r--r--dts/Bindings/i2c/i2c-pxa.txt33
-rw-r--r--dts/Bindings/i2c/i2c-rcar.txt29
-rw-r--r--dts/Bindings/i2c/i2c-riic.txt29
-rw-r--r--dts/Bindings/i2c/i2c-s3c2410.txt59
-rw-r--r--dts/Bindings/i2c/i2c-sirf.txt19
-rw-r--r--dts/Bindings/i2c/i2c-st-ddci2c.txt15
-rw-r--r--dts/Bindings/i2c/i2c-st.txt41
-rw-r--r--dts/Bindings/i2c/i2c-versatile.txt10
-rw-r--r--dts/Bindings/i2c/i2c-vt8500.txt24
-rw-r--r--dts/Bindings/i2c/i2c-xiic.txt22
-rw-r--r--dts/Bindings/i2c/ina209.txt18
-rw-r--r--dts/Bindings/i2c/ina2xx.txt22
-rw-r--r--dts/Bindings/i2c/max6697.txt64
-rw-r--r--dts/Bindings/i2c/nvidia,tegra20-i2c.txt75
-rw-r--r--dts/Bindings/i2c/qcom,i2c-qup.txt40
-rw-r--r--dts/Bindings/i2c/trivial-devices.txt87
-rw-r--r--dts/Bindings/iio/accel/bma180.txt24
-rw-r--r--dts/Bindings/iio/adc/at91_adc.txt87
-rw-r--r--dts/Bindings/iio/adc/nuvoton-nau7802.txt18
-rw-r--r--dts/Bindings/iio/adc/twl4030-madc.txt24
-rw-r--r--dts/Bindings/iio/adc/vf610-adc.txt22
-rw-r--r--dts/Bindings/iio/adc/xilinx-xadc.txt113
-rw-r--r--dts/Bindings/iio/dac/ad7303.txt23
-rw-r--r--dts/Bindings/iio/frequency/adf4350.txt86
-rw-r--r--dts/Bindings/iio/humidity/dht11.txt14
-rw-r--r--dts/Bindings/iio/iio-bindings.txt97
-rw-r--r--dts/Bindings/iio/light/apds9300.txt22
-rw-r--r--dts/Bindings/iio/light/cm36651.txt26
-rw-r--r--dts/Bindings/iio/light/gp2ap020a00f.txt21
-rw-r--r--dts/Bindings/iio/light/tsl2563.txt19
-rw-r--r--dts/Bindings/iio/magnetometer/ak8975.txt18
-rw-r--r--dts/Bindings/iio/magnetometer/hmc5843.txt17
-rw-r--r--dts/Bindings/input/ads7846.txt91
-rw-r--r--dts/Bindings/input/clps711x-keypad.txt27
-rw-r--r--dts/Bindings/input/cros-ec-keyb.txt72
-rw-r--r--dts/Bindings/input/fsl-mma8450.txt12
-rw-r--r--dts/Bindings/input/gpio-beeper.txt13
-rw-r--r--dts/Bindings/input/gpio-keys-polled.txt38
-rw-r--r--dts/Bindings/input/gpio-matrix-keypad.txt46
-rw-r--r--dts/Bindings/input/imx-keypad.txt53
-rw-r--r--dts/Bindings/input/input-reset.txt33
-rw-r--r--dts/Bindings/input/lpc32xx-key.txt31
-rw-r--r--dts/Bindings/input/matrix-keymap.txt27
-rw-r--r--dts/Bindings/input/nvidia,tegra20-kbc.txt54
-rw-r--r--dts/Bindings/input/omap-keypad.txt28
-rw-r--r--dts/Bindings/input/ps2keyb-mouse-apbps2.txt16
-rw-r--r--dts/Bindings/input/pwm-beeper.txt7
-rw-r--r--dts/Bindings/input/pxa27x-keypad.txt60
-rw-r--r--dts/Bindings/input/qcom,pm8xxx-keypad.txt89
-rw-r--r--dts/Bindings/input/qcom,pm8xxx-pwrkey.txt46
-rw-r--r--dts/Bindings/input/qcom,pm8xxx-vib.txt22
-rw-r--r--dts/Bindings/input/rotary-encoder.txt36
-rw-r--r--dts/Bindings/input/samsung-keypad.txt74
-rw-r--r--dts/Bindings/input/spear-keyboard.txt20
-rw-r--r--dts/Bindings/input/stmpe-keypad.txt39
-rw-r--r--dts/Bindings/input/tca8418_keypad.txt10
-rw-r--r--dts/Bindings/input/ti,nspire-keypad.txt60
-rw-r--r--dts/Bindings/input/touchscreen/auo_pixcir_ts.txt30
-rw-r--r--dts/Bindings/input/touchscreen/bu21013.txt28
-rw-r--r--dts/Bindings/input/touchscreen/edt-ft5x06.txt55
-rw-r--r--dts/Bindings/input/touchscreen/egalax-ts.txt19
-rw-r--r--dts/Bindings/input/touchscreen/lpc32xx-tsc.txt16
-rw-r--r--dts/Bindings/input/touchscreen/mms114.txt34
-rw-r--r--dts/Bindings/input/touchscreen/sitronix-st1232.txt24
-rw-r--r--dts/Bindings/input/touchscreen/stmpe.txt43
-rw-r--r--dts/Bindings/input/touchscreen/ti-tsc-adc.txt44
-rw-r--r--dts/Bindings/input/touchscreen/tsc2007.txt41
-rw-r--r--dts/Bindings/input/touchscreen/zforce_ts.txt30
-rw-r--r--dts/Bindings/input/twl4030-keypad.txt27
-rw-r--r--dts/Bindings/input/twl4030-pwrbutton.txt21
-rw-r--r--dts/Bindings/interrupt-controller/abilis,tb10x-ictl.txt38
-rw-r--r--dts/Bindings/interrupt-controller/allwinner,sun4i-ic.txt18
-rw-r--r--dts/Bindings/interrupt-controller/allwinner,sun67i-sc-nmi.txt27
-rw-r--r--dts/Bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt110
-rw-r--r--dts/Bindings/interrupt-controller/cirrus,clps711x-intc.txt41
-rw-r--r--dts/Bindings/interrupt-controller/interrupts.txt112
-rw-r--r--dts/Bindings/interrupt-controller/lsi,zevio-intc.txt18
-rw-r--r--dts/Bindings/interrupt-controller/marvell,orion-intc.txt48
-rw-r--r--dts/Bindings/interrupt-controller/renesas,intc-irqpin.txt16
-rw-r--r--dts/Bindings/interrupt-controller/samsung,s3c24xx-irq.txt53
-rw-r--r--dts/Bindings/interrupt-controller/snps,dw-apb-ictl.txt32
-rw-r--r--dts/Bindings/iommu/arm,smmu.txt76
-rw-r--r--dts/Bindings/iommu/nvidia,tegra20-gart.txt14
-rw-r--r--dts/Bindings/iommu/nvidia,tegra30-smmu.txt21
-rw-r--r--dts/Bindings/iommu/ti,omap-iommu.txt26
-rw-r--r--dts/Bindings/leds/common.txt23
-rw-r--r--dts/Bindings/leds/leds-gpio.txt64
-rw-r--r--dts/Bindings/leds/leds-lp55xx.txt222
-rw-r--r--dts/Bindings/leds/leds-ns2.txt26
-rw-r--r--dts/Bindings/leds/leds-pwm.txt48
-rw-r--r--dts/Bindings/leds/pca963x.txt47
-rw-r--r--dts/Bindings/leds/tca6507.txt49
-rw-r--r--dts/Bindings/lpddr2/lpddr2-timings.txt52
-rw-r--r--dts/Bindings/lpddr2/lpddr2.txt102
-rw-r--r--dts/Bindings/marvell.txt516
-rw-r--r--dts/Bindings/media/coda.txt30
-rw-r--r--dts/Bindings/media/exynos-fimc-lite.txt16
-rw-r--r--dts/Bindings/media/exynos-jpeg-codec.txt11
-rw-r--r--dts/Bindings/media/exynos4-fimc-is.txt49
-rw-r--r--dts/Bindings/media/exynos5-gsc.txt30
-rw-r--r--dts/Bindings/media/gpio-ir-receiver.txt16
-rw-r--r--dts/Bindings/media/i2c/adv7343.txt48
-rw-r--r--dts/Bindings/media/i2c/mt9p031.txt40
-rw-r--r--dts/Bindings/media/i2c/ths8200.txt19
-rw-r--r--dts/Bindings/media/i2c/tvp514x.txt44
-rw-r--r--dts/Bindings/media/i2c/tvp7002.txt53
-rw-r--r--dts/Bindings/media/img-ir-rev1.txt34
-rw-r--r--dts/Bindings/media/s5p-mfc.txt50
-rw-r--r--dts/Bindings/media/samsung-fimc.txt211
-rw-r--r--dts/Bindings/media/samsung-mipi-csis.txt81
-rw-r--r--dts/Bindings/media/samsung-s5c73m3.txt97
-rw-r--r--dts/Bindings/media/samsung-s5k5baf.txt58
-rw-r--r--dts/Bindings/media/samsung-s5k6a3.txt33
-rw-r--r--dts/Bindings/media/sh_mobile_ceu.txt18
-rw-r--r--dts/Bindings/media/st-rc.txt29
-rw-r--r--dts/Bindings/media/video-interfaces.txt230
-rw-r--r--dts/Bindings/memory-controllers/fsl/ifc.txt79
-rw-r--r--dts/Bindings/memory-controllers/mvebu-devbus.txt156
-rw-r--r--dts/Bindings/memory-controllers/ti-aemif.txt210
-rw-r--r--dts/Bindings/memory-controllers/ti/emif.txt55
-rw-r--r--dts/Bindings/metag/meta-intc.txt82
-rw-r--r--dts/Bindings/metag/meta.txt30
-rw-r--r--dts/Bindings/metag/pdc-intc.txt105
-rw-r--r--dts/Bindings/mfd/88pm860x.txt85
-rw-r--r--dts/Bindings/mfd/ab8500.txt159
-rw-r--r--dts/Bindings/mfd/arizona.txt65
-rw-r--r--dts/Bindings/mfd/as3711.txt73
-rw-r--r--dts/Bindings/mfd/as3722.txt205
-rw-r--r--dts/Bindings/mfd/bcm590xx.txt37
-rw-r--r--dts/Bindings/mfd/cros-ec.txt65
-rw-r--r--dts/Bindings/mfd/da9052-i2c.txt60
-rw-r--r--dts/Bindings/mfd/da9055.txt72
-rw-r--r--dts/Bindings/mfd/lp3943.txt33
-rw-r--r--dts/Bindings/mfd/max77686.txt62
-rw-r--r--dts/Bindings/mfd/max77693.txt55
-rw-r--r--dts/Bindings/mfd/max8925.txt64
-rw-r--r--dts/Bindings/mfd/max8998.txt119
-rw-r--r--dts/Bindings/mfd/mc13xxx.txt155
-rw-r--r--dts/Bindings/mfd/omap-usb-host.txt103
-rw-r--r--dts/Bindings/mfd/omap-usb-tll.txt27
-rw-r--r--dts/Bindings/mfd/palmas.txt51
-rw-r--r--dts/Bindings/mfd/qcom,pm8xxx.txt96
-rw-r--r--dts/Bindings/mfd/s2mpa01.txt90
-rw-r--r--dts/Bindings/mfd/s2mps11.txt120
-rw-r--r--dts/Bindings/mfd/stmpe.txt28
-rw-r--r--dts/Bindings/mfd/syscon.txt20
-rwxr-xr-xdts/Bindings/mfd/tps6507x.txt91
-rw-r--r--dts/Bindings/mfd/tps65910.txt201
-rw-r--r--dts/Bindings/mfd/twl-familly.txt47
-rw-r--r--dts/Bindings/mfd/twl4030-audio.txt46
-rw-r--r--dts/Bindings/mfd/twl4030-power.txt28
-rw-r--r--dts/Bindings/mfd/twl6040.txt65
-rw-r--r--dts/Bindings/mipi/dsi/mipi-dsi-bus.txt98
-rw-r--r--dts/Bindings/mipi/nvidia,tegra114-mipi.txt41
-rw-r--r--dts/Bindings/mips/cavium/bootbus.txt126
-rw-r--r--dts/Bindings/mips/cavium/ciu.txt26
-rw-r--r--dts/Bindings/mips/cavium/ciu2.txt27
-rw-r--r--dts/Bindings/mips/cavium/dma-engine.txt21
-rw-r--r--dts/Bindings/mips/cavium/uctl.txt46
-rw-r--r--dts/Bindings/mips/cpu_irq.txt47
-rw-r--r--dts/Bindings/mips/ralink.txt17
-rw-r--r--dts/Bindings/misc/allwinner,sunxi-sid.txt17
-rw-r--r--dts/Bindings/misc/at25.txt35
-rw-r--r--dts/Bindings/misc/atmel-ssc.txt49
-rw-r--r--dts/Bindings/misc/bmp085.txt24
-rw-r--r--dts/Bindings/misc/ifm-csi.txt41
-rw-r--r--dts/Bindings/misc/lis302.txt112
-rw-r--r--dts/Bindings/misc/smc.txt15
-rw-r--r--dts/Bindings/misc/sram.txt51
-rw-r--r--dts/Bindings/misc/ti,dac7512.txt20
-rw-r--r--dts/Bindings/mmc/arasan,sdhci.txt27
-rw-r--r--dts/Bindings/mmc/atmel-hsmci.txt73
-rw-r--r--dts/Bindings/mmc/brcm,bcm2835-sdhci.txt18
-rw-r--r--dts/Bindings/mmc/davinci_mmc.txt33
-rw-r--r--dts/Bindings/mmc/exynos-dw-mshc.txt89
-rw-r--r--dts/Bindings/mmc/fsl-esdhc.txt36
-rw-r--r--dts/Bindings/mmc/fsl-imx-esdhc.txt37
-rw-r--r--dts/Bindings/mmc/fsl-imx-mmc.txt24
-rw-r--r--dts/Bindings/mmc/k3-dw-mshc.txt46
-rw-r--r--dts/Bindings/mmc/kona-sdhci.txt21
-rw-r--r--dts/Bindings/mmc/mmc-spi-slot.txt31
-rw-r--r--dts/Bindings/mmc/mmc.txt76
-rw-r--r--dts/Bindings/mmc/mmci.txt15
-rw-r--r--dts/Bindings/mmc/mxs-mmc.txt27
-rw-r--r--dts/Bindings/mmc/nvidia,tegra20-sdhci.txt34
-rw-r--r--dts/Bindings/mmc/orion-sdio.txt17
-rw-r--r--dts/Bindings/mmc/pxa-mmc.txt25
-rw-r--r--dts/Bindings/mmc/rockchip-dw-mshc.txt23
-rw-r--r--dts/Bindings/mmc/samsung-sdhci.txt32
-rw-r--r--dts/Bindings/mmc/sdhci-dove.txt14
-rw-r--r--dts/Bindings/mmc/sdhci-msm.txt55
-rw-r--r--dts/Bindings/mmc/sdhci-pxa.txt36
-rw-r--r--dts/Bindings/mmc/sdhci-sirf.txt18
-rw-r--r--dts/Bindings/mmc/sdhci-spear.txt18
-rw-r--r--dts/Bindings/mmc/socfpga-dw-mshc.txt23
-rw-r--r--dts/Bindings/mmc/synopsys-dw-mshc.txt116
-rw-r--r--dts/Bindings/mmc/ti-omap-hsmmc.txt58
-rw-r--r--dts/Bindings/mmc/ti-omap.txt54
-rw-r--r--dts/Bindings/mmc/tmio_mmc.txt23
-rw-r--r--dts/Bindings/mmc/vt8500-sdmmc.txt23
-rw-r--r--dts/Bindings/mtd/arm-versatile.txt8
-rw-r--r--dts/Bindings/mtd/atmel-dataflash.txt17
-rw-r--r--dts/Bindings/mtd/atmel-nand.txt107
-rw-r--r--dts/Bindings/mtd/davinci-nand.txt94
-rw-r--r--dts/Bindings/mtd/denali-nand.txt23
-rw-r--r--dts/Bindings/mtd/elm.txt16
-rw-r--r--dts/Bindings/mtd/flctl-nand.txt49
-rw-r--r--dts/Bindings/mtd/fsl-upm-nand.txt67
-rw-r--r--dts/Bindings/mtd/fsmc-nand.txt54
-rw-r--r--dts/Bindings/mtd/gpio-control-nand.txt47
-rw-r--r--dts/Bindings/mtd/gpmc-nand.txt92
-rw-r--r--dts/Bindings/mtd/gpmc-nor.txt98
-rw-r--r--dts/Bindings/mtd/gpmc-onenand.txt46
-rw-r--r--dts/Bindings/mtd/gpmi-nand.txt48
-rw-r--r--dts/Bindings/mtd/lpc32xx-mlc.txt50
-rw-r--r--dts/Bindings/mtd/lpc32xx-slc.txt52
-rw-r--r--dts/Bindings/mtd/m25p80.txt29
-rw-r--r--dts/Bindings/mtd/mtd-physmap.txt84
-rw-r--r--dts/Bindings/mtd/mxc-nand.txt19
-rw-r--r--dts/Bindings/mtd/nand.txt21
-rw-r--r--dts/Bindings/mtd/orion-nand.txt50
-rw-r--r--dts/Bindings/mtd/partition.txt71
-rw-r--r--dts/Bindings/mtd/pxa3xx-nand.txt35
-rw-r--r--dts/Bindings/mtd/spear_smi.txt31
-rw-r--r--dts/Bindings/mtd/st-fsm.txt26
-rw-r--r--dts/Bindings/net/allwinner,sun4i-emac.txt19
-rw-r--r--dts/Bindings/net/allwinner,sun4i-mdio.txt27
-rw-r--r--dts/Bindings/net/allwinner,sun7i-a20-gmac.txt27
-rw-r--r--dts/Bindings/net/altera_tse.txt114
-rw-r--r--dts/Bindings/net/arc_emac.txt31
-rw-r--r--dts/Bindings/net/broadcom-bcm87xx.txt29
-rw-r--r--dts/Bindings/net/broadcom-bcmgenet.txt121
-rw-r--r--dts/Bindings/net/calxeda-xgmac.txt18
-rw-r--r--dts/Bindings/net/can/atmel-can.txt14
-rw-r--r--dts/Bindings/net/can/c_can.txt49
-rw-r--r--dts/Bindings/net/can/cc770.txt53
-rw-r--r--dts/Bindings/net/can/fsl-flexcan.txt29
-rw-r--r--dts/Bindings/net/can/grcan.txt28
-rw-r--r--dts/Bindings/net/can/microchip,mcp251x.txt25
-rw-r--r--dts/Bindings/net/can/mpc5xxx-mscan.txt53
-rw-r--r--dts/Bindings/net/can/sja1000.txt57
-rw-r--r--dts/Bindings/net/cavium-mdio.txt27
-rw-r--r--dts/Bindings/net/cavium-mix.txt34
-rw-r--r--dts/Bindings/net/cavium-pip.txt93
-rw-r--r--dts/Bindings/net/cdns-emac.txt19
-rw-r--r--dts/Bindings/net/cpsw-phy-sel.txt28
-rw-r--r--dts/Bindings/net/cpsw.txt100
-rw-r--r--dts/Bindings/net/davicom-dm9000.txt24
-rw-r--r--dts/Bindings/net/davinci-mdio.txt33
-rw-r--r--dts/Bindings/net/davinci_emac.txt40
-rw-r--r--dts/Bindings/net/dsa/dsa.txt91
-rw-r--r--dts/Bindings/net/ethernet.txt25
-rw-r--r--dts/Bindings/net/fsl-fec.txt27
-rw-r--r--dts/Bindings/net/fsl-tsec-phy.txt141
-rw-r--r--dts/Bindings/net/gpmc-eth.txt97
-rw-r--r--dts/Bindings/net/lpc-eth.txt23
-rw-r--r--dts/Bindings/net/macb.txt27
-rw-r--r--dts/Bindings/net/marvell-armada-370-neta.txt21
-rw-r--r--dts/Bindings/net/marvell-orion-mdio.txt39
-rw-r--r--dts/Bindings/net/marvell-orion-net.txt82
-rw-r--r--dts/Bindings/net/mdio-gpio.txt26
-rw-r--r--dts/Bindings/net/mdio-mux-gpio.txt127
-rw-r--r--dts/Bindings/net/mdio-mux-mmioreg.txt75
-rw-r--r--dts/Bindings/net/mdio-mux.txt136
-rw-r--r--dts/Bindings/net/micrel-ks8851.txt9
-rw-r--r--dts/Bindings/net/micrel-ksz9021.txt49
-rw-r--r--dts/Bindings/net/micrel.txt18
-rw-r--r--dts/Bindings/net/moxa,moxart-mac.txt21
-rw-r--r--dts/Bindings/net/nfc/trf7970a.txt34
-rw-r--r--dts/Bindings/net/opencores-ethoc.txt22
-rw-r--r--dts/Bindings/net/phy.txt39
-rw-r--r--dts/Bindings/net/samsung-sxgbe.txt52
-rw-r--r--dts/Bindings/net/sh_eth.txt55
-rw-r--r--dts/Bindings/net/smsc-lan91c111.txt13
-rw-r--r--dts/Bindings/net/smsc911x.txt35
-rw-r--r--dts/Bindings/net/socfpga-dwmac.txt27
-rw-r--r--dts/Bindings/net/sti-dwmac.txt58
-rw-r--r--dts/Bindings/net/stmmac.txt52
-rw-r--r--dts/Bindings/net/via-velocity.txt20
-rw-r--r--dts/Bindings/net/wireless/ti,wl1251.txt39
-rw-r--r--dts/Bindings/nvec/nvidia,nvec.txt21
-rw-r--r--dts/Bindings/open-pic.txt98
-rw-r--r--dts/Bindings/panel/auo,b101aw03.txt7
-rw-r--r--dts/Bindings/panel/chunghwa,claa101wa01a.txt7
-rw-r--r--dts/Bindings/panel/chunghwa,claa101wb03.txt7
-rw-r--r--dts/Bindings/panel/lg,ld070wx3-sl01.txt7
-rw-r--r--dts/Bindings/panel/lg,lh500wx1-sd03.txt7
-rw-r--r--dts/Bindings/panel/lg,lp129qe.txt7
-rw-r--r--dts/Bindings/panel/panasonic,vvx10f004b00.txt7
-rw-r--r--dts/Bindings/panel/samsung,ld9040.txt66
-rw-r--r--dts/Bindings/panel/samsung,ltn101nt05.txt7
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-rw-r--r--dts/Bindings/pwm/cirrus,clps711x-pwm.txt16
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-rw-r--r--dts/Bindings/pwm/lpc32xx-pwm.txt12
-rw-r--r--dts/Bindings/pwm/mxs-pwm.txt17
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-rw-r--r--dts/Bindings/pwm/nxp,pca9685-pwm.txt27
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-rw-r--r--dts/Bindings/pwm/renesas,tpu-pwm.txt28
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-rw-r--r--dts/Bindings/rtc/dw-apb.txt32
-rw-r--r--dts/Bindings/rtc/haoyu,hym8563.txt27
-rw-r--r--dts/Bindings/rtc/imxdi-rtc.txt17
-rw-r--r--dts/Bindings/rtc/lpc32xx-rtc.txt15
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-rw-r--r--dts/Bindings/rtc/moxa,moxart-rtc.txt17
-rw-r--r--dts/Bindings/rtc/nvidia,tegra20-rtc.txt22
-rw-r--r--dts/Bindings/rtc/olpc-xo1-rtc.txt5
-rw-r--r--dts/Bindings/rtc/orion-rtc.txt18
-rw-r--r--dts/Bindings/rtc/pxa-rtc.txt14
-rw-r--r--dts/Bindings/rtc/rtc-cmos.txt28
-rw-r--r--dts/Bindings/rtc/rtc-omap.txt21
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-rw-r--r--dts/Bindings/rtc/s3c-rtc.txt20
-rw-r--r--dts/Bindings/rtc/sa1100-rtc.txt17
-rw-r--r--dts/Bindings/rtc/snvs-rtc.txt1
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-rw-r--r--dts/Bindings/rtc/stmp3xxx-rtc.txt16
-rw-r--r--dts/Bindings/rtc/sunxi-rtc.txt17
-rw-r--r--dts/Bindings/rtc/twl-rtc.txt12
-rw-r--r--dts/Bindings/rtc/via,vt8500-rtc.txt15
-rw-r--r--dts/Bindings/serial/altera_jtaguart.txt5
-rw-r--r--dts/Bindings/serial/altera_uart.txt8
-rw-r--r--dts/Bindings/serial/arc-uart.txt26
-rw-r--r--dts/Bindings/serial/atmel-usart.txt53
-rw-r--r--dts/Bindings/serial/cavium-uart.txt19
-rw-r--r--dts/Bindings/serial/cirrus,clps711x-uart.txt28
-rw-r--r--dts/Bindings/serial/efm32-uart.txt20
-rw-r--r--dts/Bindings/serial/fsl-imx-uart.txt29
-rw-r--r--dts/Bindings/serial/fsl-lpuart.txt27
-rw-r--r--dts/Bindings/serial/fsl-mxs-auart.txt37
-rw-r--r--dts/Bindings/serial/lantiq_asc.txt16
-rw-r--r--dts/Bindings/serial/maxim,max310x.txt36
-rw-r--r--dts/Bindings/serial/mrvl,pxa-ssp.txt65
-rw-r--r--dts/Bindings/serial/mrvl-serial.txt4
-rw-r--r--dts/Bindings/serial/nvidia,tegra20-hsuart.txt37
-rw-r--r--dts/Bindings/serial/nxp-lpc32xx-hsuart.txt14
-rw-r--r--dts/Bindings/serial/of-serial.txt49
-rw-r--r--dts/Bindings/serial/omap_serial.txt10
-rw-r--r--dts/Bindings/serial/pl011.txt17
-rw-r--r--dts/Bindings/serial/qca,ar9330-uart.txt34
-rw-r--r--dts/Bindings/serial/qcom,msm-uart.txt25
-rw-r--r--dts/Bindings/serial/qcom,msm-uartdm.txt53
-rw-r--r--dts/Bindings/serial/renesas,sci-serial.txt46
-rw-r--r--dts/Bindings/serial/rs485.txt31
-rw-r--r--dts/Bindings/serial/samsung_uart.txt14
-rw-r--r--dts/Bindings/serial/sirf-uart.txt33
-rw-r--r--dts/Bindings/serial/snps-dw-apb-uart.txt25
-rw-r--r--dts/Bindings/serial/st-asc.txt18
-rw-r--r--dts/Bindings/serial/via,vt8500-uart.txt17
-rw-r--r--dts/Bindings/serial/vt8500-uart.txt26
-rw-r--r--dts/Bindings/serio/altera_ps2.txt5
-rw-r--r--dts/Bindings/serio/olpc,ap-sp.txt13
-rw-r--r--dts/Bindings/serio/snps-arc_ps2.txt16
-rw-r--r--dts/Bindings/sound/adi,adau1701.txt35
-rw-r--r--dts/Bindings/sound/adi,axi-i2s.txt31
-rw-r--r--dts/Bindings/sound/adi,axi-spdif-tx.txt30
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-rw-r--r--dts/Bindings/sound/ak4554.c11
-rw-r--r--dts/Bindings/sound/ak4642.txt17
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-rw-r--r--dts/Bindings/sound/alc5632.txt43
-rw-r--r--dts/Bindings/sound/armada-370db-audio.txt27
-rw-r--r--dts/Bindings/sound/atmel-at91sam9g20ek-wm8731-audio.txt26
-rw-r--r--dts/Bindings/sound/atmel-sam9x5-wm8731-audio.txt35
-rw-r--r--dts/Bindings/sound/atmel-wm8904.txt55
-rw-r--r--dts/Bindings/sound/bcm2835-i2s.txt25
-rw-r--r--dts/Bindings/sound/cs4270.txt21
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-rw-r--r--dts/Bindings/sound/davinci-evm-audio.txt49
-rw-r--r--dts/Bindings/sound/davinci-mcasp-audio.txt60
-rw-r--r--dts/Bindings/sound/eukrea-tlv320.txt21
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-rw-r--r--dts/Bindings/sound/fsl,spdif.txt59
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-rw-r--r--dts/Bindings/sound/imx-audio-sgtl5000.txt49
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-rw-r--r--dts/Bindings/sound/imx-audio-wm8962.txt46
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-rw-r--r--dts/Bindings/sound/max98090.txt43
-rw-r--r--dts/Bindings/sound/mrvl,pxa-ssp.txt28
-rw-r--r--dts/Bindings/sound/mrvl,pxa2xx-pcm.txt15
-rw-r--r--dts/Bindings/sound/mvebu-audio.txt34
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-rw-r--r--dts/Bindings/sound/mxs-saif.txt41
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-rw-r--r--dts/Bindings/sound/nvidia,tegra-audio-rt5640.txt52
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-rw-r--r--dts/Bindings/sound/nvidia,tegra-audio-wm9712.txt60
-rw-r--r--dts/Bindings/sound/nvidia,tegra20-ac97.txt36
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-rw-r--r--dts/Bindings/sound/nvidia,tegra20-i2s.txt30
-rw-r--r--dts/Bindings/sound/nvidia,tegra30-ahub.txt85
-rw-r--r--dts/Bindings/sound/nvidia,tegra30-i2s.txt24
-rw-r--r--dts/Bindings/sound/omap-abe-twl6040.txt91
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-rw-r--r--dts/src/powerpc/kmeter1.dts532
-rw-r--r--dts/src/powerpc/ksi8560.dts344
-rw-r--r--dts/src/powerpc/kuroboxHD.dts147
-rw-r--r--dts/src/powerpc/kuroboxHG.dts147
-rw-r--r--dts/src/powerpc/lite5200.dts308
-rw-r--r--dts/src/powerpc/lite5200b.dts161
-rw-r--r--dts/src/powerpc/makalu.dts353
-rw-r--r--dts/src/powerpc/media5200.dts146
-rw-r--r--dts/src/powerpc/mgcoge.dts264
-rw-r--r--dts/src/powerpc/motionpro.dts136
-rw-r--r--dts/src/powerpc/mpc5121.dtsi522
-rw-r--r--dts/src/powerpc/mpc5121ads.dts178
-rw-r--r--dts/src/powerpc/mpc5125twr.dts288
-rw-r--r--dts/src/powerpc/mpc5200b.dtsi292
-rw-r--r--dts/src/powerpc/mpc7448hpc2.dts196
-rw-r--r--dts/src/powerpc/mpc8272ads.dts267
-rw-r--r--dts/src/powerpc/mpc8308_p1m.dts338
-rw-r--r--dts/src/powerpc/mpc8308rdb.dts310
-rw-r--r--dts/src/powerpc/mpc8313erdb.dts409
-rw-r--r--dts/src/powerpc/mpc8315erdb.dts478
-rw-r--r--dts/src/powerpc/mpc832x_mds.dts439
-rw-r--r--dts/src/powerpc/mpc832x_rdb.dts371
-rw-r--r--dts/src/powerpc/mpc8349emitx.dts425
-rw-r--r--dts/src/powerpc/mpc8349emitxgp.dts250
-rw-r--r--dts/src/powerpc/mpc834x_mds.dts407
-rw-r--r--dts/src/powerpc/mpc836x_mds.dts485
-rw-r--r--dts/src/powerpc/mpc836x_rdk.dts467
-rw-r--r--dts/src/powerpc/mpc8377_mds.dts509
-rw-r--r--dts/src/powerpc/mpc8377_rdb.dts502
-rw-r--r--dts/src/powerpc/mpc8377_wlan.dts463
-rw-r--r--dts/src/powerpc/mpc8378_mds.dts493
-rw-r--r--dts/src/powerpc/mpc8378_rdb.dts486
-rw-r--r--dts/src/powerpc/mpc8379_mds.dts459
-rw-r--r--dts/src/powerpc/mpc8379_rdb.dts452
-rw-r--r--dts/src/powerpc/mpc8536ds.dts109
-rw-r--r--dts/src/powerpc/mpc8536ds.dtsi244
-rw-r--r--dts/src/powerpc/mpc8536ds_36b.dts109
-rw-r--r--dts/src/powerpc/mpc8540ads.dts359
-rw-r--r--dts/src/powerpc/mpc8541cds.dts379
-rw-r--r--dts/src/powerpc/mpc8544ds.dts107
-rw-r--r--dts/src/powerpc/mpc8544ds.dtsi207
-rw-r--r--dts/src/powerpc/mpc8548cds.dtsi302
-rw-r--r--dts/src/powerpc/mpc8548cds_32b.dts86
-rw-r--r--dts/src/powerpc/mpc8548cds_36b.dts86
-rw-r--r--dts/src/powerpc/mpc8555cds.dts379
-rw-r--r--dts/src/powerpc/mpc8560ads.dts392
-rw-r--r--dts/src/powerpc/mpc8568mds.dts314
-rw-r--r--dts/src/powerpc/mpc8569mds.dts447
-rw-r--r--dts/src/powerpc/mpc8572ds.dts90
-rw-r--r--dts/src/powerpc/mpc8572ds.dtsi428
-rw-r--r--dts/src/powerpc/mpc8572ds_36b.dts90
-rw-r--r--dts/src/powerpc/mpc8572ds_camp_core0.dts82
-rw-r--r--dts/src/powerpc/mpc8572ds_camp_core1.dts115
-rw-r--r--dts/src/powerpc/mpc8610_hpcd.dts506
-rw-r--r--dts/src/powerpc/mpc8641_hpcn.dts663
-rw-r--r--dts/src/powerpc/mpc8641_hpcn_36b.dts605
-rw-r--r--dts/src/powerpc/mpc866ads.dts190
-rw-r--r--dts/src/powerpc/mpc885ads.dts232
-rw-r--r--dts/src/powerpc/mucmc52.dts226
-rw-r--r--dts/src/powerpc/mvme5100.dts185
-rw-r--r--dts/src/powerpc/o2d.dts47
-rw-r--r--dts/src/powerpc/o2d.dtsi122
-rw-r--r--dts/src/powerpc/o2d300.dts52
-rw-r--r--dts/src/powerpc/o2dnt2.dts48
-rw-r--r--dts/src/powerpc/o2i.dts33
-rw-r--r--dts/src/powerpc/o2mnt.dts33
-rw-r--r--dts/src/powerpc/o3dnt.dts48
-rw-r--r--dts/src/powerpc/obs600.dts314
-rw-r--r--dts/src/powerpc/p1010rdb-pa.dts23
-rw-r--r--dts/src/powerpc/p1010rdb-pa.dtsi85
-rw-r--r--dts/src/powerpc/p1010rdb-pa_36b.dts46
-rw-r--r--dts/src/powerpc/p1010rdb-pb.dts35
-rw-r--r--dts/src/powerpc/p1010rdb-pb_36b.dts58
-rw-r--r--dts/src/powerpc/p1010rdb.dtsi205
-rw-r--r--dts/src/powerpc/p1010rdb_32b.dtsi79
-rw-r--r--dts/src/powerpc/p1010rdb_36b.dtsi79
-rw-r--r--dts/src/powerpc/p1020mbg-pc.dtsi151
-rw-r--r--dts/src/powerpc/p1020mbg-pc_32b.dts89
-rw-r--r--dts/src/powerpc/p1020mbg-pc_36b.dts89
-rw-r--r--dts/src/powerpc/p1020rdb-pc.dtsi247
-rw-r--r--dts/src/powerpc/p1020rdb-pc_32b.dts90
-rw-r--r--dts/src/powerpc/p1020rdb-pc_36b.dts90
-rw-r--r--dts/src/powerpc/p1020rdb-pc_camp_core0.dts64
-rw-r--r--dts/src/powerpc/p1020rdb-pc_camp_core1.dts142
-rw-r--r--dts/src/powerpc/p1020rdb-pd.dts280
-rw-r--r--dts/src/powerpc/p1020rdb.dts66
-rw-r--r--dts/src/powerpc/p1020rdb.dtsi246
-rw-r--r--dts/src/powerpc/p1020rdb_36b.dts66
-rw-r--r--dts/src/powerpc/p1020utm-pc.dtsi140
-rw-r--r--dts/src/powerpc/p1020utm-pc_32b.dts89
-rw-r--r--dts/src/powerpc/p1020utm-pc_36b.dts89
-rw-r--r--dts/src/powerpc/p1021mds.dts323
-rw-r--r--dts/src/powerpc/p1021rdb-pc.dtsi244
-rw-r--r--dts/src/powerpc/p1021rdb-pc_32b.dts96
-rw-r--r--dts/src/powerpc/p1021rdb-pc_36b.dts96
-rw-r--r--dts/src/powerpc/p1022ds.dtsi227
-rw-r--r--dts/src/powerpc/p1022ds_32b.dts103
-rw-r--r--dts/src/powerpc/p1022ds_36b.dts103
-rw-r--r--dts/src/powerpc/p1022rdk.dts188
-rw-r--r--dts/src/powerpc/p1023rdb.dts234
-rw-r--r--dts/src/powerpc/p1023rds.dts219
-rw-r--r--dts/src/powerpc/p1024rdb.dtsi228
-rw-r--r--dts/src/powerpc/p1024rdb_32b.dts87
-rw-r--r--dts/src/powerpc/p1024rdb_36b.dts87
-rw-r--r--dts/src/powerpc/p1025rdb.dtsi326
-rw-r--r--dts/src/powerpc/p1025rdb_32b.dts133
-rw-r--r--dts/src/powerpc/p1025rdb_36b.dts93
-rw-r--r--dts/src/powerpc/p1025twr.dts95
-rw-r--r--dts/src/powerpc/p1025twr.dtsi280
-rw-r--r--dts/src/powerpc/p2020ds.dts89
-rw-r--r--dts/src/powerpc/p2020ds.dtsi327
-rw-r--r--dts/src/powerpc/p2020rdb-pc.dtsi241
-rw-r--r--dts/src/powerpc/p2020rdb-pc_32b.dts96
-rw-r--r--dts/src/powerpc/p2020rdb-pc_36b.dts96
-rw-r--r--dts/src/powerpc/p2020rdb.dts291
-rw-r--r--dts/src/powerpc/p2041rdb.dts223
-rw-r--r--dts/src/powerpc/p3041ds.dts237
-rw-r--r--dts/src/powerpc/p4080ds.dts191
-rw-r--r--dts/src/powerpc/p5020ds.dts237
-rw-r--r--dts/src/powerpc/p5040ds.dts207
-rw-r--r--dts/src/powerpc/pcm030.dts110
-rw-r--r--dts/src/powerpc/pcm032.dts189
-rw-r--r--dts/src/powerpc/pdm360ng.dts199
-rw-r--r--dts/src/powerpc/ppa8548.dts164
-rw-r--r--dts/src/powerpc/pq2fads.dts247
-rw-r--r--dts/src/powerpc/prpmc2800.dts297
-rw-r--r--dts/src/powerpc/ps3.dts70
-rw-r--r--dts/src/powerpc/rainier.dts350
-rw-r--r--dts/src/powerpc/redwood.dts387
-rw-r--r--dts/src/powerpc/sam440ep.dts293
-rw-r--r--dts/src/powerpc/sbc8349.dts331
-rw-r--r--dts/src/powerpc/sbc8548-altflash.dts115
-rw-r--r--dts/src/powerpc/sbc8548-post.dtsi293
-rw-r--r--dts/src/powerpc/sbc8548-pre.dtsi52
-rw-r--r--dts/src/powerpc/sbc8548.dts110
-rw-r--r--dts/src/powerpc/sbc8641d.dts455
-rw-r--r--dts/src/powerpc/sequoia.dts412
-rw-r--r--dts/src/powerpc/socrates.dts352
-rw-r--r--dts/src/powerpc/storcenter.dts142
-rw-r--r--dts/src/powerpc/stx_gp3_8560.dts304
-rw-r--r--dts/src/powerpc/stxssa8555.dts378
-rw-r--r--dts/src/powerpc/t4240emu.dts268
-rw-r--r--dts/src/powerpc/t4240qds.dts283
-rw-r--r--dts/src/powerpc/taishan.dts427
-rw-r--r--dts/src/powerpc/tqm5200.dts211
-rw-r--r--dts/src/powerpc/tqm8540.dts346
-rw-r--r--dts/src/powerpc/tqm8541.dts326
-rw-r--r--dts/src/powerpc/tqm8548-bigflash.dts499
-rw-r--r--dts/src/powerpc/tqm8548.dts499
-rw-r--r--dts/src/powerpc/tqm8555.dts326
-rw-r--r--dts/src/powerpc/tqm8560.dts399
-rw-r--r--dts/src/powerpc/tqm8xx.dts196
-rw-r--r--dts/src/powerpc/uc101.dts156
-rw-r--r--dts/src/powerpc/virtex440-ml507.dts406
-rw-r--r--dts/src/powerpc/virtex440-ml510.dts465
-rw-r--r--dts/src/powerpc/walnut.dts246
-rw-r--r--dts/src/powerpc/warp.dts309
-rw-r--r--dts/src/powerpc/wii.dts218
-rw-r--r--dts/src/powerpc/xcalibur1501.dts696
-rw-r--r--dts/src/powerpc/xpedite5200.dts468
-rw-r--r--dts/src/powerpc/xpedite5200_xmon.dts508
-rw-r--r--dts/src/powerpc/xpedite5301.dts640
-rw-r--r--dts/src/powerpc/xpedite5330.dts707
-rw-r--r--dts/src/powerpc/xpedite5370.dts638
-rw-r--r--dts/src/powerpc/yosemite.dts332
-rw-r--r--dts/src/x86/falconfalls.dts433
-rw-r--r--dts/src/xtensa/lx60.dts11
-rw-r--r--dts/src/xtensa/ml605.dts11
-rw-r--r--dts/src/xtensa/xtfpga-flash-16m.dtsi26
-rw-r--r--dts/src/xtensa/xtfpga-flash-4m.dtsi18
-rw-r--r--dts/src/xtensa/xtfpga.dtsi62
-rw-r--r--dts/testcase-data/testcases.dtsi3
-rw-r--r--dts/testcase-data/tests-interrupts.dtsi58
-rw-r--r--dts/testcase-data/tests-match.dtsi19
-rw-r--r--dts/testcase-data/tests-phandle.dtsi42
2264 files changed, 296334 insertions, 0 deletions
diff --git a/dts/Bindings/ABI.txt b/dts/Bindings/ABI.txt
new file mode 100644
index 0000000..d25f8d3
--- /dev/null
+++ b/dts/Bindings/ABI.txt
@@ -0,0 +1,39 @@
+
+ Devicetree (DT) ABI
+
+I. Regarding stable bindings/ABI, we quote from the 2013 ARM mini-summit
+ summary document:
+
+ "That still leaves the question of, what does a stable binding look
+ like? Certainly a stable binding means that a newer kernel will not
+ break on an older device tree, but that doesn't mean the binding is
+ frozen for all time. Grant said there are ways to change bindings that
+ don't result in breakage. For instance, if a new property is added,
+ then default to the previous behaviour if it is missing. If a binding
+ truly needs an incompatible change, then change the compatible string
+ at the same time. The driver can bind against both the old and the
+ new. These guidelines aren't new, but they desperately need to be
+ documented."
+
+II. General binding rules
+
+ 1) Maintainers, don't let perfect be the enemy of good. Don't hold up a
+ binding because it isn't perfect.
+
+ 2) Use specific compatible strings so that if we need to add a feature (DMA)
+ in the future, we can create a new compatible string. See I.
+
+ 3) Bindings can be augmented, but the driver shouldn't break when given
+ the old binding. ie. add additional properties, but don't change the
+ meaning of an existing property. For drivers, default to the original
+ behaviour when a newly added property is missing.
+
+ 4) Don't submit bindings for staging or unstable. That will be decided by
+ the devicetree maintainers *after* discussion on the mailinglist.
+
+III. Notes
+
+ 1) This document is intended as a general familiarization with the process as
+ decided at the 2013 Kernel Summit. When in doubt, the current word of the
+ devicetree maintainers overrules this document. In that situation, a patch
+ updating this document would be appreciated.
diff --git a/dts/Bindings/arc/interrupts.txt b/dts/Bindings/arc/interrupts.txt
new file mode 100644
index 0000000..9a5d562
--- /dev/null
+++ b/dts/Bindings/arc/interrupts.txt
@@ -0,0 +1,24 @@
+* ARC700 incore Interrupt Controller
+
+ The core interrupt controller provides 32 prioritised interrupts (2 levels)
+ to ARC700 core.
+
+Properties:
+
+- compatible: "snps,arc700-intc"
+- interrupt-controller: This is an interrupt controller.
+- #interrupt-cells: Must be <1>.
+
+ Single Cell "interrupts" property of a device specifies the IRQ number
+ between 0 to 31
+
+ intc accessed via the special ARC AUX register interface, hence "reg" property
+ is not specified.
+
+Example:
+
+ intc: interrupt-controller {
+ compatible = "snps,arc700-intc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
diff --git a/dts/Bindings/arc/pmu.txt b/dts/Bindings/arc/pmu.txt
new file mode 100644
index 0000000..49d5173
--- /dev/null
+++ b/dts/Bindings/arc/pmu.txt
@@ -0,0 +1,24 @@
+* ARC Performance Monitor Unit
+
+The ARC 700 can be configured with a pipeline performance monitor for counting
+CPU and cache events like cache misses and hits.
+
+Note that:
+ * ARC 700 refers to a family of ARC processor cores;
+ - There is only one type of PMU available for the whole family;
+ - The PMU may support different sets of events; supported events are probed
+ at boot time, as required by the reference manual.
+
+ * The ARC 700 PMU does not support interrupts; although HW events may be
+ counted, the HW events themselves cannot serve as a trigger for a sample.
+
+Required properties:
+
+- compatible : should contain
+ "snps,arc700-pmu"
+
+Example:
+
+pmu {
+ compatible = "snps,arc700-pmu";
+};
diff --git a/dts/Bindings/arm/altera/socfpga-clk-manager.txt b/dts/Bindings/arm/altera/socfpga-clk-manager.txt
new file mode 100644
index 0000000..2c28f1d
--- /dev/null
+++ b/dts/Bindings/arm/altera/socfpga-clk-manager.txt
@@ -0,0 +1,11 @@
+Altera SOCFPGA Clock Manager
+
+Required properties:
+- compatible : "altr,clk-mgr"
+- reg : Should contain base address and length for Clock Manager
+
+Example:
+ clkmgr@ffd04000 {
+ compatible = "altr,clk-mgr";
+ reg = <0xffd04000 0x1000>;
+ };
diff --git a/dts/Bindings/arm/altera/socfpga-reset.txt b/dts/Bindings/arm/altera/socfpga-reset.txt
new file mode 100644
index 0000000..ecdb57d
--- /dev/null
+++ b/dts/Bindings/arm/altera/socfpga-reset.txt
@@ -0,0 +1,11 @@
+Altera SOCFPGA Reset Manager
+
+Required properties:
+- compatible : "altr,rst-mgr"
+- reg : Should contain 1 register ranges(address and length)
+
+Example:
+ rstmgr@ffd05000 {
+ compatible = "altr,rst-mgr";
+ reg = <0xffd05000 0x1000>;
+ };
diff --git a/dts/Bindings/arm/altera/socfpga-system.txt b/dts/Bindings/arm/altera/socfpga-system.txt
new file mode 100644
index 0000000..f4d04a0
--- /dev/null
+++ b/dts/Bindings/arm/altera/socfpga-system.txt
@@ -0,0 +1,13 @@
+Altera SOCFPGA System Manager
+
+Required properties:
+- compatible : "altr,sys-mgr"
+- reg : Should contain 1 register ranges(address and length)
+- cpu1-start-addr : CPU1 start address in hex.
+
+Example:
+ sysmgr@ffd08000 {
+ compatible = "altr,sys-mgr";
+ reg = <0xffd08000 0x1000>;
+ cpu1-start-addr = <0xffd080c4>;
+ };
diff --git a/dts/Bindings/arm/arch_timer.txt b/dts/Bindings/arm/arch_timer.txt
new file mode 100644
index 0000000..06fc760
--- /dev/null
+++ b/dts/Bindings/arm/arch_timer.txt
@@ -0,0 +1,81 @@
+* ARM architected timer
+
+ARM cores may have a per-core architected timer, which provides per-cpu timers,
+or a memory mapped architected timer, which provides up to 8 frames with a
+physical and optional virtual timer per frame.
+
+The per-core architected timer is attached to a GIC to deliver its
+per-processor interrupts via PPIs. The memory mapped timer is attached to a GIC
+to deliver its interrupts via SPIs.
+
+** CP15 Timer node properties:
+
+- compatible : Should at least contain one of
+ "arm,armv7-timer"
+ "arm,armv8-timer"
+
+- interrupts : Interrupt list for secure, non-secure, virtual and
+ hypervisor timers, in that order.
+
+- clock-frequency : The frequency of the main counter, in Hz. Optional.
+
+Example:
+
+ timer {
+ compatible = "arm,cortex-a15-timer",
+ "arm,armv7-timer";
+ interrupts = <1 13 0xf08>,
+ <1 14 0xf08>,
+ <1 11 0xf08>,
+ <1 10 0xf08>;
+ clock-frequency = <100000000>;
+ };
+
+** Memory mapped timer node properties:
+
+- compatible : Should at least contain "arm,armv7-timer-mem".
+
+- clock-frequency : The frequency of the main counter, in Hz. Optional.
+
+- reg : The control frame base address.
+
+Note that #address-cells, #size-cells, and ranges shall be present to ensure
+the CPU can address a frame's registers.
+
+A timer node has up to 8 frame sub-nodes, each with the following properties:
+
+- frame-number: 0 to 7.
+
+- interrupts : Interrupt list for physical and virtual timers in that order.
+ The virtual timer interrupt is optional.
+
+- reg : The first and second view base addresses in that order. The second view
+ base address is optional.
+
+- status : "disabled" indicates the frame is not available for use. Optional.
+
+Example:
+
+ timer@f0000000 {
+ compatible = "arm,armv7-timer-mem";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ reg = <0xf0000000 0x1000>;
+ clock-frequency = <50000000>;
+
+ frame@f0001000 {
+ frame-number = <0>
+ interrupts = <0 13 0x8>,
+ <0 14 0x8>;
+ reg = <0xf0001000 0x1000>,
+ <0xf0002000 0x1000>;
+ };
+
+ frame@f0003000 {
+ frame-number = <1>
+ interrupts = <0 15 0x8>;
+ reg = <0xf0003000 0x1000>;
+ status = "disabled";
+ };
+ };
diff --git a/dts/Bindings/arm/arm-boards b/dts/Bindings/arm/arm-boards
new file mode 100644
index 0000000..3509707
--- /dev/null
+++ b/dts/Bindings/arm/arm-boards
@@ -0,0 +1,88 @@
+ARM Integrator/AP (Application Platform) and Integrator/CP (Compact Platform)
+-----------------------------------------------------------------------------
+ARM's oldest Linux-supported platform with connectors for different core
+tiles of ARMv4, ARMv5 and ARMv6 type.
+
+Required properties (in root node):
+ compatible = "arm,integrator-ap"; /* Application Platform */
+ compatible = "arm,integrator-cp"; /* Compact Platform */
+
+FPGA type interrupt controllers, see the versatile-fpga-irq binding doc.
+
+Required nodes:
+
+- core-module: the root node to the Integrator platforms must have
+ a core-module with regs and the compatible string
+ "arm,core-module-integrator"
+- external-bus-interface: the root node to the Integrator platforms
+ must have an external bus interface with regs and the
+ compatible-string "arm,external-bus-interface"
+
+ Required properties for the core module:
+ - regs: the location and size of the core module registers, one
+ range of 0x200 bytes.
+
+- syscon: the root node of the Integrator platforms must have a
+ system controller node pointong to the control registers,
+ with the compatible string
+ "arm,integrator-ap-syscon"
+ "arm,integrator-cp-syscon"
+ respectively.
+
+ Required properties for the system controller:
+ - regs: the location and size of the system controller registers,
+ one range of 0x100 bytes.
+
+ Required properties for the AP system controller:
+ - interrupts: the AP syscon node must include the logical module
+ interrupts, stated in order of module instance <module 0>,
+ <module 1>, <module 2> ... for the CP system controller this
+ is not required not of any use.
+
+/dts-v1/;
+/include/ "integrator.dtsi"
+
+/ {
+ model = "ARM Integrator/AP";
+ compatible = "arm,integrator-ap";
+
+ core-module@10000000 {
+ compatible = "arm,core-module-integrator";
+ reg = <0x10000000 0x200>;
+ };
+
+ ebi@12000000 {
+ compatible = "arm,external-bus-interface";
+ reg = <0x12000000 0x100>;
+ };
+
+ syscon {
+ compatible = "arm,integrator-ap-syscon";
+ reg = <0x11000000 0x100>;
+ interrupt-parent = <&pic>;
+ /* These are the logic module IRQs */
+ interrupts = <9>, <10>, <11>, <12>;
+ };
+};
+
+
+ARM Versatile Application and Platform Baseboards
+-------------------------------------------------
+ARM's development hardware platform with connectors for customizable
+core tiles. The hardware configuration of the Versatile boards is
+highly customizable.
+
+Required properties (in root node):
+ compatible = "arm,versatile-ab"; /* Application baseboard */
+ compatible = "arm,versatile-pb"; /* Platform baseboard */
+
+Interrupt controllers:
+- VIC required properties:
+ compatible = "arm,versatile-vic";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+- SIC required properties:
+ compatible = "arm,versatile-sic";
+ interrupt-controller;
+ #interrupt-cells = <1>;
diff --git a/dts/Bindings/arm/armada-370-xp-mpic.txt b/dts/Bindings/arm/armada-370-xp-mpic.txt
new file mode 100644
index 0000000..5fc0313
--- /dev/null
+++ b/dts/Bindings/arm/armada-370-xp-mpic.txt
@@ -0,0 +1,38 @@
+Marvell Armada 370, 375, 38x, XP Interrupt Controller
+-----------------------------------------------------
+
+Required properties:
+- compatible: Should be "marvell,mpic"
+- interrupt-controller: Identifies the node as an interrupt controller.
+- msi-controller: Identifies the node as an PCI Message Signaled
+ Interrupt controller.
+- #interrupt-cells: The number of cells to define the interrupts. Should be 1.
+ The cell is the IRQ number
+
+- reg: Should contain PMIC registers location and length. First pair
+ for the main interrupt registers, second pair for the per-CPU
+ interrupt registers. For this last pair, to be compliant with SMP
+ support, the "virtual" must be use (For the record, these registers
+ automatically map to the interrupt controller registers of the
+ current CPU)
+
+Optional properties:
+
+- interrupts: If defined, then it indicates that this MPIC is
+ connected as a slave to another interrupt controller. This is
+ typically the case on Armada 375 and Armada 38x, where the MPIC is
+ connected as a slave to the Cortex-A9 GIC. The provided interrupt
+ indicate to which GIC interrupt the MPIC output is connected.
+
+Example:
+
+ mpic: interrupt-controller@d0020000 {
+ compatible = "marvell,mpic";
+ #interrupt-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-controller;
+ msi-controller;
+ reg = <0xd0020a00 0x1d0>,
+ <0xd0021070 0x58>;
+ };
diff --git a/dts/Bindings/arm/armada-370-xp-pmsu.txt b/dts/Bindings/arm/armada-370-xp-pmsu.txt
new file mode 100644
index 0000000..926b4d6
--- /dev/null
+++ b/dts/Bindings/arm/armada-370-xp-pmsu.txt
@@ -0,0 +1,20 @@
+Power Management Service Unit(PMSU)
+-----------------------------------
+Available on Marvell SOCs: Armada 370 and Armada XP
+
+Required properties:
+
+- compatible: "marvell,armada-370-xp-pmsu"
+
+- reg: Should contain PMSU registers location and length. First pair
+ for the per-CPU SW Reset Control registers, second pair for the
+ Power Management Service Unit.
+
+Example:
+
+armada-370-xp-pmsu@d0022000 {
+ compatible = "marvell,armada-370-xp-pmsu";
+ reg = <0xd0022100 0x430>,
+ <0xd0020800 0x20>;
+};
+
diff --git a/dts/Bindings/arm/armada-370-xp.txt b/dts/Bindings/arm/armada-370-xp.txt
new file mode 100644
index 0000000..c6ed90e
--- /dev/null
+++ b/dts/Bindings/arm/armada-370-xp.txt
@@ -0,0 +1,24 @@
+Marvell Armada 370 and Armada XP Platforms Device Tree Bindings
+---------------------------------------------------------------
+
+Boards with a SoC of the Marvell Armada 370 and Armada XP families
+shall have the following property:
+
+Required root node property:
+
+compatible: must contain "marvell,armada-370-xp"
+
+In addition, boards using the Marvell Armada 370 SoC shall have the
+following property:
+
+Required root node property:
+
+compatible: must contain "marvell,armada370"
+
+In addition, boards using the Marvell Armada XP SoC shall have the
+following property:
+
+Required root node property:
+
+compatible: must contain "marvell,armadaxp"
+
diff --git a/dts/Bindings/arm/armada-375.txt b/dts/Bindings/arm/armada-375.txt
new file mode 100644
index 0000000..867d0b8
--- /dev/null
+++ b/dts/Bindings/arm/armada-375.txt
@@ -0,0 +1,9 @@
+Marvell Armada 375 Platforms Device Tree Bindings
+-------------------------------------------------
+
+Boards with a SoC of the Marvell Armada 375 family shall have the
+following property:
+
+Required root node property:
+
+compatible: must contain "marvell,armada375"
diff --git a/dts/Bindings/arm/armada-38x.txt b/dts/Bindings/arm/armada-38x.txt
new file mode 100644
index 0000000..11f2330
--- /dev/null
+++ b/dts/Bindings/arm/armada-38x.txt
@@ -0,0 +1,10 @@
+Marvell Armada 38x Platforms Device Tree Bindings
+-------------------------------------------------
+
+Boards with a SoC of the Marvell Armada 38x family shall have the
+following property:
+
+Required root node property:
+
+ - compatible: must contain either "marvell,armada380" or
+ "marvell,armada385" depending on the variant of the SoC being used.
diff --git a/dts/Bindings/arm/armadeus.txt b/dts/Bindings/arm/armadeus.txt
new file mode 100644
index 0000000..9821283
--- /dev/null
+++ b/dts/Bindings/arm/armadeus.txt
@@ -0,0 +1,6 @@
+Armadeus i.MX Platforms Device Tree Bindings
+-----------------------------------------------
+
+APF51: i.MX51 based module.
+Required root node properties:
+ - compatible = "armadeus,imx51-apf51", "fsl,imx51";
diff --git a/dts/Bindings/arm/atmel-aic.txt b/dts/Bindings/arm/atmel-aic.txt
new file mode 100644
index 0000000..2742e9c
--- /dev/null
+++ b/dts/Bindings/arm/atmel-aic.txt
@@ -0,0 +1,42 @@
+* Advanced Interrupt Controller (AIC)
+
+Required properties:
+- compatible: Should be "atmel,<chip>-aic"
+ <chip> can be "at91rm9200" or "sama5d3"
+- interrupt-controller: Identifies the node as an interrupt controller.
+- interrupt-parent: For single AIC system, it is an empty property.
+- #interrupt-cells: The number of cells to define the interrupts. It should be 3.
+ The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet).
+ The second cell is used to specify flags:
+ bits[3:0] trigger type and level flags:
+ 1 = low-to-high edge triggered.
+ 2 = high-to-low edge triggered.
+ 4 = active high level-sensitive.
+ 8 = active low level-sensitive.
+ Valid combinations are 1, 2, 3, 4, 8.
+ Default flag for internal sources should be set to 4 (active high).
+ The third cell is used to specify the irq priority from 0 (lowest) to 7
+ (highest).
+- reg: Should contain AIC registers location and length
+- atmel,external-irqs: u32 array of external irqs.
+
+Examples:
+ /*
+ * AIC
+ */
+ aic: interrupt-controller@fffff000 {
+ compatible = "atmel,at91rm9200-aic";
+ interrupt-controller;
+ interrupt-parent;
+ #interrupt-cells = <3>;
+ reg = <0xfffff000 0x200>;
+ };
+
+ /*
+ * An interrupt generating device that is wired to an AIC.
+ */
+ dma: dma-controller@ffffec00 {
+ compatible = "atmel,at91sam9g45-dma";
+ reg = <0xffffec00 0x200>;
+ interrupts = <21 4 5>;
+ };
diff --git a/dts/Bindings/arm/atmel-at91.txt b/dts/Bindings/arm/atmel-at91.txt
new file mode 100644
index 0000000..16f60b4
--- /dev/null
+++ b/dts/Bindings/arm/atmel-at91.txt
@@ -0,0 +1,107 @@
+Atmel AT91 device tree bindings.
+================================
+
+PIT Timer required properties:
+- compatible: Should be "atmel,at91sam9260-pit"
+- reg: Should contain registers location and length
+- interrupts: Should contain interrupt for the PIT which is the IRQ line
+ shared across all System Controller members.
+
+System Timer (ST) required properties:
+- compatible: Should be "atmel,at91rm9200-st"
+- reg: Should contain registers location and length
+- interrupts: Should contain interrupt for the ST which is the IRQ line
+ shared across all System Controller members.
+
+TC/TCLIB Timer required properties:
+- compatible: Should be "atmel,<chip>-tcb".
+ <chip> can be "at91rm9200" or "at91sam9x5"
+- reg: Should contain registers location and length
+- interrupts: Should contain all interrupts for the TC block
+ Note that you can specify several interrupt cells if the TC
+ block has one interrupt per channel.
+- clock-names: tuple listing input clock names.
+ Required elements: "t0_clk"
+ Optional elements: "t1_clk", "t2_clk"
+- clocks: phandles to input clocks.
+
+Examples:
+
+One interrupt per TC block:
+ tcb0: timer@fff7c000 {
+ compatible = "atmel,at91rm9200-tcb";
+ reg = <0xfff7c000 0x100>;
+ interrupts = <18 4>;
+ clocks = <&tcb0_clk>;
+ clock-names = "t0_clk";
+ };
+
+One interrupt per TC channel in a TC block:
+ tcb1: timer@fffdc000 {
+ compatible = "atmel,at91rm9200-tcb";
+ reg = <0xfffdc000 0x100>;
+ interrupts = <26 4 27 4 28 4>;
+ clocks = <&tcb1_clk>;
+ clock-names = "t0_clk";
+ };
+
+RSTC Reset Controller required properties:
+- compatible: Should be "atmel,<chip>-rstc".
+ <chip> can be "at91sam9260" or "at91sam9g45"
+- reg: Should contain registers location and length
+
+Example:
+
+ rstc@fffffd00 {
+ compatible = "atmel,at91sam9260-rstc";
+ reg = <0xfffffd00 0x10>;
+ };
+
+RAMC SDRAM/DDR Controller required properties:
+- compatible: Should be "atmel,at91rm9200-sdramc",
+ "atmel,at91sam9260-sdramc",
+ "atmel,at91sam9g45-ddramc",
+- reg: Should contain registers location and length
+ For at91sam9263 and at91sam9g45 you must specify 2 entries.
+
+Examples:
+
+ ramc0: ramc@ffffe800 {
+ compatible = "atmel,at91sam9g45-ddramc";
+ reg = <0xffffe800 0x200>;
+ };
+
+ ramc0: ramc@ffffe400 {
+ compatible = "atmel,at91sam9g45-ddramc";
+ reg = <0xffffe400 0x200
+ 0xffffe600 0x200>;
+ };
+
+SHDWC Shutdown Controller
+
+required properties:
+- compatible: Should be "atmel,<chip>-shdwc".
+ <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
+- reg: Should contain registers location and length
+
+optional properties:
+- atmel,wakeup-mode: String, operation mode of the wakeup mode.
+ Supported values are: "none", "high", "low", "any".
+- atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
+
+optional at91sam9260 properties:
+- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
+
+optional at91sam9rl properties:
+- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
+- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
+
+optional at91sam9x5 properties:
+- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
+
+Example:
+
+ rstc@fffffd00 {
+ compatible = "atmel,at91sam9260-rstc";
+ reg = <0xfffffd00 0x10>;
+ };
diff --git a/dts/Bindings/arm/atmel-pmc.txt b/dts/Bindings/arm/atmel-pmc.txt
new file mode 100644
index 0000000..389bed5
--- /dev/null
+++ b/dts/Bindings/arm/atmel-pmc.txt
@@ -0,0 +1,11 @@
+* Power Management Controller (PMC)
+
+Required properties:
+- compatible: Should be "atmel,at91rm9200-pmc"
+- reg: Should contain PMC registers location and length
+
+Examples:
+ pmc: pmc@fffffc00 {
+ compatible = "atmel,at91rm9200-pmc";
+ reg = <0xfffffc00 0x100>;
+ };
diff --git a/dts/Bindings/arm/bcm/bcm11351.txt b/dts/Bindings/arm/bcm/bcm11351.txt
new file mode 100644
index 0000000..0ff6560
--- /dev/null
+++ b/dts/Bindings/arm/bcm/bcm11351.txt
@@ -0,0 +1,10 @@
+Broadcom BCM11351 device tree bindings
+-------------------------------------------
+
+Boards with the bcm281xx SoC family (which includes bcm11130, bcm11140,
+bcm11351, bcm28145, bcm28155 SoCs) shall have the following properties:
+
+Required root node property:
+
+compatible = "brcm,bcm11351";
+DEPRECATED: compatible = "bcm,bcm11351";
diff --git a/dts/Bindings/arm/bcm/bcm21664.txt b/dts/Bindings/arm/bcm/bcm21664.txt
new file mode 100644
index 0000000..e077425
--- /dev/null
+++ b/dts/Bindings/arm/bcm/bcm21664.txt
@@ -0,0 +1,15 @@
+Broadcom BCM21664 device tree bindings
+--------------------------------------
+
+This document describes the device tree bindings for boards with the BCM21664
+SoC.
+
+Required root node property:
+ - compatible: brcm,bcm21664
+
+Example:
+ / {
+ model = "BCM21664 SoC";
+ compatible = "brcm,bcm21664";
+ [...]
+ }
diff --git a/dts/Bindings/arm/bcm/kona-resetmgr.txt b/dts/Bindings/arm/bcm/kona-resetmgr.txt
new file mode 100644
index 0000000..93f31ca
--- /dev/null
+++ b/dts/Bindings/arm/bcm/kona-resetmgr.txt
@@ -0,0 +1,14 @@
+Broadcom Kona Family Reset Manager
+----------------------------------
+
+The reset manager is used on the Broadcom BCM21664 SoC.
+
+Required properties:
+ - compatible: brcm,bcm21664-resetmgr
+ - reg: memory address & range
+
+Example:
+ brcm,resetmgr@35001f00 {
+ compatible = "brcm,bcm21664-resetmgr";
+ reg = <0x35001f00 0x24>;
+ };
diff --git a/dts/Bindings/arm/bcm/kona-timer.txt b/dts/Bindings/arm/bcm/kona-timer.txt
new file mode 100644
index 0000000..39adf54
--- /dev/null
+++ b/dts/Bindings/arm/bcm/kona-timer.txt
@@ -0,0 +1,25 @@
+Broadcom Kona Family timer
+-----------------------------------------------------
+This timer is used in the following Broadcom SoCs:
+ BCM11130, BCM11140, BCM11351, BCM28145, BCM28155
+
+Required properties:
+- compatible : "brcm,kona-timer"
+- DEPRECATED: compatible : "bcm,kona-timer"
+- reg : Register range for the timer
+- interrupts : interrupt for the timer
+- clocks: phandle + clock specifier pair of the external clock
+- clock-frequency: frequency that the clock operates
+
+Only one of clocks or clock-frequency should be specified.
+
+Refer to clocks/clock-bindings.txt for generic clock consumer properties.
+
+Example:
+ timer@35006000 {
+ compatible = "brcm,kona-timer";
+ reg = <0x35006000 0x1000>;
+ interrupts = <0x0 7 0x4>;
+ clocks = <&hub_timer_clk>;
+ };
+
diff --git a/dts/Bindings/arm/bcm/kona-wdt.txt b/dts/Bindings/arm/bcm/kona-wdt.txt
new file mode 100644
index 0000000..2b86a00
--- /dev/null
+++ b/dts/Bindings/arm/bcm/kona-wdt.txt
@@ -0,0 +1,15 @@
+Broadcom Kona Family Watchdog Timer
+-----------------------------------
+
+This watchdog timer is used in the following Broadcom SoCs:
+ BCM11130, BCM11140, BCM11351, BCM28145, BCM28155
+
+Required properties:
+ - compatible = "brcm,bcm11351-wdt", "brcm,kona-wdt";
+ - reg: memory address & range
+
+Example:
+ watchdog@35002f40 {
+ compatible = "brcm,bcm11351-wdt", "brcm,kona-wdt";
+ reg = <0x35002f40 0x6c>;
+ };
diff --git a/dts/Bindings/arm/bcm2835.txt b/dts/Bindings/arm/bcm2835.txt
new file mode 100644
index 0000000..ac68348
--- /dev/null
+++ b/dts/Bindings/arm/bcm2835.txt
@@ -0,0 +1,8 @@
+Broadcom BCM2835 device tree bindings
+-------------------------------------------
+
+Boards with the BCM2835 SoC shall have the following properties:
+
+Required root node property:
+
+compatible = "brcm,bcm2835";
diff --git a/dts/Bindings/arm/bcm4708.txt b/dts/Bindings/arm/bcm4708.txt
new file mode 100644
index 0000000..6b0f49f
--- /dev/null
+++ b/dts/Bindings/arm/bcm4708.txt
@@ -0,0 +1,8 @@
+Broadcom BCM4708 device tree bindings
+-------------------------------------------
+
+Boards with the BCM4708 SoC shall have the following properties:
+
+Required root node property:
+
+compatible = "brcm,bcm4708";
diff --git a/dts/Bindings/arm/calxeda.txt b/dts/Bindings/arm/calxeda.txt
new file mode 100644
index 0000000..25fcf96
--- /dev/null
+++ b/dts/Bindings/arm/calxeda.txt
@@ -0,0 +1,15 @@
+Calxeda Platforms Device Tree Bindings
+-----------------------------------------------
+
+Boards with Calxeda Cortex-A9 based ECX-1000 (Highbank) SOC shall have the
+following properties.
+
+Required root node properties:
+ - compatible = "calxeda,highbank";
+
+
+Boards with Calxeda Cortex-A15 based ECX-2000 SOC shall have the following
+properties.
+
+Required root node properties:
+ - compatible = "calxeda,ecx-2000";
diff --git a/dts/Bindings/arm/calxeda/combophy.txt b/dts/Bindings/arm/calxeda/combophy.txt
new file mode 100644
index 0000000..6622bdb
--- /dev/null
+++ b/dts/Bindings/arm/calxeda/combophy.txt
@@ -0,0 +1,17 @@
+Calxeda Highbank Combination Phys for SATA
+
+Properties:
+- compatible : Should be "calxeda,hb-combophy"
+- #phy-cells: Should be 1.
+- reg : Address and size for Combination Phy registers.
+- phydev: device ID for programming the combophy.
+
+Example:
+
+ combophy5: combo-phy@fff5d000 {
+ compatible = "calxeda,hb-combophy";
+ #phy-cells = <1>;
+ reg = <0xfff5d000 0x1000>;
+ phydev = <31>;
+ };
+
diff --git a/dts/Bindings/arm/calxeda/l2ecc.txt b/dts/Bindings/arm/calxeda/l2ecc.txt
new file mode 100644
index 0000000..94e642a
--- /dev/null
+++ b/dts/Bindings/arm/calxeda/l2ecc.txt
@@ -0,0 +1,15 @@
+Calxeda Highbank L2 cache ECC
+
+Properties:
+- compatible : Should be "calxeda,hb-sregs-l2-ecc"
+- reg : Address and size for ECC error interrupt clear registers.
+- interrupts : Should be single bit error interrupt, then double bit error
+ interrupt.
+
+Example:
+
+ sregs@fff3c200 {
+ compatible = "calxeda,hb-sregs-l2-ecc";
+ reg = <0xfff3c200 0x100>;
+ interrupts = <0 71 4 0 72 4>;
+ };
diff --git a/dts/Bindings/arm/calxeda/mem-ctrlr.txt b/dts/Bindings/arm/calxeda/mem-ctrlr.txt
new file mode 100644
index 0000000..0496759
--- /dev/null
+++ b/dts/Bindings/arm/calxeda/mem-ctrlr.txt
@@ -0,0 +1,16 @@
+Calxeda DDR memory controller
+
+Properties:
+- compatible : Should be:
+ - "calxeda,hb-ddr-ctrl" for ECX-1000
+ - "calxeda,ecx-2000-ddr-ctrl" for ECX-2000
+- reg : Address and size for DDR controller registers.
+- interrupts : Interrupt for DDR controller.
+
+Example:
+
+ memory-controller@fff00000 {
+ compatible = "calxeda,hb-ddr-ctrl";
+ reg = <0xfff00000 0x1000>;
+ interrupts = <0 91 4>;
+ };
diff --git a/dts/Bindings/arm/cci.txt b/dts/Bindings/arm/cci.txt
new file mode 100644
index 0000000..f28d82b
--- /dev/null
+++ b/dts/Bindings/arm/cci.txt
@@ -0,0 +1,224 @@
+=======================================================
+ARM CCI cache coherent interconnect binding description
+=======================================================
+
+ARM multi-cluster systems maintain intra-cluster coherency through a
+cache coherent interconnect (CCI) that is capable of monitoring bus
+transactions and manage coherency, TLB invalidations and memory barriers.
+
+It allows snooping and distributed virtual memory message broadcast across
+clusters, through memory mapped interface, with a global control register
+space and multiple sets of interface control registers, one per slave
+interface.
+
+Bindings for the CCI node follow the ePAPR standard, available from:
+
+www.power.org/documentation/epapr-version-1-1/
+
+with the addition of the bindings described in this document which are
+specific to ARM.
+
+* CCI interconnect node
+
+ Description: Describes a CCI cache coherent Interconnect component
+
+ Node name must be "cci".
+ Node's parent must be the root node /, and the address space visible
+ through the CCI interconnect is the same as the one seen from the
+ root node (ie from CPUs perspective as per DT standard).
+ Every CCI node has to define the following properties:
+
+ - compatible
+ Usage: required
+ Value type: <string>
+ Definition: must be set to
+ "arm,cci-400"
+
+ - reg
+ Usage: required
+ Value type: Integer cells. A register entry, expressed as a pair
+ of cells, containing base and size.
+ Definition: A standard property. Specifies base physical
+ address of CCI control registers common to all
+ interfaces.
+
+ - ranges:
+ Usage: required
+ Value type: Integer cells. An array of range entries, expressed
+ as a tuple of cells, containing child address,
+ parent address and the size of the region in the
+ child address space.
+ Definition: A standard property. Follow rules in the ePAPR for
+ hierarchical bus addressing. CCI interfaces
+ addresses refer to the parent node addressing
+ scheme to declare their register bases.
+
+ CCI interconnect node can define the following child nodes:
+
+ - CCI control interface nodes
+
+ Node name must be "slave-if".
+ Parent node must be CCI interconnect node.
+
+ A CCI control interface node must contain the following
+ properties:
+
+ - compatible
+ Usage: required
+ Value type: <string>
+ Definition: must be set to
+ "arm,cci-400-ctrl-if"
+
+ - interface-type:
+ Usage: required
+ Value type: <string>
+ Definition: must be set to one of {"ace", "ace-lite"}
+ depending on the interface type the node
+ represents.
+
+ - reg:
+ Usage: required
+ Value type: Integer cells. A register entry, expressed
+ as a pair of cells, containing base and
+ size.
+ Definition: the base address and size of the
+ corresponding interface programming
+ registers.
+
+ - CCI PMU node
+
+ Parent node must be CCI interconnect node.
+
+ A CCI pmu node must contain the following properties:
+
+ - compatible
+ Usage: required
+ Value type: <string>
+ Definition: must be "arm,cci-400-pmu"
+
+ - reg:
+ Usage: required
+ Value type: Integer cells. A register entry, expressed
+ as a pair of cells, containing base and
+ size.
+ Definition: the base address and size of the
+ corresponding interface programming
+ registers.
+
+ - interrupts:
+ Usage: required
+ Value type: Integer cells. Array of interrupt specifier
+ entries, as defined in
+ ../interrupt-controller/interrupts.txt.
+ Definition: list of counter overflow interrupts, one per
+ counter. The interrupts must be specified
+ starting with the cycle counter overflow
+ interrupt, followed by counter0 overflow
+ interrupt, counter1 overflow interrupt,...
+ ,counterN overflow interrupt.
+
+ The CCI PMU has an interrupt signal for each
+ counter. The number of interrupts must be
+ equal to the number of counters.
+
+* CCI interconnect bus masters
+
+ Description: masters in the device tree connected to a CCI port
+ (inclusive of CPUs and their cpu nodes).
+
+ A CCI interconnect bus master node must contain the following
+ properties:
+
+ - cci-control-port:
+ Usage: required
+ Value type: <phandle>
+ Definition: a phandle containing the CCI control interface node
+ the master is connected to.
+
+Example:
+
+ cpus {
+ #size-cells = <0>;
+ #address-cells = <1>;
+
+ CPU0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a15";
+ cci-control-port = <&cci_control1>;
+ reg = <0x0>;
+ };
+
+ CPU1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a15";
+ cci-control-port = <&cci_control1>;
+ reg = <0x1>;
+ };
+
+ CPU2: cpu@100 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ cci-control-port = <&cci_control2>;
+ reg = <0x100>;
+ };
+
+ CPU3: cpu@101 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ cci-control-port = <&cci_control2>;
+ reg = <0x101>;
+ };
+
+ };
+
+ dma0: dma@3000000 {
+ compatible = "arm,pl330", "arm,primecell";
+ cci-control-port = <&cci_control0>;
+ reg = <0x0 0x3000000 0x0 0x1000>;
+ interrupts = <10>;
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <32>;
+ };
+
+ cci@2c090000 {
+ compatible = "arm,cci-400";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x0 0x2c090000 0 0x1000>;
+ ranges = <0x0 0x0 0x2c090000 0x10000>;
+
+ cci_control0: slave-if@1000 {
+ compatible = "arm,cci-400-ctrl-if";
+ interface-type = "ace-lite";
+ reg = <0x1000 0x1000>;
+ };
+
+ cci_control1: slave-if@4000 {
+ compatible = "arm,cci-400-ctrl-if";
+ interface-type = "ace";
+ reg = <0x4000 0x1000>;
+ };
+
+ cci_control2: slave-if@5000 {
+ compatible = "arm,cci-400-ctrl-if";
+ interface-type = "ace";
+ reg = <0x5000 0x1000>;
+ };
+
+ pmu@9000 {
+ compatible = "arm,cci-400-pmu";
+ reg = <0x9000 0x5000>;
+ interrupts = <0 101 4>,
+ <0 102 4>,
+ <0 103 4>,
+ <0 104 4>,
+ <0 105 4>;
+ };
+ };
+
+This CCI node corresponds to a CCI component whose control registers sits
+at address 0x000000002c090000.
+CCI slave interface @0x000000002c091000 is connected to dma controller dma0.
+CCI slave interface @0x000000002c094000 is connected to CPUs {CPU0, CPU1};
+CCI slave interface @0x000000002c095000 is connected to CPUs {CPU2, CPU3};
diff --git a/dts/Bindings/arm/coherency-fabric.txt b/dts/Bindings/arm/coherency-fabric.txt
new file mode 100644
index 0000000..17d8cd1
--- /dev/null
+++ b/dts/Bindings/arm/coherency-fabric.txt
@@ -0,0 +1,21 @@
+Coherency fabric
+----------------
+Available on Marvell SOCs: Armada 370 and Armada XP
+
+Required properties:
+
+- compatible: "marvell,coherency-fabric"
+
+- reg: Should contain coherency fabric registers location and
+ length. First pair for the coherency fabric registers, second pair
+ for the per-CPU fabric registers registers.
+
+Example:
+
+coherency-fabric@d0020200 {
+ compatible = "marvell,coherency-fabric";
+ reg = <0xd0020200 0xb0>,
+ <0xd0021810 0x1c>;
+
+};
+
diff --git a/dts/Bindings/arm/cpus.txt b/dts/Bindings/arm/cpus.txt
new file mode 100644
index 0000000..333f4ae
--- /dev/null
+++ b/dts/Bindings/arm/cpus.txt
@@ -0,0 +1,407 @@
+=================
+ARM CPUs bindings
+=================
+
+The device tree allows to describe the layout of CPUs in a system through
+the "cpus" node, which in turn contains a number of subnodes (ie "cpu")
+defining properties for every cpu.
+
+Bindings for CPU nodes follow the ePAPR v1.1 standard, available from:
+
+https://www.power.org/documentation/epapr-version-1-1/
+
+with updates for 32-bit and 64-bit ARM systems provided in this document.
+
+================================
+Convention used in this document
+================================
+
+This document follows the conventions described in the ePAPR v1.1, with
+the addition:
+
+- square brackets define bitfields, eg reg[7:0] value of the bitfield in
+ the reg property contained in bits 7 down to 0
+
+=====================================
+cpus an