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Diffstat (limited to 'dts/Bindings/clock/mvebu-corediv-clock.txt')
| -rw-r--r-- | dts/Bindings/clock/mvebu-corediv-clock.txt | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/dts/Bindings/clock/mvebu-corediv-clock.txt b/dts/Bindings/clock/mvebu-corediv-clock.txt new file mode 100644 index 0000000000..520562a7dc --- /dev/null +++ b/dts/Bindings/clock/mvebu-corediv-clock.txt @@ -0,0 +1,22 @@ +* Core Divider Clock bindings for Marvell MVEBU SoCs + +The following is a list of provided IDs and clock names on Armada 370/XP: + 0 = nand (NAND clock) + +Required properties: +- compatible : must be "marvell,armada-370-corediv-clock", + "marvell,armada-375-corediv-clock", + "marvell,armada-380-corediv-clock", + +- reg : must be the register address of Core Divider control register +- #clock-cells : from common clock binding; shall be set to 1 +- clocks : must be set to the parent's phandle + +Example: + +corediv_clk: corediv-clocks@18740 { + compatible = "marvell,armada-370-corediv-clock"; + reg = <0x18740 0xc>; + #clock-cells = <1>; + clocks = <&pll>; +}; |