diff options
| author | Sascha Hauer <s.hauer@pengutronix.de> | 2017-01-10 08:26:15 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2017-01-10 08:48:45 +0100 |
| commit | a40531fb3c11dc4ee8cca43c91b471da1fd3c1ab (patch) | |
| tree | 35f886d87a77df7bac8a587a04647691db541a2e /dts/src/arm/socfpga_cyclone5_socdk.dts | |
| parent | 81462901ce3d677ce318150f7027e2ce1cf97c41 (diff) | |
| download | barebox-a40531fb3c11dc4ee8cca43c91b471da1fd3c1ab.tar.gz barebox-a40531fb3c11dc4ee8cca43c91b471da1fd3c1ab.tar.xz | |
dts: update to v4.10-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm/socfpga_cyclone5_socdk.dts')
| -rw-r--r-- | dts/src/arm/socfpga_cyclone5_socdk.dts | 35 |
1 files changed, 34 insertions, 1 deletions
diff --git a/dts/src/arm/socfpga_cyclone5_socdk.dts b/dts/src/arm/socfpga_cyclone5_socdk.dts index 15e43f43f2..6306d008f0 100644 --- a/dts/src/arm/socfpga_cyclone5_socdk.dts +++ b/dts/src/arm/socfpga_cyclone5_socdk.dts @@ -19,7 +19,7 @@ / { model = "Altera SOCFPGA Cyclone V SoC Development Kit"; - compatible = "altr,socfpga-cyclone5", "altr,socfpga"; + compatible = "altr,socfpga-cyclone5-socdk", "altr,socfpga-cyclone5", "altr,socfpga"; chosen { bootargs = "earlyprintk"; @@ -87,6 +87,39 @@ status = "okay"; }; +&qspi { + status = "okay"; + + flash0: n25q00@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "n25q00"; + reg = <0>; /* chip select */ + spi-max-frequency = <100000000>; + + m25p,fast-read; + cdns,page-size = <256>; + cdns,block-size = <16>; + cdns,read-delay = <4>; + cdns,tshsl-ns = <50>; + cdns,tsd2d-ns = <50>; + cdns,tchsh-ns = <4>; + cdns,tslch-ns = <4>; + + partition@qspi-boot { + /* 8MB for raw data. */ + label = "Flash 0 Raw Data"; + reg = <0x0 0x800000>; + }; + + partition@qspi-rootfs { + /* 120MB for jffs2 data. */ + label = "Flash 0 jffs2 Filesystem"; + reg = <0x800000 0x7800000>; + }; + }; +}; + &usb1 { status = "okay"; }; |