summaryrefslogtreecommitdiffstats
path: root/dts/src/arm/stm32mp151.dtsi
diff options
context:
space:
mode:
authorSascha Hauer <s.hauer@pengutronix.de>2020-04-20 15:07:38 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2020-04-27 21:17:17 +0200
commit8d158e1a40917e48cb68131a6cfd1b8755a4d8a0 (patch)
tree76118ca8fbf736bbdbc30b9fa2480a0d2a775597 /dts/src/arm/stm32mp151.dtsi
parent15d46bac2280def447c7fd74686d44d938c24556 (diff)
downloadbarebox-8d158e1a40917e48cb68131a6cfd1b8755a4d8a0.tar.gz
barebox-8d158e1a40917e48cb68131a6cfd1b8755a4d8a0.tar.xz
dts: update to v5.7-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm/stm32mp151.dtsi')
-rw-r--r--dts/src/arm/stm32mp151.dtsi16
1 files changed, 15 insertions, 1 deletions
diff --git a/dts/src/arm/stm32mp151.dtsi b/dts/src/arm/stm32mp151.dtsi
index fb41d0778b..3ea05ba482 100644
--- a/dts/src/arm/stm32mp151.dtsi
+++ b/dts/src/arm/stm32mp151.dtsi
@@ -17,6 +17,7 @@
cpu0: cpu@0 {
compatible = "arm,cortex-a7";
+ clock-frequency = <650000000>;
device_type = "cpu";
reg = <0>;
};
@@ -483,6 +484,7 @@
resets = <&rcc I2C1_R>;
#address-cells = <1>;
#size-cells = <0>;
+ wakeup-source;
status = "disabled";
};
@@ -496,6 +498,7 @@
resets = <&rcc I2C2_R>;
#address-cells = <1>;
#size-cells = <0>;
+ wakeup-source;
status = "disabled";
};
@@ -509,6 +512,7 @@
resets = <&rcc I2C3_R>;
#address-cells = <1>;
#size-cells = <0>;
+ wakeup-source;
status = "disabled";
};
@@ -522,6 +526,7 @@
resets = <&rcc I2C5_R>;
#address-cells = <1>;
#size-cells = <0>;
+ wakeup-source;
status = "disabled";
};
@@ -959,6 +964,7 @@
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc DMA1>;
+ resets = <&rcc DMA1_R>;
#dma-cells = <4>;
st,mem2mem;
dma-requests = <8>;
@@ -976,6 +982,7 @@
<GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc DMA2>;
+ resets = <&rcc DMA2_R>;
#dma-cells = <4>;
st,mem2mem;
dma-requests = <8>;
@@ -989,6 +996,7 @@
dma-masters = <&dma1 &dma2>;
dma-channels = <16>;
clocks = <&rcc DMAMUX>;
+ resets = <&rcc DMAMUX_R>;
};
adc: adc@48003000 {
@@ -1044,7 +1052,7 @@
};
usbotg_hs: usb-otg@49000000 {
- compatible = "snps,dwc2";
+ compatible = "st,stm32mp15-hsotg", "snps,dwc2";
reg = <0x49000000 0x10000>;
clocks = <&rcc USBO_K>;
clock-names = "otg";
@@ -1055,6 +1063,7 @@
g-np-tx-fifo-size = <32>;
g-tx-fifo-size = <128 128 64 64 64 64 32 32>;
dr_mode = "otg";
+ usb33d-supply = <&usb33>;
status = "disabled";
};
@@ -1280,6 +1289,7 @@
reg = <0x58000000 0x1000>;
interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc MDMA>;
+ resets = <&rcc MDMA_R>;
#dma-cells = <5>;
dma-channels = <32>;
dma-requests = <48>;
@@ -1369,10 +1379,12 @@
clock-names = "stmmaceth",
"mac-clk-tx",
"mac-clk-rx",
+ "eth-ck",
"ethstp";
clocks = <&rcc ETHMAC>,
<&rcc ETHTX>,
<&rcc ETHRX>,
+ <&rcc ETHCK_K>,
<&rcc ETHSTP>;
st,syscon = <&syscfg 0x4>;
snps,mixed-burst;
@@ -1473,6 +1485,7 @@
resets = <&rcc I2C4_R>;
#address-cells = <1>;
#size-cells = <0>;
+ wakeup-source;
status = "disabled";
};
@@ -1508,6 +1521,7 @@
resets = <&rcc I2C6_R>;
#address-cells = <1>;
#size-cells = <0>;
+ wakeup-source;
status = "disabled";
};