diff options
author | Sascha Hauer <s.hauer@pengutronix.de> | 2014-04-25 11:22:32 +0200 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2014-04-28 09:08:46 +0200 |
commit | 00ce25c6dcdae5582ae4be37147ab33678adc995 (patch) | |
tree | 41c93102ae304a61738c31353e3cb5336ef0b297 /dts/src/arm/xenvm-4.2.dts | |
parent | 0af79fbb6779921d3f1962773adb7fb57d3c89d4 (diff) | |
download | barebox-00ce25c6dcdae5582ae4be37147ab33678adc995.tar.gz barebox-00ce25c6dcdae5582ae4be37147ab33678adc995.tar.xz |
Add devicetree source files as of Linux-3.15-rc2
This adds the Linux dts files to barebox. The dts files are
generated from Ian Campbells device-tree-rebasing.git:
git://xenbits.xen.org/people/ianc/device-tree-rebasing.git
The dts are found in dts/ in the barebox repository and
will be updated from upstream regularly, probably for each upstream
-rc.
To keep the synchronization with upstream easy no changes to
the original files are allowed under dts/. Instead changes to
upstream dts files will be done using overlays in arch/$ARCH/dts/.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm/xenvm-4.2.dts')
-rw-r--r-- | dts/src/arm/xenvm-4.2.dts | 81 |
1 files changed, 81 insertions, 0 deletions
diff --git a/dts/src/arm/xenvm-4.2.dts b/dts/src/arm/xenvm-4.2.dts new file mode 100644 index 0000000000..3369151513 --- /dev/null +++ b/dts/src/arm/xenvm-4.2.dts @@ -0,0 +1,81 @@ +/* + * Xen Virtual Machine for unprivileged guests + * + * Based on ARM Ltd. Versatile Express CoreTile Express (single CPU) + * Cortex-A15 MPCore (V2P-CA15) + * + */ + +/dts-v1/; + +/ { + model = "XENVM-4.2"; + compatible = "xen,xenvm-4.2", "xen,xenvm"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + chosen { + /* this field is going to be adjusted by the hypervisor */ + bootargs = "console=hvc0 root=/dev/xvda"; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <1>; + }; + }; + + psci { + compatible = "arm,psci"; + method = "hvc"; + cpu_off = <1>; + cpu_on = <2>; + }; + + memory@80000000 { + device_type = "memory"; + /* this field is going to be adjusted by the hypervisor */ + reg = <0 0x80000000 0 0x08000000>; + }; + + gic: interrupt-controller@2c001000 { + compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0 0x2c001000 0 0x1000>, + <0 0x2c002000 0 0x100>; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupts = <1 13 0xf08>, + <1 14 0xf08>, + <1 11 0xf08>, + <1 10 0xf08>; + }; + + hypervisor { + compatible = "xen,xen-4.2", "xen,xen"; + /* this field is going to be adjusted by the hypervisor */ + reg = <0 0xb0000000 0 0x20000>; + /* this field is going to be adjusted by the hypervisor */ + interrupts = <1 15 0xf08>; + }; + + motherboard { + arm,v2m-memory-map = "rs1"; + }; +}; |