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author | Sascha Hauer <s.hauer@pengutronix.de> | 2021-11-17 07:36:09 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2021-11-17 07:36:09 +0100 |
commit | 3f2f5980d517b6a71ffe54e615bd3a4b58b1c295 (patch) | |
tree | eb5a7bfce811d20e58dd0eb1add0f6cf0e6b86e0 /dts/src/arm64/freescale/imx8mm-kontron-n801x-s.dts | |
parent | 81ceab95360295cef146e89a1cd1cd5e590aa75e (diff) | |
download | barebox-3f2f5980d517b6a71ffe54e615bd3a4b58b1c295.tar.gz barebox-3f2f5980d517b6a71ffe54e615bd3a4b58b1c295.tar.xz |
dts: update to v5.16-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm64/freescale/imx8mm-kontron-n801x-s.dts')
-rw-r--r-- | dts/src/arm64/freescale/imx8mm-kontron-n801x-s.dts | 32 |
1 files changed, 29 insertions, 3 deletions
diff --git a/dts/src/arm64/freescale/imx8mm-kontron-n801x-s.dts b/dts/src/arm64/freescale/imx8mm-kontron-n801x-s.dts index e99e7644ff..d40caf14ac 100644 --- a/dts/src/arm64/freescale/imx8mm-kontron-n801x-s.dts +++ b/dts/src/arm64/freescale/imx8mm-kontron-n801x-s.dts @@ -123,8 +123,8 @@ ethphy: ethernet-phy@0 { reg = <0>; - reset-assert-us = <100>; - reset-deassert-us = <100>; + reset-assert-us = <1>; + reset-deassert-us = <15000>; reset-gpios = <&gpio4 27 GPIO_ACTIVE_LOW>; }; }; @@ -191,8 +191,10 @@ }; &usdhc2 { - pinctrl-names = "default"; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc2>; + pinctrl-1 = <&pinctrl_usdhc2_100mhz>; + pinctrl-2 = <&pinctrl_usdhc2_200mhz>; vmmc-supply = <®_vdd_3v3>; vqmmc-supply = <®_nvcc_sd>; cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; @@ -321,4 +323,28 @@ MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019 >; }; + + pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { + fsl,pins = < + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 + MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019 + >; + }; + + pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { + fsl,pins = < + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 + MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019 + >; + }; }; |