diff options
author | Sascha Hauer <s.hauer@pengutronix.de> | 2018-02-27 09:40:19 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-03-01 14:29:51 +0100 |
commit | a9c5f6b9ec883ee9dafd6d393600acc6fd263043 (patch) | |
tree | 35621cff332a0c95509b04b2e4170f0eda1f0ecf /dts/src/arm64/marvell/armada-7040-db.dts | |
parent | 5ba0e42cb24afdf59d48930daf495c148312fc67 (diff) | |
download | barebox-a9c5f6b9ec883ee9dafd6d393600acc6fd263043.tar.gz barebox-a9c5f6b9ec883ee9dafd6d393600acc6fd263043.tar.xz |
dts: update to v4.16-rc1
Also includeded:
ARM: dts: am33xx: do not delete no longer existing clocks
Several clocks are removed from the am33xx dts files with v4.16-rc1.
Remove the corresponding /delete-node/ directives aswell to avoid
dtc breakage.
Also included:
ARM: dts: imx6qdl: SolidRun: Fix upstream include
Upstream dts file way renamed, so change include name accordingly.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm64/marvell/armada-7040-db.dts')
-rw-r--r-- | dts/src/arm64/marvell/armada-7040-db.dts | 52 |
1 files changed, 29 insertions, 23 deletions
diff --git a/dts/src/arm64/marvell/armada-7040-db.dts b/dts/src/arm64/marvell/armada-7040-db.dts index 52b5341cb2..3ae05eee2c 100644 --- a/dts/src/arm64/marvell/armada-7040-db.dts +++ b/dts/src/arm64/marvell/armada-7040-db.dts @@ -61,7 +61,13 @@ reg = <0x0 0x0 0x0 0x80000000>; }; - cpm_reg_usb3_0_vbus: cpm-usb3-0-vbus { + aliases { + ethernet0 = &cp0_eth0; + ethernet1 = &cp0_eth1; + ethernet2 = &cp0_eth2; + }; + + cp0_reg_usb3_0_vbus: cp0-usb3-0-vbus { compatible = "regulator-fixed"; regulator-name = "usb3h0-vbus"; regulator-min-microvolt = <5000000>; @@ -70,7 +76,7 @@ gpio = <&expander0 0 GPIO_ACTIVE_HIGH>; }; - cpm_reg_usb3_1_vbus: cpm-usb3-1-vbus { + cp0_reg_usb3_1_vbus: cp0-usb3-1-vbus { compatible = "regulator-fixed"; regulator-name = "usb3h1-vbus"; regulator-min-microvolt = <5000000>; @@ -79,14 +85,14 @@ gpio = <&expander0 1 GPIO_ACTIVE_HIGH>; }; - cpm_usb3_0_phy: cpm-usb3-0-phy { + cp0_usb3_0_phy: cp0-usb3-0-phy { compatible = "usb-nop-xceiv"; - vcc-supply = <&cpm_reg_usb3_0_vbus>; + vcc-supply = <&cp0_reg_usb3_0_vbus>; }; - cpm_usb3_1_phy: cpm-usb3-1-phy { + cp0_usb3_1_phy: cp0-usb3-1-phy { compatible = "usb-nop-xceiv"; - vcc-supply = <&cpm_reg_usb3_1_vbus>; + vcc-supply = <&cp0_reg_usb3_1_vbus>; }; }; @@ -129,11 +135,11 @@ }; -&cpm_pcie2 { +&cp0_pcie2 { status = "okay"; }; -&cpm_i2c0 { +&cp0_i2c0 { status = "okay"; clock-frequency = <100000>; @@ -156,7 +162,7 @@ }; }; -&cpm_nand { +&cp0_nand { /* * SPI on CPM and NAND have common pins on this board. We can * use only one at a time. To enable the NAND (whihch will @@ -186,7 +192,7 @@ }; -&cpm_spi1 { +&cp0_spi1 { status = "okay"; spi-flash@0 { @@ -214,17 +220,17 @@ }; }; -&cpm_sata0 { +&cp0_sata0 { status = "okay"; }; -&cpm_usb3_0 { - usb-phy = <&cpm_usb3_0_phy>; +&cp0_usb3_0 { + usb-phy = <&cp0_usb3_0_phy>; status = "okay"; }; -&cpm_usb3_1 { - usb-phy = <&cpm_usb3_1_phy>; +&cp0_usb3_1 { + usb-phy = <&cp0_usb3_1_phy>; status = "okay"; }; @@ -235,14 +241,14 @@ non-removable; }; -&cpm_sdhci0 { +&cp0_sdhci0 { status = "okay"; bus-width = <4>; no-1-8-v; cd-gpios = <&expander0 12 GPIO_ACTIVE_LOW>; }; -&cpm_mdio { +&cp0_mdio { status = "okay"; phy0: ethernet-phy@0 { @@ -253,28 +259,28 @@ }; }; -&cpm_ethernet { +&cp0_ethernet { status = "okay"; }; -&cpm_eth0 { +&cp0_eth0 { status = "okay"; /* Network PHY */ phy-mode = "10gbase-kr"; /* Generic PHY, providing serdes lanes */ - phys = <&cpm_comphy2 0>; + phys = <&cp0_comphy2 0>; }; -&cpm_eth1 { +&cp0_eth1 { status = "okay"; /* Network PHY */ phy = <&phy0>; phy-mode = "sgmii"; /* Generic PHY, providing serdes lanes */ - phys = <&cpm_comphy0 1>; + phys = <&cp0_comphy0 1>; }; -&cpm_eth2 { +&cp0_eth2 { status = "okay"; phy = <&phy1>; phy-mode = "rgmii-id"; |