summaryrefslogtreecommitdiffstats
path: root/dts/src/mips/ingenic/gcw0.dts
diff options
context:
space:
mode:
authorSascha Hauer <s.hauer@pengutronix.de>2019-10-15 10:55:58 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2019-10-15 10:55:58 +0200
commit2036f2866753a28b2783ad6dc78a40ca5345e6d8 (patch)
tree468b1c17b06a2377c5f8e6d711d8f3187f60667f /dts/src/mips/ingenic/gcw0.dts
parent785f926d4527184194b6424bc39ce367e2cea7d8 (diff)
downloadbarebox-2036f2866753a28b2783ad6dc78a40ca5345e6d8.tar.gz
barebox-2036f2866753a28b2783ad6dc78a40ca5345e6d8.tar.xz
dts: update to v5.4-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/mips/ingenic/gcw0.dts')
-rw-r--r--dts/src/mips/ingenic/gcw0.dts10
1 files changed, 10 insertions, 0 deletions
diff --git a/dts/src/mips/ingenic/gcw0.dts b/dts/src/mips/ingenic/gcw0.dts
index 35f0291e8d..f58d239c20 100644
--- a/dts/src/mips/ingenic/gcw0.dts
+++ b/dts/src/mips/ingenic/gcw0.dts
@@ -2,6 +2,7 @@
/dts-v1/;
#include "jz4770.dtsi"
+#include <dt-bindings/clock/ingenic,tcu.h>
/ {
compatible = "gcw,zero", "ingenic,jz4770";
@@ -60,3 +61,12 @@
/* The WiFi module is connected to the UHC. */
status = "okay";
};
+
+&tcu {
+ /* 750 kHz for the system timer and clocksource */
+ assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER2>;
+ assigned-clock-rates = <750000>, <750000>;
+
+ /* PWM1 is in use, so reserve channel #2 for the clocksource */
+ ingenic,pwm-channels-mask = <0xfa>;
+};