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authorSascha Hauer <s.hauer@pengutronix.de>2022-06-29 09:01:05 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2022-06-29 09:01:05 +0200
commitcc9b06f0c8f11c56fc706614ff96d237eecefd45 (patch)
tree2d7505353c924ff2e526f311582b4eaabaa5d840 /include
parent97afea15a9f2f09c3009ad6e94ca9b40cc95b33a (diff)
parent6f4f30b9c1fbd20ebf1b05843cf344fa2bb35f65 (diff)
downloadbarebox-cc9b06f0c8f11c56fc706614ff96d237eecefd45.tar.gz
barebox-cc9b06f0c8f11c56fc706614ff96d237eecefd45.tar.xz
Merge branch 'for-next/rpi4'
Diffstat (limited to 'include')
-rw-r--r--include/dma.h34
-rw-r--r--include/soc/bcm283x/wdt.h40
2 files changed, 74 insertions, 0 deletions
diff --git a/include/dma.h b/include/dma.h
index 90f9254ea8..2c4bdfc98f 100644
--- a/include/dma.h
+++ b/include/dma.h
@@ -56,15 +56,49 @@ static inline int dma_mapping_error(struct device_d *dev, dma_addr_t dma_addr)
(dev->dma_mask && dma_addr > dev->dma_mask);
}
+#ifndef __PBL__
/* streaming DMA - implement the below calls to support HAS_DMA */
+#ifndef dma_sync_single_for_cpu
void dma_sync_single_for_cpu(dma_addr_t address, size_t size,
enum dma_data_direction dir);
+#endif
+#ifndef dma_sync_single_for_device
void dma_sync_single_for_device(dma_addr_t address, size_t size,
enum dma_data_direction dir);
+#endif
+#else
+#ifndef dma_sync_single_for_cpu
+/*
+ * assumes buffers are in coherent/uncached memory, e.g. because
+ * MMU is only enabled in barebox_arm_entry which hasn't run yet.
+ */
+static inline void dma_sync_single_for_cpu(dma_addr_t address, size_t size,
+ enum dma_data_direction dir)
+{
+ barrier_data((void *)address);
+}
+#endif
+#ifndef dma_sync_single_for_device
+static inline void dma_sync_single_for_device(dma_addr_t address, size_t size,
+ enum dma_data_direction dir)
+{
+ barrier_data((void *)address);
+}
+#endif
+#endif
+
+#ifndef dma_alloc_coherent
void *dma_alloc_coherent(size_t size, dma_addr_t *dma_handle);
+#endif
+
+#ifndef dma_free_coherent
void dma_free_coherent(void *mem, dma_addr_t dma_handle, size_t size);
+#endif
+
+#ifndef dma_alloc_writecombine
void *dma_alloc_writecombine(size_t size, dma_addr_t *dma_handle);
+#endif
#endif /* __DMA_H */
diff --git a/include/soc/bcm283x/wdt.h b/include/soc/bcm283x/wdt.h
new file mode 100644
index 0000000000..ce97b1eb5d
--- /dev/null
+++ b/include/soc/bcm283x/wdt.h
@@ -0,0 +1,40 @@
+/*
+ * Copyright (C) 2017 Pengutronix, Lucas Stach <l.stach@pengutronix.de>
+ *
+ * Based on code from Carlo Caione <carlo@carlocaione.org>
+ */
+
+#ifndef __BCM2835_WDT_H
+#define __BCM2835_WDT_H
+
+#define PM_RSTC 0x1c
+#define PM_RSTS 0x20
+#define PM_WDOG 0x24
+
+#define PM_WDOG_RESET 0000000000
+#define PM_PASSWORD 0x5a000000
+#define PM_WDOG_TIME_SET 0x000fffff
+#define PM_RSTC_WRCFG_CLR 0xffffffcf
+#define PM_RSTC_WRCFG_SET 0x00000030
+#define PM_RSTC_WRCFG_FULL_RESET 0x00000020
+#define PM_RSTC_RESET 0x00000102
+
+#define PM_RSTS_HADPOR_SET 0x00001000
+#define PM_RSTS_HADSRH_SET 0x00000400
+#define PM_RSTS_HADSRF_SET 0x00000200
+#define PM_RSTS_HADSRQ_SET 0x00000100
+#define PM_RSTS_HADWRH_SET 0x00000040
+#define PM_RSTS_HADWRF_SET 0x00000020
+#define PM_RSTS_HADWRQ_SET 0x00000010
+#define PM_RSTS_HADDRH_SET 0x00000004
+#define PM_RSTS_HADDRF_SET 0x00000002
+#define PM_RSTS_HADDRQ_SET 0x00000001
+
+#define PM_RSTS_HADDR_SET \
+ (PM_RSTS_HADDRQ_SET | PM_RSTS_HADDRF_SET | PM_RSTS_HADDRH_SET)
+#define PM_RSTS_HADWR_SET \
+ (PM_RSTS_HADWRQ_SET | PM_RSTS_HADWRF_SET | PM_RSTS_HADWRH_SET)
+#define PM_RSTS_HADSR_SET \
+ (PM_RSTS_HADSRQ_SET | PM_RSTS_HADSRF_SET | PM_RSTS_HADSRH_SET)
+
+#endif