diff options
Diffstat (limited to 'arch/arm/boards/nxp-imx8mm-evk/lowlevel.c')
| -rw-r--r-- | arch/arm/boards/nxp-imx8mm-evk/lowlevel.c | 161 |
1 files changed, 70 insertions, 91 deletions
diff --git a/arch/arm/boards/nxp-imx8mm-evk/lowlevel.c b/arch/arm/boards/nxp-imx8mm-evk/lowlevel.c index c2f6206cfd..881d8285b6 100644 --- a/arch/arm/boards/nxp-imx8mm-evk/lowlevel.c +++ b/arch/arm/boards/nxp-imx8mm-evk/lowlevel.c @@ -3,27 +3,23 @@ #include <io.h> #include <common.h> #include <debug_ll.h> -#include <firmware.h> +#include <mach/imx/debug_ll.h> #include <asm/mmu.h> #include <asm/cache.h> -#include <asm/sections.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> -#include <i2c/i2c-early.h> +#include <pbl/i2c.h> +#include <pbl/pmic.h> #include <linux/sizes.h> -#include <mach/atf.h> -#include <mach/xload.h> -#include <mach/esdctl.h> -#include <mach/generic.h> -#include <mach/imx8mm-regs.h> -#include <mach/iomux-mx8mm.h> -#include <mach/imx8m-ccm-regs.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx8mm-regs.h> +#include <mach/imx/iomux-mx8mm.h> +#include <mach/imx/imx8m-ccm-regs.h> #include <mfd/bd71837.h> +#include <mfd/pca9450.h> +#include <mach/imx/xload.h> #include <soc/imx8m/ddr.h> -#include <soc/fsl/fsl_udc.h> -#include <image-metadata.h> - -extern char __dtb_imx8mm_evk_start[]; #define UART_PAD_CTRL MUX_PAD_CTRL(PAD_CTL_DSE_3P3V_45_OHM) @@ -41,66 +37,66 @@ static void setup_uart(void) putc_ll('>'); } -static void pmic_reg_write(void *i2c, int reg, uint8_t val) -{ - int ret; - u8 buf[32]; - struct i2c_msg msgs[] = { - { - .addr = 0x4b, - .buf = buf, - }, - }; - - buf[0] = reg; - buf[1] = val; - - msgs[0].len = 2; - - ret = i2c_fsl_xfer(i2c, msgs, ARRAY_SIZE(msgs)); - if (ret != 1) - pr_err("Failed to write to pmic\n"); -} +static struct pmic_config pca9450_cfg[] = { + /* BUCKxOUT_DVS0/1 control BUCK123 output */ + { PCA9450_BUCK123_DVS, 0x29 }, -static int power_init_board(void) -{ - void *i2c; + /* Buck 1 DVS control through PMIC_STBY_REQ */ + { PCA9450_BUCK1CTRL, 0x59 }, - imx8mm_setup_pad(IMX8MM_PAD_I2C1_SCL_I2C1_SCL); - imx8mm_setup_pad(IMX8MM_PAD_I2C1_SDA_I2C1_SDA); + /* Set DVS1 to 0.8v for suspend */ + { PCA9450_BUCK1OUT_DVS1, 0x10 }, - imx8mm_early_clock_init(); - imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_I2C1); + /* increase VDD_DRAM to 0.95v for 3Ghz DDR */ + { PCA9450_BUCK3OUT_DVS0, 0x1c }, - i2c = imx8m_i2c_early_init(IOMEM(MX8MQ_I2C1_BASE_ADDR)); + /* + * VDD_DRAM needs off in suspend, set B1_ENMODE=10 + * (ON by PMIC_ON_REQ = H && PMIC_STBY_REQ = L) + */ + { PCA9450_BUCK3CTRL, 0x4a }, - /* decrease RESET key long push time from the default 10s to 10ms */ - pmic_reg_write(i2c, BD718XX_PWRONCONFIG1, 0x0); + /* set VDD_SNVS_0V8 from default 0.85V */ + { PCA9450_LDO2CTRL, 0xc0 }, - /* unlock the PMIC regs */ - pmic_reg_write(i2c, BD718XX_REGLOCK, 0x1); + /* set WDOG_B_CFG to cold reset */ + { PCA9450_RESET_CTRL, 0xa1 }, +}; +static struct pmic_config bd71837_cfg[] = { + /* decrease RESET key long push time from the default 10s to 10ms */ + { BD718XX_PWRONCONFIG1, 0x0 }, + /* unlock the PMIC regs */ + { BD718XX_REGLOCK, 0x1 }, /* increase VDD_SOC to typical value 0.85v before first DRAM access */ - pmic_reg_write(i2c, BD718XX_BUCK1_VOLT_RUN, 0x0f); - + { BD718XX_BUCK1_VOLT_RUN, 0x0f }, /* increase VDD_DRAM to 0.975v for 3Ghz DDR */ - pmic_reg_write(i2c, BD718XX_1ST_NODVS_BUCK_VOLT, 0x83); - + { BD718XX_1ST_NODVS_BUCK_VOLT, 0x83 }, /* lock the PMIC regs */ - pmic_reg_write(i2c, BD718XX_REGLOCK, 0x11); + { BD718XX_REGLOCK, 0x11 }, +}; + +static void power_init_board(void) +{ + struct pbl_i2c *i2c; - return 0; + imx8mm_setup_pad(IMX8MM_PAD_I2C1_SCL_I2C1_SCL); + imx8mm_setup_pad(IMX8MM_PAD_I2C1_SDA_I2C1_SDA); + + imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_I2C1); + + i2c = imx8m_i2c_early_init(IOMEM(MX8MQ_I2C1_BASE_ADDR)); + + if (i2c_dev_probe(i2c, 0x25, true) == 0) + pmic_configure(i2c, 0x25, pca9450_cfg, ARRAY_SIZE(pca9450_cfg)); + else + pmic_configure(i2c, 0x4b, bd71837_cfg, ARRAY_SIZE(bd71837_cfg)); } extern struct dram_timing_info imx8mm_evk_dram_timing; static void start_atf(void) { - size_t bl31_size; - const u8 *bl31; - enum bootsource src; - int instance; - /* * If we are in EL3 we are running for the first time and need to * initialize the DRAM and run TF-A (BL31). The TF-A will then jump @@ -109,38 +105,11 @@ static void start_atf(void) if (current_el() != 3) return; + imx8mm_early_clock_init(); power_init_board(); - imx8mm_ddr_init(&imx8mm_evk_dram_timing); - - imx8mm_get_boot_source(&src, &instance); - switch (src) { - case BOOTSOURCE_MMC: - imx8m_esdhc_load_image(instance, false); - break; - case BOOTSOURCE_SERIAL: - imx8mm_barebox_load_usb((void *)MX8M_ATF_BL33_BASE_ADDR); - break; - default: - printf("Unhandled bootsource BOOTSOURCE_%d\n", src); - hang(); - } + imx8mm_ddr_init(&imx8mm_evk_dram_timing, DRAM_TYPE_LPDDR4); - /* - * On completion the TF-A will jump to MX8M_ATF_BL33_BASE_ADDR - * in EL2. Copy the image there, but replace the PBL part of - * that image with ourselves. On a high assurance boot only the - * currently running code is validated and contains the checksum - * for the piggy data, so we need to ensure that we are running - * the same code in DRAM. - */ - memcpy((void *)MX8M_ATF_BL33_BASE_ADDR, - __image_start, barebox_pbl_size); - - get_builtin_firmware(imx8mm_bl31_bin, &bl31, &bl31_size); - - imx8mm_atf_load_bl31(bl31, bl31_size); - - /* not reached */ + imx8mm_load_and_start_image_via_tfa(); } /* @@ -161,14 +130,26 @@ static void start_atf(void) */ static __noreturn noinline void nxp_imx8mm_evk_start(void) { + extern char __dtb_z_imx8mm_evk_start[], __dtb_z_imx8mm_evkb_start[]; + struct pbl_i2c *i2c; + void *fdt; + setup_uart(); start_atf(); /* - * Standard entry we hit once we initialized both DDR and ATF + * Standard entry we hit once we initialized both DDR and ATF. I2C pad + * and clock setup already done during power_init_board(). */ - imx8mm_barebox_entry(__dtb_imx8mm_evk_start); + i2c = imx8m_i2c_early_init(IOMEM(MX8MQ_I2C1_BASE_ADDR)); + + if (i2c_dev_probe(i2c, 0x25, true) == 0) + fdt = __dtb_z_imx8mm_evkb_start; + else + fdt = __dtb_z_imx8mm_evk_start; + + imx8mm_barebox_entry(fdt); } ENTRY_FUNCTION(start_nxp_imx8mm_evk, r0, r1, r2) @@ -178,7 +159,5 @@ ENTRY_FUNCTION(start_nxp_imx8mm_evk, r0, r1, r2) relocate_to_current_adr(); setup_c(); - IMD_USED_OF(imx8mm_evk); - nxp_imx8mm_evk_start(); } |