5 files changed, 7 insertions, 6 deletions
diff --git a/arch/arm/boards/friendlyarm-tiny210/lowlevel.c b/arch/arm/boards/friendlyarm-tiny210/lowlevel.c
index 4b9ba87d70..290cf57225 100644
--- a/arch/arm/boards/friendlyarm-tiny210/lowlevel.c
+++ b/arch/arm/boards/friendlyarm-tiny210/lowlevel.c
@@ -53,7 +53,8 @@ static inline void __bare_init debug_led(int led, bool state)
 #define ADDR_V210_SDMMC_BASE	0xD0037488
 #define ADDR_CopySDMMCtoMem	0xD0037F98
 
-int __bare_init s5p_irom_load_mmc(void *dest, uint32_t start_block, uint16_t block_count)
+static int __bare_init s5p_irom_load_mmc(void *dest, uint32_t start_block,
+					 uint16_t block_count)
 {
 	typedef uint32_t (*func_t) (int32_t, uint32_t, uint16_t, uint32_t*, int8_t);
 	uint32_t chbase = readl(ADDR_V210_SDMMC_BASE);
diff --git a/arch/arm/boards/imx233-olinuxino/lowlevel.c b/arch/arm/boards/imx233-olinuxino/lowlevel.c
index 5f36c17e52..07a2a0e293 100644
--- a/arch/arm/boards/imx233-olinuxino/lowlevel.c
+++ b/arch/arm/boards/imx233-olinuxino/lowlevel.c
@@ -115,7 +115,7 @@ static const uint32_t pad_setup[] = {
 
 
 /* Fine-tune the DRAM configuration. */
-void imx23_olinuxino_adjust_memory_params(uint32_t *dram_vals)
+static void imx23_olinuxino_adjust_memory_params(uint32_t *dram_vals)
 {
 	/* Enable Auto Precharge. */
 	dram_vals[3] |= 1 << 8;
diff --git a/arch/arm/boards/kindle3/kindle3.c b/arch/arm/boards/kindle3/kindle3.c
index e06b3d70ce..5f1b06aeb2 100644
--- a/arch/arm/boards/kindle3/kindle3.c
+++ b/arch/arm/boards/kindle3/kindle3.c
@@ -86,7 +86,7 @@ BAREBOX_MAGICVAR_NAMED(global_atags_revision16, global.board.revision16,
 /* The Kindle3 Kernel expects two custom ATAGs, ATAG_REVISION16 describing
  * the board and ATAG_SERIAL16 to identify the individual device.
  */
-struct tag *kindle3_append_atags(struct tag *params)
+static struct tag *kindle3_append_atags(struct tag *params)
 {
 	params = setup_16char_tag(params, ATAG_SERIAL16,
 				get_env_16char_tag("global.board.serial16"));
diff --git a/arch/arm/boards/phytec-phycard-imx27/lowlevel.c b/arch/arm/boards/phytec-phycard-imx27/lowlevel.c
index 1e96c0893f..09994e4492 100644
--- a/arch/arm/boards/phytec-phycard-imx27/lowlevel.c
+++ b/arch/arm/boards/phytec-phycard-imx27/lowlevel.c
@@ -77,7 +77,7 @@ static void sdram_init(int sdram)
 			MX27_ESDCTL_BASE_ADDR + IMX_ESDCTL0);
 }
 
-void __bare_init __naked phytec_phycard_imx27_common_init(void *fdt, int sdram)
+static void __bare_init __naked phytec_phycard_imx27_common_init(void *fdt, int sdram)
 {
 	unsigned long r;
 
diff --git a/arch/arm/boards/phytec-phycard-omap3/lowlevel.c b/arch/arm/boards/phytec-phycard-omap3/lowlevel.c
index 27b56b1e0c..d48c02625c 100644
--- a/arch/arm/boards/phytec-phycard-omap3/lowlevel.c
+++ b/arch/arm/boards/phytec-phycard-omap3/lowlevel.c
@@ -48,7 +48,7 @@ struct sdrc_config {
 /*********************************************************************
  * init_sdram_ddr() - Init DDR controller.
  *********************************************************************/
-void init_sdram_ddr(void)
+static void init_sdram_ddr(void)
 {
 	/* reset sdrc controller */
 	writel(SOFTRESET, OMAP3_SDRC_REG(SYSCONFIG));
@@ -67,7 +67,7 @@ void init_sdram_ddr(void)
 /*********************************************************************
  * config_sdram_ddr() - Init DDR on dev board.
  *********************************************************************/
-void config_sdram_ddr(u8 cs, u8 cfg)
+static void config_sdram_ddr(u8 cs, u8 cfg)
 {
 
 	writel(sdrc_config[cfg].mcfg, OMAP3_SDRC_REG(MCFG_0) + (0x30 * cs));