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-rw-r--r--arch/arm/boards/Makefile2
-rw-r--r--arch/arm/boards/animeo_ip/init.c23
-rw-r--r--arch/arm/boards/at91rm9200ek/config.h26
-rw-r--r--arch/arm/boards/at91rm9200ek/init.c1
-rw-r--r--arch/arm/boards/at91rm9200ek/lowlevel.c44
-rw-r--r--arch/arm/boards/at91sam9260ek/init.c22
-rw-r--r--arch/arm/boards/at91sam9261ek/init.c1
-rw-r--r--arch/arm/boards/at91sam9261ek/lowlevel_init.c6
-rw-r--r--arch/arm/boards/at91sam9263ek/init.c1
-rw-r--r--arch/arm/boards/at91sam9263ek/lowlevel_init.c8
-rw-r--r--arch/arm/boards/at91sam9263ek/of_init.c8
-rw-r--r--arch/arm/boards/at91sam9m10g45ek/init.c1
-rw-r--r--arch/arm/boards/at91sam9m10ihd/init.c1
-rw-r--r--arch/arm/boards/at91sam9n12ek/init.c1
-rw-r--r--arch/arm/boards/at91sam9x5ek/init.c17
-rw-r--r--arch/arm/boards/dss11/init.c23
-rw-r--r--arch/arm/boards/grinn-liteboard/Makefile2
-rw-r--r--arch/arm/boards/grinn-liteboard/board.c114
-rw-r--r--arch/arm/boards/grinn-liteboard/flash-header-liteboard-256mb.imxcfg6
-rw-r--r--arch/arm/boards/grinn-liteboard/flash-header-liteboard-512mb.imxcfg6
-rw-r--r--arch/arm/boards/grinn-liteboard/flash-header-liteboard.h68
-rw-r--r--arch/arm/boards/grinn-liteboard/lowlevel.c82
-rw-r--r--arch/arm/boards/haba-knx/init.c24
-rw-r--r--arch/arm/boards/microchip-ksz9477-evb/Makefile1
-rw-r--r--arch/arm/boards/microchip-ksz9477-evb/lowlevel.c28
-rw-r--r--arch/arm/boards/nxp-imx8mq-evk/board.c31
-rw-r--r--arch/arm/boards/pm9261/init.c1
-rw-r--r--arch/arm/boards/pm9261/lowlevel_init.c8
-rw-r--r--arch/arm/boards/pm9263/init.c1
-rw-r--r--arch/arm/boards/pm9263/lowlevel_init.c8
-rw-r--r--arch/arm/boards/pm9g45/init.c1
-rw-r--r--arch/arm/boards/qil-a926x/init.c23
-rw-r--r--arch/arm/boards/sama5d3_xplained/init.c1
-rw-r--r--arch/arm/boards/sama5d3xek/init.c1
-rw-r--r--arch/arm/boards/telit-evk-pro3/init.c22
-rw-r--r--arch/arm/boards/tny-a926x/init.c1
-rw-r--r--arch/arm/boards/tny-a926x/tny_a9263_lowlevel.c8
-rw-r--r--arch/arm/boards/usb-a926x/init.c25
-rw-r--r--arch/arm/boards/usb-a926x/usb_a9263_lowlevel.c8
-rw-r--r--arch/arm/boards/zii-imx51-rdu1/board.c179
-rw-r--r--arch/arm/boards/zii-imx6q-rdu2/board.c82
-rw-r--r--arch/arm/boards/zii-vf610-dev/board.c5
42 files changed, 632 insertions, 289 deletions
diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index c737cf3413..3bf176b14d 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -52,6 +52,7 @@ obj-$(CONFIG_MACH_GE863) += telit-evk-pro3/
obj-$(CONFIG_MACH_GK802) += gk802/
obj-$(CONFIG_MACH_GLOBALSCALE_GURUPLUG) += globalscale-guruplug/
obj-$(CONFIG_MACH_GLOBALSCALE_MIRABOX) += globalscale-mirabox/
+obj-$(CONFIG_MACH_GRINN_LITEBOARD) += grinn-liteboard/
obj-$(CONFIG_MACH_GUF_CUPID) += guf-cupid/
obj-$(CONFIG_MACH_GUF_SANTARO) += guf-santaro/
obj-$(CONFIG_MACH_GUF_VINCELL) += guf-vincell/
@@ -110,6 +111,7 @@ obj-$(CONFIG_MACH_SABRESD) += freescale-mx6-sabresd/
obj-$(CONFIG_MACH_FREESCALE_IMX6SX_SABRESDB) += freescale-mx6sx-sabresdb/
obj-$(CONFIG_MACH_SAMA5D3XEK) += sama5d3xek/
obj-$(CONFIG_MACH_SAMA5D3_XPLAINED) += sama5d3_xplained/
+obj-$(CONFIG_MACH_MICROCHIP_KSZ9477_EVB) += microchip-ksz9477-evb/
obj-$(CONFIG_MACH_SAMA5D4_XPLAINED) += sama5d4_xplained/
obj-$(CONFIG_MACH_SAMA5D4EK) += sama5d4ek/
obj-$(CONFIG_MACH_SCB9328) += scb9328/
diff --git a/arch/arm/boards/animeo_ip/init.c b/arch/arm/boards/animeo_ip/init.c
index 847417398a..07daaf4ffd 100644
--- a/arch/arm/boards/animeo_ip/init.c
+++ b/arch/arm/boards/animeo_ip/init.c
@@ -24,7 +24,6 @@
#include <mach/at91sam9_smc.h>
#include <gpio.h>
#include <mach/iomux.h>
-#include <mach/io.h>
#include <mach/at91_pmc.h>
#include <mach/at91_rstc.h>
#include <local_mac_address.h>
@@ -231,30 +230,12 @@ static void animeo_ip_power_control(void)
static void animeo_ip_phy_reset(void)
{
- unsigned long rstc;
int i;
- struct clk *clk = clk_get(NULL, "macb_clk");
-
- clk_enable(clk);
for (i = AT91_PIN_PA12; i <= AT91_PIN_PA29; i++)
at91_set_gpio_input(i, 0);
- rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL;
-
- /* Need to reset PHY -> 500ms reset */
- at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
- (AT91_RSTC_ERSTL & (0x0d << 8)) |
- AT91_RSTC_URSTEN);
-
- at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
-
- /* Wait for end hardware reset */
- while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL))
- ;
-
- /* Restore NRST value */
- at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | (rstc) | AT91_RSTC_URSTEN);
+ at91sam_phy_reset(IOMEM(AT91SAM9260_BASE_RSTC));
}
#define MACB_SA1B 0x0098
@@ -345,7 +326,7 @@ static void animeo_ip_shutdown(void)
* so linux can detect that we only enable the uart2
* and use it for decompress
*/
- animeo_ip_shutdown_uart(IOMEM(AT91_DBGU + AT91_BASE_SYS));
+ animeo_ip_shutdown_uart(IOMEM(AT91SAM9260_BASE_DBGU));
animeo_ip_shutdown_uart(IOMEM(AT91SAM9260_BASE_US0));
animeo_ip_shutdown_uart(IOMEM(AT91SAM9260_BASE_US1));
}
diff --git a/arch/arm/boards/at91rm9200ek/config.h b/arch/arm/boards/at91rm9200ek/config.h
index 070c9a171c..5f4f6fe1ae 100644
--- a/arch/arm/boards/at91rm9200ek/config.h
+++ b/arch/arm/boards/at91rm9200ek/config.h
@@ -30,30 +30,30 @@
/* flash */
#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000
#define CONFIG_SYS_SMC_CSR0_VAL \
- (AT91_SMC_NWS_(4) | /* Number of Wait States */ \
- AT91_SMC_WSEN | /* Wait State Enable */ \
- AT91_SMC_TDF_(2) | /* Data Float Time */ \
- AT91_SMC_BAT | /* Byte Access Type */ \
- AT91_SMC_DBW_16) /* Data Bus Width */
+ (AT91RM9200_SMC_NWS_(4) | /* Number of Wait States */ \
+ AT91RM9200_SMC_WSEN | /* Wait State Enable */ \
+ AT91RM9200_SMC_TDF_(2) | /* Data Float Time */ \
+ AT91RM9200_SMC_BAT | /* Byte Access Type */ \
+ AT91RM9200_SMC_DBW_16) /* Data Bus Width */
/* sdram */
#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */
#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000
#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000
#define CONFIG_SYS_EBI_CSA_VAL \
- (AT91_EBI_CS0A_SMC | \
- AT91_EBI_CS1A_SDRAMC | \
- AT91_EBI_CS3A_SMC | \
- AT91_EBI_CS4A_SMC) \
+ (AT91RM9200_EBI_CS0A_SMC | \
+ AT91RM9200_EBI_CS1A_SDRAMC | \
+ AT91RM9200_EBI_CS3A_SMC | \
+ AT91RM9200_EBI_CS4A_SMC) \
/* SDRAM */
/* SDRAMC_MR Mode register */
/* SDRAMC_CR - Configuration register*/
#define CONFIG_SYS_SDRC_CR_VAL \
- (AT91_SDRAMC_NC_9 | \
- AT91_SDRAMC_NR_12 | \
- AT91_SDRAMC_NB_4 | \
- AT91_SDRAMC_CAS_2 | \
+ (AT91RM9200_SDRAMC_NC_9 | \
+ AT91RM9200_SDRAMC_NR_12 | \
+ AT91RM9200_SDRAMC_NB_4 | \
+ AT91RM9200_SDRAMC_CAS_2 | \
(1 << 8) | /* Write Recovery Delay */ \
(12 << 12) | /* Row Cycle Delay */ \
(8 << 16) | /* Row Precharge Delay */ \
diff --git a/arch/arm/boards/at91rm9200ek/init.c b/arch/arm/boards/at91rm9200ek/init.c
index 7626786e07..2d9318575c 100644
--- a/arch/arm/boards/at91rm9200ek/init.c
+++ b/arch/arm/boards/at91rm9200ek/init.c
@@ -31,7 +31,6 @@
#include <mach/at91_pmc.h>
#include <mach/board.h>
#include <mach/iomux.h>
-#include <mach/io.h>
#include <spi/spi.h>
static struct macb_platform_data ether_pdata = {
diff --git a/arch/arm/boards/at91rm9200ek/lowlevel.c b/arch/arm/boards/at91rm9200ek/lowlevel.c
index a85a22e797..a5c9058552 100644
--- a/arch/arm/boards/at91rm9200ek/lowlevel.c
+++ b/arch/arm/boards/at91rm9200ek/lowlevel.c
@@ -18,41 +18,43 @@
void static inline access_sdram(void)
{
- writel(0x00000000, AT91_SDRAM_BASE);
+ writel(0x00000000, AT91_CHIPSELECT_1);
}
void __naked __bare_init barebox_arm_reset_vector(void)
{
u32 r;
int i;
+ void __iomem *mc = IOMEM(AT91RM9200_BASE_MC);
+ void __iomem *pmc = IOMEM(AT91RM9200_BASE_PMC);
arm_cpu_lowlevel_init();
/*
* PMC Check if the PLL is already initialized
*/
- r = at91_pmc_read(AT91_PMC_MCKR);
+ r = __raw_readl(pmc + AT91_PMC_MCKR);
if (r & AT91_PMC_CSS)
goto end;
/*
* Enable the Main Oscillator
*/
- at91_pmc_write(AT91_CKGR_MOR, CONFIG_SYS_MOR_VAL);
+ __raw_writel(CONFIG_SYS_MOR_VAL, pmc + AT91_CKGR_MOR);
do {
- r = at91_pmc_read(AT91_PMC_SR);
+ r = __raw_readl(pmc + AT91_PMC_SR);
} while (!(r & AT91_PMC_MOSCS));
/*
* EBI_CFGR
*/
- at91_sys_write(AT91_EBI_CFGR, CONFIG_SYS_EBI_CFGR_VAL);
+ __raw_writel(CONFIG_SYS_EBI_CFGR_VAL, mc + AT91RM9200_EBI_CFGR);
/*
* SMC2_CSR[0]: 16bit, 2 TDF, 4 WS
*/
- at91_sys_write(AT91_SMC_CSR(0), CONFIG_SYS_SMC_CSR0_VAL);
+ __raw_writel(CONFIG_SYS_SMC_CSR0_VAL, mc + AT91RM9200_SMC_CSR(0));
/*
* Init Clocks
@@ -61,24 +63,24 @@ void __naked __bare_init barebox_arm_reset_vector(void)
/*
* PLLAR: x MHz for PCK
*/
- at91_pmc_write(AT91_CKGR_PLLAR, CONFIG_SYS_PLLAR_VAL);
+ __raw_writel(CONFIG_SYS_PLLAR_VAL, pmc + AT91_CKGR_PLLAR);
do {
- r = at91_pmc_read(AT91_PMC_SR);
+ r = __raw_readl(pmc + AT91_PMC_SR);
} while (!(r & AT91_PMC_LOCKA));
/*
* PCK/x = MCK Master Clock from SLOW
*/
- at91_pmc_write(AT91_PMC_MCKR, CONFIG_SYS_MCKR2_VAL1);
+ __raw_writel(CONFIG_SYS_MCKR2_VAL1, pmc + AT91_PMC_MCKR);
/*
* PCK/x = MCK Master Clock from PLLA
*/
- at91_pmc_write(AT91_PMC_MCKR, CONFIG_SYS_MCKR2_VAL2);
+ __raw_writel(CONFIG_SYS_MCKR2_VAL2, pmc + AT91_PMC_MCKR);
do {
- r = at91_pmc_read(AT91_PMC_SR);
+ r = __raw_readl(pmc + AT91_PMC_SR);
} while (!(r & AT91_PMC_MCKRDY));
/*
@@ -86,38 +88,38 @@ void __naked __bare_init barebox_arm_reset_vector(void)
*/
/* PIOC_ASR: Configure PIOC as peripheral (D16/D31) */
- __raw_writel(CONFIG_SYS_PIOC_ASR_VAL, AT91_BASE_PIOC + PIO_ASR);
+ __raw_writel(CONFIG_SYS_PIOC_ASR_VAL, AT91RM9200_BASE_PIOC + PIO_ASR);
/* PIOC_BSR */
- __raw_writel(CONFIG_SYS_PIOC_BSR_VAL, AT91_BASE_PIOC + PIO_BSR);
+ __raw_writel(CONFIG_SYS_PIOC_BSR_VAL, AT91RM9200_BASE_PIOC + PIO_BSR);
/* PIOC_PDR */
- __raw_writel(CONFIG_SYS_PIOC_PDR_VAL, AT91_BASE_PIOC + PIO_PDR);
+ __raw_writel(CONFIG_SYS_PIOC_PDR_VAL, AT91RM9200_BASE_PIOC + PIO_PDR);
/* EBI_CSA : CS1=SDRAM */
- at91_sys_write(AT91_EBI_CSA, CONFIG_SYS_EBI_CSA_VAL);
+ __raw_writel(CONFIG_SYS_EBI_CSA_VAL, mc + AT91RM9200_EBI_CSA);
/* SDRC_CR */
- at91_sys_write(AT91_SDRAMC_CR, CONFIG_SYS_SDRC_CR_VAL);
+ __raw_writel(CONFIG_SYS_SDRC_CR_VAL, mc + AT91RM9200_SDRAMC_CR);
/* SDRC_MR : Precharge All */
- at91_sys_write(AT91_SDRAMC_MR, AT91_SDRAMC_MODE_PRECHARGE);
+ __raw_writel(AT91RM9200_SDRAMC_MODE_PRECHARGE, mc + AT91RM9200_SDRAMC_MR);
/* access SDRAM */
access_sdram();
/* SDRC_MR : refresh */
- at91_sys_write(AT91_SDRAMC_MR, AT91_SDRAMC_MODE_REFRESH);
+ __raw_writel(AT91RM9200_SDRAMC_MODE_REFRESH, mc + AT91RM9200_SDRAMC_MR);
/* access SDRAM 8 times */
for (i = 0; i < 8; i++)
access_sdram();
/* SDRC_MR : Load Mode Register */
- at91_sys_write(AT91_SDRAMC_MR, AT91_SDRAMC_MODE_LMR);
+ __raw_writel(AT91RM9200_SDRAMC_MODE_LMR, mc + AT91RM9200_SDRAMC_MR);
/* access SDRAM */
access_sdram();
/* SDRC_TR : Write refresh rate */
- at91_sys_write(AT91_SDRAMC_TR, CONFIG_SYS_SDRC_TR_VAL);
+ __raw_writel(CONFIG_SYS_SDRC_TR_VAL, mc + AT91RM9200_SDRAMC_TR);
/* access SDRAM */
access_sdram();
/* SDRC_MR : Normal Mode */
- at91_sys_write(AT91_SDRAMC_MR, AT91_SDRAMC_MODE_NORMAL);
+ __raw_writel(AT91RM9200_SDRAMC_MODE_NORMAL, mc + AT91RM9200_SDRAMC_MR);
/* access SDRAM */
access_sdram();
diff --git a/arch/arm/boards/at91sam9260ek/init.c b/arch/arm/boards/at91sam9260ek/init.c
index 5a21ac12fe..037f46a78d 100644
--- a/arch/arm/boards/at91sam9260ek/init.c
+++ b/arch/arm/boards/at91sam9260ek/init.c
@@ -24,7 +24,6 @@
#include <mach/board.h>
#include <mach/at91sam9_smc.h>
#include <gpio.h>
-#include <mach/io.h>
#include <mach/iomux.h>
#include <mach/at91_rstc.h>
#include <linux/clk.h>
@@ -125,11 +124,6 @@ static struct macb_platform_data macb_pdata = {
static void at91sam9260ek_phy_reset(void)
{
- unsigned long rstc;
- struct clk *clk = clk_get(NULL, "macb_clk");
-
- clk_enable(clk);
-
at91_set_gpio_input(AT91_PIN_PA14, 0);
at91_set_gpio_input(AT91_PIN_PA15, 0);
at91_set_gpio_input(AT91_PIN_PA17, 0);
@@ -137,21 +131,7 @@ static void at91sam9260ek_phy_reset(void)
at91_set_gpio_input(AT91_PIN_PA26, 0);
at91_set_gpio_input(AT91_PIN_PA28, 0);
- rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL;
-
- /* Need to reset PHY -> 500ms reset */
- at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
- (AT91_RSTC_ERSTL & (0x0d << 8)) |
- AT91_RSTC_URSTEN);
-
- at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
-
- /* Wait for end hardware reset */
- while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL))
- ;
-
- /* Restore NRST value */
- at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | (rstc) | AT91_RSTC_URSTEN);
+ at91sam_phy_reset(IOMEM(AT91SAM9260_BASE_RSTC));
}
/*
diff --git a/arch/arm/boards/at91sam9261ek/init.c b/arch/arm/boards/at91sam9261ek/init.c
index 58f253b1a6..a469dba92e 100644
--- a/arch/arm/boards/at91sam9261ek/init.c
+++ b/arch/arm/boards/at91sam9261ek/init.c
@@ -32,7 +32,6 @@
#include <mach/at91_pmc.h>
#include <mach/board.h>
#include <gpio.h>
-#include <mach/io.h>
#include <mach/iomux.h>
#include <mach/at91sam9_smc.h>
#include <platform_data/eth-dm9000.h>
diff --git a/arch/arm/boards/at91sam9261ek/lowlevel_init.c b/arch/arm/boards/at91sam9261ek/lowlevel_init.c
index c4e4957ca7..33aa9430dc 100644
--- a/arch/arm/boards/at91sam9261ek/lowlevel_init.c
+++ b/arch/arm/boards/at91sam9261ek/lowlevel_init.c
@@ -34,7 +34,7 @@ static void __bare_init at91sam9261ek_board_config(struct at91sam926x_board_cfg
cfg->ebi_pio_ppudr = 0xFFFF0000;
/* EBI0_CSA, CS1 SDRAM, CS3 NAND Flash, 3.3V memories */
cfg->ebi_csa =
- AT91_MATRIX_DBPUC | AT91_MATRIX_CS1A_SDRAMC;
+ AT91SAM9261_MATRIX_DBPUC | AT91SAM9261_MATRIX_CS1A_SDRAMC;
cfg->smc_cs = 3;
cfg->smc_mode =
@@ -108,10 +108,10 @@ static void __bare_init at91sam9261ek_init(void)
cfg.pio = IOMEM(AT91SAM9261_BASE_PIOC);
cfg.sdramc = IOMEM(AT91SAM9261_BASE_SDRAMC);
cfg.ebi_pio_is_peripha = false;
- cfg.matrix_csa = AT91_MATRIX_EBICSA;
+ cfg.matrix_csa = IOMEM(AT91SAM9261_BASE_MATRIX + AT91SAM9261_MATRIX_EBICSA);
at91sam9261ek_board_config(&cfg);
- at91sam926x_board_init(&cfg);
+ at91sam9261_board_init(&cfg);
barebox_arm_entry(AT91_CHIPSELECT_1, at91_get_sdram_size(cfg.sdramc),
NULL);
diff --git a/arch/arm/boards/at91sam9263ek/init.c b/arch/arm/boards/at91sam9263ek/init.c
index b71cc55179..f7461ce041 100644
--- a/arch/arm/boards/at91sam9263ek/init.c
+++ b/arch/arm/boards/at91sam9263ek/init.c
@@ -35,7 +35,6 @@
#include <mach/board.h>
#include <mach/iomux.h>
#include <gpio.h>
-#include <mach/io.h>
#include <mach/at91sam9_smc.h>
static struct atmel_nand_data nand_pdata = {
diff --git a/arch/arm/boards/at91sam9263ek/lowlevel_init.c b/arch/arm/boards/at91sam9263ek/lowlevel_init.c
index 30c14089d1..f5d68cd7e8 100644
--- a/arch/arm/boards/at91sam9263ek/lowlevel_init.c
+++ b/arch/arm/boards/at91sam9263ek/lowlevel_init.c
@@ -29,8 +29,8 @@ static void __bare_init at91sam9263ek_board_config(struct at91sam926x_board_cfg
cfg->ebi_pio_ppudr = 0xFFFF0000;
/* EBI0_CSA, CS1 SDRAM, CS3 NAND Flash, 3.3V memories */
cfg->ebi_csa =
- AT91_MATRIX_EBI0_DBPUC | AT91_MATRIX_EBI0_VDDIOMSEL_3_3V |
- AT91_MATRIX_EBI0_CS1A_SDRAMC;
+ AT91SAM9263_MATRIX_EBI0_DBPUC | AT91SAM9263_MATRIX_EBI0_VDDIOMSEL_3_3V |
+ AT91SAM9263_MATRIX_EBI0_CS1A_SDRAMC;
cfg->smc_cs = 0;
cfg->smc_mode =
@@ -106,10 +106,10 @@ static void __bare_init at91sam9263ek_init(void *fdt)
cfg.pio = IOMEM(AT91SAM9263_BASE_PIOD);
cfg.sdramc = IOMEM(AT91SAM9263_BASE_SDRAMC0);
cfg.ebi_pio_is_peripha = true;
- cfg.matrix_csa = AT91_MATRIX_EBI0CSA;
+ cfg.matrix_csa = IOMEM(AT91SAM9263_BASE_MATRIX + AT91SAM9263_MATRIX_EBI0CSA);
at91sam9263ek_board_config(&cfg);
- at91sam926x_board_init(&cfg);
+ at91sam9263_board_init(&cfg);
barebox_arm_entry(AT91_CHIPSELECT_1, at91_get_sdram_size(cfg.sdramc),
fdt);
diff --git a/arch/arm/boards/at91sam9263ek/of_init.c b/arch/arm/boards/at91sam9263ek/of_init.c
index b4d216fa3e..259287ccb5 100644
--- a/arch/arm/boards/at91sam9263ek/of_init.c
+++ b/arch/arm/boards/at91sam9263ek/of_init.c
@@ -16,13 +16,13 @@
#include <envfs.h>
#include <init.h>
#include <gpio.h>
+#include <io.h>
#include <mach/at91sam9263_matrix.h>
#include <mach/at91sam9_smc.h>
#include <mach/at91_rtt.h>
#include <mach/hardware.h>
#include <mach/iomux.h>
-#include <mach/io.h>
static int add_smc_devices(void)
{
@@ -66,9 +66,9 @@ static int at91sam9263_smc_init(void)
else
ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
- csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
- csa |= AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA;
- at91_sys_write(AT91_MATRIX_EBI0CSA, csa);
+ csa = readl(AT91SAM9263_BASE_MATRIX + AT91SAM9263_MATRIX_EBI0CSA);
+ csa |= AT91SAM9263_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA;
+ writel(csa, AT91SAM9263_BASE_MATRIX + AT91SAM9263_MATRIX_EBI0CSA);
/* configure chip-select 3 (NAND) */
sam9_smc_configure(0, 3, &ek_nand_smc_config);
diff --git a/arch/arm/boards/at91sam9m10g45ek/init.c b/arch/arm/boards/at91sam9m10g45ek/init.c
index ee692630bf..2660104946 100644
--- a/arch/arm/boards/at91sam9m10g45ek/init.c
+++ b/arch/arm/boards/at91sam9m10g45ek/init.c
@@ -36,7 +36,6 @@
#include <mach/at91_pmc.h>
#include <mach/board.h>
#include <mach/iomux.h>
-#include <mach/io.h>
#include <mach/at91sam9_smc.h>
#include <gpio_keys.h>
#include <readkey.h>
diff --git a/arch/arm/boards/at91sam9m10ihd/init.c b/arch/arm/boards/at91sam9m10ihd/init.c
index de601d53b3..5008e0f67e 100644
--- a/arch/arm/boards/at91sam9m10ihd/init.c
+++ b/arch/arm/boards/at91sam9m10ihd/init.c
@@ -21,7 +21,6 @@
#include <linux/mtd/nand.h>
#include <mach/board.h>
#include <gpio.h>
-#include <mach/io.h>
#include <mach/iomux.h>
#include <mach/at91sam9_smc.h>
#include <input/qt1070.h>
diff --git a/arch/arm/boards/at91sam9n12ek/init.c b/arch/arm/boards/at91sam9n12ek/init.c
index bc3fb8e089..72c6ff84ee 100644
--- a/arch/arm/boards/at91sam9n12ek/init.c
+++ b/arch/arm/boards/at91sam9n12ek/init.c
@@ -32,7 +32,6 @@
#include <mach/board.h>
#include <mach/at91sam9_smc.h>
#include <gpio.h>
-#include <mach/io.h>
#include <mach/iomux.h>
#include <mach/at91_pmc.h>
#include <mach/at91_rstc.h>
diff --git a/arch/arm/boards/at91sam9x5ek/init.c b/arch/arm/boards/at91sam9x5ek/init.c
index 649545e8a7..65493ebbcd 100644
--- a/arch/arm/boards/at91sam9x5ek/init.c
+++ b/arch/arm/boards/at91sam9x5ek/init.c
@@ -32,7 +32,6 @@
#include <mach/board.h>
#include <mach/at91sam9_smc.h>
#include <gpio.h>
-#include <mach/io.h>
#include <mach/iomux.h>
#include <mach/at91_pmc.h>
#include <mach/at91_rstc.h>
@@ -70,16 +69,16 @@ static int ek_add_device_smc(void)
if (!of_machine_is_compatible("atmel,at91sam9x5ek"))
return 0;
- csa = at91_sys_read(AT91_MATRIX_EBICSA);
+ csa = readl(AT91SAM9X5_BASE_MATRIX + AT91SAM9X5_MATRIX_EBICSA);
/* Enable CS3 */
- csa |= AT91_MATRIX_EBI_CS3A_SMC_NANDFLASH;
+ csa |= AT91SAM9X5_MATRIX_EBI_CS3A_SMC_NANDFLASH;
/* NAND flash on D16 */
- csa |= AT91_MATRIX_NFD0_ON_D16;
+ csa |= AT91SAM9X5_MATRIX_NFD0_ON_D16;
/* Configure IO drive */
- csa &= ~AT91_MATRIX_EBI_EBI_IOSR_NORMAL;
- at91_sys_write(AT91_MATRIX_EBICSA, csa);
+ csa &= ~AT91SAM9X5_MATRIX_EBI_EBI_IOSR_NORMAL;
+ writel(csa, AT91SAM9X5_BASE_MATRIX + AT91SAM9X5_MATRIX_EBICSA);
add_generic_device("at91sam9-smc",
DEVICE_ID_SINGLE, NULL,
@@ -96,9 +95,9 @@ static int ek_add_device_smc(void)
sam9_smc_configure(0, 3, &cm_nand_smc_config);
if (at91sam9x5ek_cm_is_vendor(VENDOR_COGENT)) {
- csa = at91_sys_read(AT91_MATRIX_EBICSA);
- csa |= AT91_MATRIX_EBI_VDDIOMSEL_1_8V;
- at91_sys_write(AT91_MATRIX_EBICSA, csa);
+ csa = readl(AT91SAM9X5_BASE_MATRIX + AT91SAM9X5_MATRIX_EBICSA);
+ csa |= AT91SAM9X5_MATRIX_EBI_VDDIOMSEL_1_8V;
+ writel(csa, AT91SAM9X5_BASE_MATRIX + AT91SAM9X5_MATRIX_EBICSA);
}
return 0;
diff --git a/arch/arm/boards/dss11/init.c b/arch/arm/boards/dss11/init.c
index 321c383ffc..0d0b5e29bf 100644
--- a/arch/arm/boards/dss11/init.c
+++ b/arch/arm/boards/dss11/init.c
@@ -29,7 +29,6 @@
#include <mach/board.h>
#include <mach/at91sam9_smc.h>
#include <gpio.h>
-#include <mach/io.h>
#include <mach/iomux.h>
#include <mach/at91_rstc.h>
#include <linux/clk.h>
@@ -80,11 +79,6 @@ static struct macb_platform_data macb_pdata = {
static void dss11_phy_reset(void)
{
- unsigned long rstc;
- struct clk *clk = clk_get(NULL, "macb_clk");
-
- clk_enable(clk);
-
at91_set_gpio_input(AT91_PIN_PA14, 0);
at91_set_gpio_input(AT91_PIN_PA15, 0);
at91_set_gpio_input(AT91_PIN_PA17, 0);
@@ -92,22 +86,7 @@ static void dss11_phy_reset(void)
at91_set_gpio_input(AT91_PIN_PA26, 0);
at91_set_gpio_input(AT91_PIN_PA28, 0);
- rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL;
-
- /* Need to reset PHY -> 500ms reset */
- at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
- (AT91_RSTC_ERSTL & (0x0d << 8)) |
- AT91_RSTC_URSTEN);
-
- at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
-
- /* Wait for end hardware reset */
- while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL));
-
- /* Restore NRST value */
- at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
- (rstc) |
- AT91_RSTC_URSTEN);
+ at91sam_phy_reset(IOMEM(AT91SAM9260_BASE_RSTC));
}
static struct atmel_mci_platform_data dss11_mci_data = {
diff --git a/arch/arm/boards/grinn-liteboard/Makefile b/arch/arm/boards/grinn-liteboard/Makefile
new file mode 100644
index 0000000000..01c7a259e9
--- /dev/null
+++ b/arch/arm/boards/grinn-liteboard/Makefile
@@ -0,0 +1,2 @@
+obj-y += board.o
+lwl-y += lowlevel.o
diff --git a/arch/arm/boards/grinn-liteboard/board.c b/arch/arm/boards/grinn-liteboard/board.c
new file mode 100644
index 0000000000..8e5a91e124
--- /dev/null
+++ b/arch/arm/boards/grinn-liteboard/board.c
@@ -0,0 +1,114 @@
+/*
+ * Copyright (C) 2018 Grinn
+ *
+ * Author: Marcin Niestroj <m.niestroj@grinn-global.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ */
+
+#define pr_fmt(fmt) "liteboard: " fmt
+
+#include <bootsource.h>
+#include <common.h>
+#include <envfs.h>
+#include <init.h>
+#include <mach/bbu.h>
+#include <mach/imx6.h>
+#include <malloc.h>
+#include <mfd/imx6q-iomuxc-gpr.h>
+#include <of.h>
+
+static void bbu_register_handler_sd(bool is_boot_source)
+{
+ imx6_bbu_internal_mmc_register_handler("sd", "/dev/mmc0.barebox",
+ is_boot_source ? BBU_HANDLER_FLAG_DEFAULT : 0);
+}
+
+static void bbu_register_handler_emmc(bool is_boot_source)
+{
+ int emmc_boot_flag = 0, emmc_flag = 0;
+ const char *bootpart;
+ struct device_d *dev;
+ int ret;
+
+ if (!is_boot_source)
+ goto bbu_register;
+
+ dev = get_device_by_name("mmc1");
+ if (!dev) {
+ pr_warn("Failed to get eMMC device\n");
+ goto bbu_register;
+ }
+
+ ret = device_detect(dev);
+ if (ret) {
+ pr_warn("Failed to probe eMMC\n");
+ goto bbu_register;
+ }
+
+ bootpart = dev_get_param(dev, "boot");
+ if (!bootpart) {
+ pr_warn("Failed to get eMMC boot configuration\n");
+ goto bbu_register;
+ }
+
+ if (!strncmp(bootpart, "boot", 4))
+ emmc_boot_flag |= BBU_HANDLER_FLAG_DEFAULT;
+ else
+ emmc_flag |= BBU_HANDLER_FLAG_DEFAULT;
+
+bbu_register:
+ imx6_bbu_internal_mmc_register_handler("emmc", "/dev/mmc1.barebox",
+ emmc_flag);
+ imx6_bbu_internal_mmcboot_register_handler("emmc-boot", "mmc1",
+ emmc_boot_flag);
+}
+
+static const struct {
+ const char *name;
+ const char *env;
+ void (*bbu_register_handler)(bool);
+} boot_sources[] = {
+ {"SD", "/chosen/environment-sd", bbu_register_handler_sd},
+ {"eMMC", "/chosen/environment-emmc", bbu_register_handler_emmc},
+};
+
+static int liteboard_devices_init(void)
+{
+ int boot_source_idx = 0;
+ int ret;
+ int i;
+
+ if (!of_machine_is_compatible("grinn,imx6ul-liteboard"))
+ return 0;
+
+ barebox_set_hostname("liteboard");
+
+ if (bootsource_get() == BOOTSOURCE_MMC) {
+ int mmc_idx = bootsource_get_instance();
+
+ if (0 <= mmc_idx && mmc_idx < ARRAY_SIZE(boot_sources))
+ boot_source_idx = mmc_idx;
+ }
+
+ ret = of_device_enable_path(boot_sources[boot_source_idx].env);
+ if (ret < 0)
+ pr_warn("Failed to enable environment partition '%s' (%d)\n",
+ boot_sources[boot_source_idx].env, ret);
+
+ pr_notice("Using environment in %s\n",
+ boot_sources[boot_source_idx].name);
+
+ for (i = 0; i < ARRAY_SIZE(boot_sources); i++)
+ boot_sources[i].bbu_register_handler(boot_source_idx == i);
+
+ return 0;
+}
+device_initcall(liteboard_devices_init);
diff --git a/arch/arm/boards/grinn-liteboard/flash-header-liteboard-256mb.imxcfg b/arch/arm/boards/grinn-liteboard/flash-header-liteboard-256mb.imxcfg
new file mode 100644
index 0000000000..1b980c7846
--- /dev/null
+++ b/arch/arm/boards/grinn-liteboard/flash-header-liteboard-256mb.imxcfg
@@ -0,0 +1,6 @@
+
+#define SETUP_MDASP_MDCTL \
+ wm 32 0x021B0040 0x00000047; \
+ wm 32 0x021B0000 0x83180000
+
+#include "flash-header-liteboard.h"
diff --git a/arch/arm/boards/grinn-liteboard/flash-header-liteboard-512mb.imxcfg b/arch/arm/boards/grinn-liteboard/flash-header-liteboard-512mb.imxcfg
new file mode 100644
index 0000000000..c93a2cc0fa
--- /dev/null
+++ b/arch/arm/boards/grinn-liteboard/flash-header-liteboard-512mb.imxcfg
@@ -0,0 +1,6 @@
+
+#define SETUP_MDASP_MDCTL \
+ wm 32 0x021B0040 0x0000004F; \
+ wm 32 0x021B0000 0x84180000
+
+#include "flash-header-liteboard.h"
diff --git a/arch/arm/boards/grinn-liteboard/flash-header-liteboard.h b/arch/arm/boards/grinn-liteboard/flash-header-liteboard.h
new file mode 100644
index 0000000000..60a39f524b
--- /dev/null
+++ b/arch/arm/boards/grinn-liteboard/flash-header-liteboard.h
@@ -0,0 +1,68 @@
+
+loadaddr 0x80000000
+soc imx6
+dcdofs 0x400
+
+wm 32 0x020c4068 0xffffffff
+wm 32 0x020c406c 0xffffffff
+wm 32 0x020c4070 0xffffffff
+wm 32 0x020c4074 0xffffffff
+wm 32 0x020c4078 0xffffffff
+wm 32 0x020c407c 0xffffffff
+wm 32 0x020c4080 0xffffffff
+
+wm 32 0x020E04B4 0x000C0000
+wm 32 0x020E04AC 0x00000000
+wm 32 0x020E027C 0x00000030
+wm 32 0x020E0250 0x00000030
+wm 32 0x020E024C 0x00000030
+wm 32 0x020E0490 0x00000030
+wm 32 0x020E0288 0x00000030
+wm 32 0x020E0270 0x00000000
+wm 32 0x020E0260 0x00000030
+wm 32 0x020E0264 0x00000030
+wm 32 0x020E04A0 0x00000030
+wm 32 0x020E0494 0x00020000
+wm 32 0x020E0280 0x00000030
+wm 32 0x020E0284 0x00000030
+wm 32 0x020E04B0 0x00020000
+wm 32 0x020E0498 0x00000030
+wm 32 0x020E04A4 0x00000030
+wm 32 0x020E0244 0x00000030
+wm 32 0x020E0248 0x00000030
+wm 32 0x021B001C 0x00008000
+wm 32 0x021B0800 0xA1390003
+wm 32 0x021B080C 0x00000000
+wm 32 0x021B083C 0x41480148
+wm 32 0x021B0848 0x40403E42
+wm 32 0x021B0850 0x40405852
+wm 32 0x021B081C 0x33333333
+wm 32 0x021B0820 0x33333333
+wm 32 0x021B082C 0xf3333333
+wm 32 0x021B0830 0xf3333333
+wm 32 0x021B08C0 0x00922012
+wm 32 0x021B0858 0x00000F00
+wm 32 0x021B08b8 0x00000800
+wm 32 0x021B0004 0x0002002D
+wm 32 0x021B0008 0x1B333030
+wm 32 0x021B000C 0x676B52F3
+wm 32 0x021B0010 0xB66D0B63
+wm 32 0x021B0014 0x01FF00DB
+wm 32 0x021B0018 0x00211740
+wm 32 0x021B001C 0x00008000
+wm 32 0x021B002C 0x000026D2
+wm 32 0x021B0030 0x006B1023
+
+SETUP_MDASP_MDCTL
+
+wm 32 0x021b0890 0x00400A38
+wm 32 0x021B001C 0x02008032
+wm 32 0x021B001C 0x00008033
+wm 32 0x021B001C 0x00048031
+wm 32 0x021B001C 0x15208030
+wm 32 0x021B001C 0x04008040
+wm 32 0x021B0020 0x00007800
+wm 32 0x021B0818 0x00000227
+wm 32 0x021B0004 0x0002556D
+wm 32 0x021B0404 0x00011006
+wm 32 0x021B001C 0x00000000
diff --git a/arch/arm/boards/grinn-liteboard/lowlevel.c b/arch/arm/boards/grinn-liteboard/lowlevel.c
new file mode 100644
index 0000000000..331ccc2283
--- /dev/null
+++ b/arch/arm/boards/grinn-liteboard/lowlevel.c
@@ -0,0 +1,82 @@
+/*
+ * Copyright (C) 2018 Grinn
+ *
+ * Author: Marcin Niestroj <m.niestroj@grinn-global.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ */
+
+#include <debug_ll.h>
+#include <common.h>
+#include <linux/sizes.h>
+#include <io.h>
+#include <image-metadata.h>
+#include <asm/barebox-arm-head.h>
+#include <asm/barebox-arm.h>
+#include <asm/sections.h>
+#include <asm/cache.h>
+#include <asm/mmu.h>
+#include <mach/esdctl.h>
+#include <mach/imx6.h>
+
+static inline void setup_uart(void)
+{
+ void __iomem *iomuxbase = IOMEM(MX6_IOMUXC_BASE_ADDR);
+ void __iomem *uart = IOMEM(MX6_UART1_BASE_ADDR);
+
+ relocate_to_current_adr();
+ setup_c();
+ barrier();
+
+ imx6_ungate_all_peripherals();
+
+ writel(0x0, iomuxbase + 0x84);
+ writel(0x1b0b1, iomuxbase + 0x0310);
+
+ imx6_uart_setup(uart);
+
+ pbl_set_putc(imx_uart_putc, uart);
+
+ putchar('>');
+}
+
+BAREBOX_IMD_TAG_STRING(liteboard_memsize_SZ_256M, IMD_TYPE_PARAMETER,
+ "memsize=256", 0);
+BAREBOX_IMD_TAG_STRING(liteboard_memsize_SZ_512M, IMD_TYPE_PARAMETER,
+ "memsize=512", 0);
+
+extern char __dtb_imx6ul_liteboard_start[];
+
+static void __noreturn start_imx6_liteboard(void)
+{
+ imx6ul_cpu_lowlevel_init();
+
+ arm_setup_stack(0x00910000 - 8);
+
+ arm_early_mmu_cache_invalidate();
+
+ if (IS_ENABLED(CONFIG_PBL_CONSOLE))
+ setup_uart();
+
+ imx6ul_barebox_entry(__dtb_imx6ul_liteboard_start +
+ get_runtime_offset());
+}
+
+#define LITEBOARD_ENTRY(name, memory_size) \
+ ENTRY_FUNCTION(name, r0, r1, r2) \
+ { \
+ IMD_USED(liteboard_memsize_##memory_size); \
+ \
+ start_imx6_liteboard(); \
+ }
+
+
+LITEBOARD_ENTRY(start_imx6ul_liteboard_256mb, SZ_256M);
+LITEBOARD_ENTRY(start_imx6ul_liteboard_512mb, SZ_512M);
diff --git a/arch/arm/boards/haba-knx/init.c b/arch/arm/boards/haba-knx/init.c
index 36f1e8b741..55441b63af 100644
--- a/arch/arm/boards/haba-knx/init.c
+++ b/arch/arm/boards/haba-knx/init.c
@@ -35,7 +35,6 @@
#include <mach/at91sam9_smc.h>
#include <gpio.h>
#include <led.h>
-#include <mach/io.h>
#include <mach/iomux.h>
#include <mach/at91_pmc.h>
#include <mach/at91_rstc.h>
@@ -91,33 +90,12 @@ static struct macb_platform_data macb_pdata = {
static void haba_knx_phy_reset(void)
{
- unsigned long rstc;
- struct clk *clk = clk_get(NULL, "macb_clk");
-
- clk_enable(clk);
-
at91_set_gpio_input(AT91_PIN_PA14, 0);
at91_set_gpio_input(AT91_PIN_PA15, 0);
at91_set_gpio_input(AT91_PIN_PA17, 0);
at91_set_gpio_input(AT91_PIN_PA18, 0);
- rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL;
-
- /* Need to reset PHY -> 500ms reset */
- at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
- (AT91_RSTC_ERSTL & (0x0d << 8)) |
- AT91_RSTC_URSTEN);
-
- at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
-
- /* Wait for end hardware reset */
- while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL))
- ;
-
- /* Restore NRST value */
- at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
- (rstc) |
- AT91_RSTC_URSTEN);
+ at91sam_phy_reset(IOMEM(AT91SAM9260_BASE_RSTC));
}
#define MACB_SA1B 0x0098
diff --git a/arch/arm/boards/microchip-ksz9477-evb/Makefile b/arch/arm/boards/microchip-ksz9477-evb/Makefile
new file mode 100644
index 0000000000..b08c4a93ca
--- /dev/null
+++ b/arch/arm/boards/microchip-ksz9477-evb/Makefile
@@ -0,0 +1 @@
+lwl-y += lowlevel.o
diff --git a/arch/arm/boards/microchip-ksz9477-evb/lowlevel.c b/arch/arm/boards/microchip-ksz9477-evb/lowlevel.c
new file mode 100644
index 0000000000..639958a459
--- /dev/null
+++ b/arch/arm/boards/microchip-ksz9477-evb/lowlevel.c
@@ -0,0 +1,28 @@
+/*
+ * Copyright (C) 2018 Ahmad Fatoum, Pengutronix
+ *
+ * Under GPLv2
+ */
+
+#include <common.h>
+#include <init.h>
+
+#include <asm/barebox-arm-head.h>
+#include <asm/barebox-arm.h>
+
+#include <mach/hardware.h>
+
+extern char __dtb_at91_microchip_ksz9477_evb_start[];
+
+ENTRY_FUNCTION(start_sama5d3_xplained_ung8071, r0, r1, r2)
+{
+ void *fdt;
+
+ arm_cpu_lowlevel_init();
+
+ arm_setup_stack(SAMA5D3_SRAM_BASE + SAMA5D3_SRAM_SIZE - 16);
+
+ fdt = __dtb_at91_microchip_ksz9477_evb_start + get_runtime_offset();
+
+ barebox_arm_entry(SAMA5_DDRCS, SZ_256M, fdt);
+}
diff --git a/arch/arm/boards/nxp-imx8mq-evk/board.c b/arch/arm/boards/nxp-imx8mq-evk/board.c
index 764eadb766..299d056e27 100644
--- a/arch/arm/boards/nxp-imx8mq-evk/board.c
+++ b/arch/arm/boards/nxp-imx8mq-evk/board.c
@@ -17,11 +17,12 @@
*
*/
+#include <asm/memory.h>
+#include <bootsource.h>
#include <common.h>
#include <init.h>
-#include <asm/memory.h>
-#include <linux/sizes.h>
#include <linux/phy.h>
+#include <linux/sizes.h>
#include <mach/bbu.h>
#include <envfs.h>
@@ -45,25 +46,27 @@ static int ar8031_phy_fixup(struct phy_device *phydev)
return 0;
}
-static int imx8mq_evk_mem_init(void)
-{
- if (!of_machine_is_compatible("fsl,imx8mq-evk"))
- return 0;
-
- request_sdram_region("ATF", 0x40000000, SZ_128K);
-
- return 0;
-}
-mem_initcall(imx8mq_evk_mem_init);
-
static int nxp_imx8mq_evk_init(void)
{
+ int flags;
+
if (!of_machine_is_compatible("fsl,imx8mq-evk"))
return 0;
barebox_set_hostname("imx8mq-evk");
- imx8mq_bbu_internal_mmc_register_handler("eMMC", "/dev/mmc0", 0);
+ flags = bootsource_get_instance() == 0 ? BBU_HANDLER_FLAG_DEFAULT : 0;
+ imx8mq_bbu_internal_mmc_register_handler("eMMC",
+ "/dev/mmc0.barebox", flags);
+
+ flags = bootsource_get_instance() == 1 ? BBU_HANDLER_FLAG_DEFAULT : 0;
+ imx8mq_bbu_internal_mmc_register_handler("SD",
+ "/dev/mmc1.barebox", flags);
+
+ if (bootsource_get_instance() == 0)
+ of_device_enable_path("/chosen/environment-emmc");
+ else
+ of_device_enable_path("/chosen/environment-sd");
phy_register_fixup_for_uid(PHY_ID_AR8031, AR_PHY_ID_MASK,
ar8031_phy_fixup);
diff --git a/arch/arm/boards/pm9261/init.c b/arch/arm/boards/pm9261/init.c
index b0377d063c..33c2a542b2 100644
--- a/arch/arm/boards/pm9261/init.c
+++ b/arch/arm/boards/pm9261/init.c
@@ -34,7 +34,6 @@
#include <mach/at91_pmc.h>
#include <mach/board.h>
#include <mach/iomux.h>
-#include <mach/io.h>
#include <mach/at91sam9_smc.h>
#include <platform_data/eth-dm9000.h>
#include <linux/w1-gpio.h>
diff --git a/arch/arm/boards/pm9261/lowlevel_init.c b/arch/arm/boards/pm9261/lowlevel_init.c
index a4cb8af697..0ab34b0db6 100644
--- a/arch/arm/boards/pm9261/lowlevel_init.c
+++ b/arch/arm/boards/pm9261/lowlevel_init.c
@@ -7,7 +7,7 @@
#include <asm/barebox-arm.h>
#include <mach/at91sam926x_board_init.h>
-#include <mach/at91sam9_matrix.h>
+#include <mach/at91sam9261_matrix.h>
#define MASTER_PLL_DIV 15
#define MASTER_PLL_MUL 162
@@ -28,7 +28,7 @@ static void __bare_init pm9261_board_config(struct at91sam926x_board_cfg *cfg)
cfg->ebi_pio_ppudr = 0xFFFF0000;
/* EBI0_CSA, CS1 SDRAM, CS3 NAND Flash, 3.3V memories */
cfg->ebi_csa =
- AT91_MATRIX_DBPUC | AT91_MATRIX_CS1A_SDRAMC;
+ AT91SAM9261_MATRIX_DBPUC | AT91SAM9261_MATRIX_CS1A_SDRAMC;
cfg->smc_cs = 0;
cfg->smc_mode =
@@ -102,10 +102,10 @@ static void __bare_init pm9261_init(void)
cfg.pio = IOMEM(AT91SAM9261_BASE_PIOC);
cfg.sdramc = IOMEM(AT91SAM9261_BASE_SDRAMC);
cfg.ebi_pio_is_peripha = false;
- cfg.matrix_csa = AT91_MATRIX_EBICSA;
+ cfg.matrix_csa = IOMEM(AT91SAM9261_BASE_MATRIX + AT91SAM9261_MATRIX_EBICSA);
pm9261_board_config(&cfg);
- at91sam926x_board_init(&cfg);
+ at91sam9261_board_init(&cfg);
barebox_arm_entry(AT91_CHIPSELECT_1, at91_get_sdram_size(cfg.sdramc),
NULL);
diff --git a/arch/arm/boards/pm9263/init.c b/arch/arm/boards/pm9263/init.c
index e9f8588649..30b3d26fbf 100644
--- a/arch/arm/boards/pm9263/init.c
+++ b/arch/arm/boards/pm9263/init.c
@@ -32,7 +32,6 @@
#include <linux/mtd/nand.h>
#include <mach/at91_pmc.h>
#include <mach/board.h>
-#include <mach/io.h>
#include <mach/iomux.h>
#include <mach/at91sam9_smc.h>
#include <linux/w1-gpio.h>
diff --git a/arch/arm/boards/pm9263/lowlevel_init.c b/arch/arm/boards/pm9263/lowlevel_init.c
index 6849f0a5bf..32850b2981 100644
--- a/arch/arm/boards/pm9263/lowlevel_init.c
+++ b/arch/arm/boards/pm9263/lowlevel_init.c
@@ -30,8 +30,8 @@ static void __bare_init pm9263_board_config(struct at91sam926x_board_cfg *cfg)
cfg->ebi_pio_ppudr = 0xFFFF0000;
/* EBI0_CSA, CS1 SDRAM, CS3 NAND Flash, 3.3V memories */
cfg->ebi_csa =
- AT91_MATRIX_EBI0_DBPUC | AT91_MATRIX_EBI0_VDDIOMSEL_3_3V |
- AT91_MATRIX_EBI0_CS1A_SDRAMC;
+ AT91SAM9263_MATRIX_EBI0_DBPUC | AT91SAM9263_MATRIX_EBI0_VDDIOMSEL_3_3V |
+ AT91SAM9263_MATRIX_EBI0_CS1A_SDRAMC;
cfg->smc_cs = 0;
cfg->smc_mode =
@@ -123,10 +123,10 @@ static void __bare_init pm9263_board_init(void)
cfg.pio = IOMEM(AT91SAM9263_BASE_PIOD);
cfg.sdramc = IOMEM(AT91SAM9263_BASE_SDRAMC0);
cfg.ebi_pio_is_peripha = true;
- cfg.matrix_csa = AT91_MATRIX_EBI0CSA;
+ cfg.matrix_csa = IOMEM(AT91SAM9263_BASE_MATRIX + AT91SAM9263_MATRIX_EBI0CSA);
pm9263_board_config(&cfg);
- at91sam926x_board_init(&cfg);
+ at91sam9263_board_init(&cfg);
barebox_arm_entry(AT91_CHIPSELECT_1, at91_get_sdram_size(cfg.sdramc),
NULL);
diff --git a/arch/arm/boards/pm9g45/init.c b/arch/arm/boards/pm9g45/init.c
index efa5dc025d..0565657a8c 100644
--- a/arch/arm/boards/pm9g45/init.c
+++ b/arch/arm/boards/pm9g45/init.c
@@ -34,7 +34,6 @@
#include <mach/at91_pmc.h>
#include <mach/board.h>
#include <mach/iomux.h>
-#include <mach/io.h>
#include <mach/at91sam9_smc.h>
#include <linux/w1-gpio.h>
#include <w1_mac_address.h>
diff --git a/arch/arm/boards/qil-a926x/init.c b/arch/arm/boards/qil-a926x/init.c
index 3ef9872797..fa7575d270 100644
--- a/arch/arm/boards/qil-a926x/init.c
+++ b/arch/arm/boards/qil-a926x/init.c
@@ -25,7 +25,6 @@
#include <mach/at91sam9_smc.h>
#include <gpio.h>
#include <led.h>
-#include <mach/io.h>
#include <mach/iomux.h>
#include <mach/at91_pmc.h>
#include <mach/at91_rstc.h>
@@ -118,11 +117,6 @@ static struct macb_platform_data macb_pdata = {
static void qil_a9260_phy_reset(void)
{
- unsigned long rstc;
- struct clk *clk = clk_get(NULL, "macb_clk");
-
- clk_enable(clk);
-
at91_set_gpio_input(AT91_PIN_PA14, 0);
at91_set_gpio_input(AT91_PIN_PA15, 0);
at91_set_gpio_input(AT91_PIN_PA17, 0);
@@ -130,22 +124,7 @@ static void qil_a9260_phy_reset(void)
at91_set_gpio_input(AT91_PIN_PA26, 0);
at91_set_gpio_input(AT91_PIN_PA28, 0);
- rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL;
-
- /* Need to reset PHY -> 500ms reset */
- at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
- (AT91_RSTC_ERSTL & (0x0d << 8)) |
- AT91_RSTC_URSTEN);
-
- at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
-
- /* Wait for end hardware reset */
- while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL));
-
- /* Restore NRST value */
- at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
- (rstc) |
- AT91_RSTC_URSTEN);
+ at91sam_phy_reset(IOMEM(AT91SAM9260_BASE_RSTC));
}
/*
diff --git a/arch/arm/boards/sama5d3_xplained/init.c b/arch/arm/boards/sama5d3_xplained/init.c
index fda4c56c6c..2433e25f16 100644
--- a/arch/arm/boards/sama5d3_xplained/init.c
+++ b/arch/arm/boards/sama5d3_xplained/init.c
@@ -30,7 +30,6 @@
#include <mach/board.h>
#include <mach/at91sam9_smc.h>
#include <gpio.h>
-#include <mach/io.h>
#include <mach/iomux.h>
#include <mach/at91_pmc.h>
#include <mach/at91_rstc.h>
diff --git a/arch/arm/boards/sama5d3xek/init.c b/arch/arm/boards/sama5d3xek/init.c
index b35bdb5b05..08ccbcf4a3 100644
--- a/arch/arm/boards/sama5d3xek/init.c
+++ b/arch/arm/boards/sama5d3xek/init.c
@@ -33,7 +33,6 @@
#include <mach/at91sam9_smc.h>
#include <mach/at91sam9_smc.h>
#include <gpio.h>
-#include <mach/io.h>
#include <mach/iomux.h>
#include <mach/at91_pmc.h>
#include <mach/at91_rstc.h>
diff --git a/arch/arm/boards/telit-evk-pro3/init.c b/arch/arm/boards/telit-evk-pro3/init.c
index ea63b1a094..f6ee715bb1 100644
--- a/arch/arm/boards/telit-evk-pro3/init.c
+++ b/arch/arm/boards/telit-evk-pro3/init.c
@@ -22,7 +22,6 @@
#include <mach/at91_rstc.h>
#include <mach/at91sam9_smc.h>
#include <mach/board.h>
-#include <mach/io.h>
#include <mach/iomux.h>
#include <nand.h>
@@ -72,11 +71,6 @@ static struct macb_platform_data macb_pdata = {
static void evk_phy_reset(void)
{
- unsigned long rstc;
- struct clk *clk = clk_get(NULL, "macb_clk");
-
- clk_enable(clk);
-
at91_set_gpio_input(AT91_PIN_PA14, 0);
at91_set_gpio_input(AT91_PIN_PA15, 0);
at91_set_gpio_input(AT91_PIN_PA17, 0);
@@ -84,21 +78,7 @@ static void evk_phy_reset(void)
at91_set_gpio_input(AT91_PIN_PA26, 0);
at91_set_gpio_input(AT91_PIN_PA28, 0);
- rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL;
-
- /* Need to reset PHY -> 500ms reset */
- at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
- (AT91_RSTC_ERSTL & (0x0d << 8)) |
- AT91_RSTC_URSTEN);
-
- at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
-
- /* Wait for end hardware reset */
- while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL))
- ;
-
- /* Restore NRST value */
- at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | (rstc) | AT91_RSTC_URSTEN);
+ at91sam_phy_reset(IOMEM(AT91SAM9260_BASE_RSTC));
}
/*
diff --git a/arch/arm/boards/tny-a926x/init.c b/arch/arm/boards/tny-a926x/init.c
index 3b83c9f222..dab373009f 100644
--- a/arch/arm/boards/tny-a926x/init.c
+++ b/arch/arm/boards/tny-a926x/init.c
@@ -34,7 +34,6 @@
#include <mach/at91sam9_smc.h>
#include <mach/at91sam9_sdramc.h>
#include <gpio.h>
-#include <mach/io.h>
#include <mach/iomux.h>
#include <mach/at91_pmc.h>
#include <mach/at91_rstc.h>
diff --git a/arch/arm/boards/tny-a926x/tny_a9263_lowlevel.c b/arch/arm/boards/tny-a926x/tny_a9263_lowlevel.c
index 4b57b74e13..8566d27a0a 100644
--- a/arch/arm/boards/tny-a926x/tny_a9263_lowlevel.c
+++ b/arch/arm/boards/tny-a926x/tny_a9263_lowlevel.c
@@ -33,8 +33,8 @@ static void __bare_init tny_a9263_board_config(struct at91sam926x_board_cfg *cfg
cfg->ebi_pio_ppudr = 0xFFFF0000;
/* EBI0_CSA, CS1 SDRAM, CS3 NAND Flash, 3.3V memories */
cfg->ebi_csa =
- AT91_MATRIX_EBI0_DBPUC | AT91_MATRIX_EBI0_VDDIOMSEL_3_3V |
- AT91_MATRIX_EBI0_CS1A_SDRAMC;
+ AT91SAM9263_MATRIX_EBI0_DBPUC | AT91SAM9263_MATRIX_EBI0_VDDIOMSEL_3_3V |
+ AT91SAM9263_MATRIX_EBI0_CS1A_SDRAMC;
cfg->smc_cs = 3;
cfg->smc_mode =
@@ -107,11 +107,11 @@ static void __bare_init tny_a9263_init(void)
cfg.pio = IOMEM(AT91SAM9263_BASE_PIOD);
cfg.sdramc = IOMEM(AT91SAM9263_BASE_SDRAMC0);
cfg.ebi_pio_is_peripha = true;
- cfg.matrix_csa = AT91_MATRIX_EBI0CSA;
+ cfg.matrix_csa = IOMEM(AT91SAM9263_BASE_MATRIX + AT91SAM9263_MATRIX_EBI0CSA);
tny_a9263_board_config(&cfg);
- at91sam926x_board_init(&cfg);
+ at91sam9263_board_init(&cfg);
barebox_arm_entry(AT91_CHIPSELECT_1,
at91_get_sdram_size(IOMEM(AT91SAM9263_BASE_SDRAMC0)),
diff --git a/arch/arm/boards/usb-a926x/init.c b/arch/arm/boards/usb-a926x/init.c
index 12e8f4e0d6..8969cbd3a8 100644
--- a/arch/arm/boards/usb-a926x/init.c
+++ b/arch/arm/boards/usb-a926x/init.c
@@ -26,6 +26,7 @@
#include <io.h>
#include <envfs.h>
#include <mach/hardware.h>
+#include <mach/at91sam926x.h>
#include <nand.h>
#include <linux/sizes.h>
#include <linux/mtd/nand.h>
@@ -35,7 +36,6 @@
#include <mach/at91sam9_sdramc.h>
#include <gpio.h>
#include <led.h>
-#include <mach/io.h>
#include <mach/iomux.h>
#include <mach/at91_pmc.h>
#include <mach/at91_rstc.h>
@@ -128,11 +128,6 @@ static struct macb_platform_data macb_pdata = {
static void usb_a9260_phy_reset(void)
{
- unsigned long rstc;
- struct clk *clk = clk_get(NULL, "macb_clk");
-
- clk_enable(clk);
-
at91_set_gpio_input(AT91_PIN_PA14, 0);
at91_set_gpio_input(AT91_PIN_PA15, 0);
at91_set_gpio_input(AT91_PIN_PA17, 0);
@@ -140,22 +135,8 @@ static void usb_a9260_phy_reset(void)
at91_set_gpio_input(AT91_PIN_PA26, 0);
at91_set_gpio_input(AT91_PIN_PA28, 0);
- rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL;
-
- /* Need to reset PHY -> 500ms reset */
- at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
- (AT91_RSTC_ERSTL & (0x0d << 8)) |
- AT91_RSTC_URSTEN);
-
- at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
-
- /* Wait for end hardware reset */
- while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL));
-
- /* Restore NRST value */
- at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
- (rstc) |
- AT91_RSTC_URSTEN);
+ /* same address for the different supported SoCs */
+ at91sam_phy_reset(IOMEM(AT91SAM926X_BASE_RSTC));
}
static void usb_a9260_add_device_eth(void)
diff --git a/arch/arm/boards/usb-a926x/usb_a9263_lowlevel.c b/arch/arm/boards/usb-a926x/usb_a9263_lowlevel.c
index 066452b956..a7dd2b2ada 100644
--- a/arch/arm/boards/usb-a926x/usb_a9263_lowlevel.c
+++ b/arch/arm/boards/usb-a926x/usb_a9263_lowlevel.c
@@ -35,8 +35,8 @@ static void __bare_init usb_a9263_board_config(struct at91sam926x_board_cfg *cfg
cfg->ebi_pio_ppudr = 0xFFFF0000;
/* EBI0_CSA, CS1 SDRAM, CS3 NAND Flash, 3.3V memories */
cfg->ebi_csa =
- AT91_MATRIX_EBI0_DBPUC | AT91_MATRIX_EBI0_VDDIOMSEL_3_3V |
- AT91_MATRIX_EBI0_CS1A_SDRAMC;
+ AT91SAM9263_MATRIX_EBI0_DBPUC | AT91SAM9263_MATRIX_EBI0_VDDIOMSEL_3_3V |
+ AT91SAM9263_MATRIX_EBI0_CS1A_SDRAMC;
cfg->smc_cs = 3;
cfg->smc_mode =
@@ -113,10 +113,10 @@ static void __bare_init usb_a9263_init(void)
cfg.pio = IOMEM(AT91SAM9263_BASE_PIOD);
cfg.sdramc = IOMEM(AT91SAM9263_BASE_SDRAMC0);
cfg.ebi_pio_is_peripha = true;
- cfg.matrix_csa = AT91_MATRIX_EBI0CSA;
+ cfg.matrix_csa = IOMEM(AT91SAM9263_BASE_MATRIX + AT91SAM9263_MATRIX_EBI0CSA);
usb_a9263_board_config(&cfg);
- at91sam926x_board_init(&cfg);
+ at91sam9263_board_init(&cfg);
barebox_arm_entry(AT91_CHIPSELECT_1, at91_get_sdram_size(cfg.sdramc),
NULL);
diff --git a/arch/arm/boards/zii-imx51-rdu1/board.c b/arch/arm/boards/zii-imx51-rdu1/board.c
index 46368ccccf..f739f3b7b4 100644
--- a/arch/arm/boards/zii-imx51-rdu1/board.c
+++ b/arch/arm/boards/zii-imx51-rdu1/board.c
@@ -17,9 +17,16 @@
#include <common.h>
#include <init.h>
+#include <environment.h>
#include <mach/bbu.h>
#include <libfile.h>
#include <mach/imx5.h>
+#include <net.h>
+#include <linux/crc8.h>
+#include <linux/sizes.h>
+#include <linux/nvmem-consumer.h>
+
+#include <envfs.h>
static int zii_rdu1_init(void)
{
@@ -45,3 +52,175 @@ static int zii_rdu1_init(void)
return 0;
}
coredevice_initcall(zii_rdu1_init);
+
+#define KEY 0
+#define VALUE 1
+#define STRINGS_NUM 2
+
+static int zii_rdu1_load_config(void)
+{
+ struct device_node *np, *root;
+ size_t len, remaining_space;
+ const uint8_t crc8_polynomial = 0x8c;
+ DECLARE_CRC8_TABLE(crc8_table);
+ const char *cursor, *end;
+ const char *file = "/dev/dataflash0.config";
+ uint8_t *config;
+ int ret = 0;
+ enum {
+ BLOB_SPINOR,
+ BLOB_RAVE_SP_EEPROM,
+ BLOB_MICROWIRE,
+ } blob;
+
+ if (!of_machine_is_compatible("zii,imx51-rdu1"))
+ return 0;
+
+ crc8_populate_lsb(crc8_table, crc8_polynomial);
+
+ for (blob = BLOB_SPINOR; blob <= BLOB_MICROWIRE; blob++) {
+ switch (blob) {
+ case BLOB_MICROWIRE:
+ file = "/dev/microwire-eeprom";
+ /* FALLTHROUGH */
+ case BLOB_SPINOR:
+ config = read_file(file, &remaining_space);
+ if (!config) {
+ pr_err("Failed to read %s\n", file);
+ return -EIO;
+ }
+ break;
+ case BLOB_RAVE_SP_EEPROM:
+ /* Needed for error logging below */
+ file = "shadow copy in RAVE SP EEPROM";
+
+ root = of_get_root_node();
+ np = of_find_node_by_name(root, "eeprom@a4");
+ if (!np)
+ return -ENODEV;
+
+ pr_info("Loading %s, this may take a while\n", file);
+
+ remaining_space = SZ_1K;
+ config = nvmem_cell_get_and_read(np, "shadow-config",
+ remaining_space);
+ if (IS_ERR(config))
+ return PTR_ERR(config);
+
+ break;
+ }
+
+ /*
+ * The environment blob has its CRC8 stored as the
+ * last byte of the blob, so calculating CRC8 over the
+ * whole things should return 0
+ */
+ if (crc8(crc8_table, config, remaining_space, 0)) {
+ pr_err("CRC mismatch for %s\n", file);
+ free(config);
+ config = NULL;
+ } else {
+ /*
+ * We are done if there's a blob with a valid
+ * CRC8
+ */
+ break;
+ }
+ }
+
+ if (!config) {
+ pr_err("No valid config blobs were found\n");
+ ret = -EINVAL;
+ goto free_config;
+ }
+
+ /*
+ * Last byte is CRC8, so it is of no use for our parsing
+ * algorithm
+ */
+ remaining_space--;
+
+ cursor = config;
+ end = cursor + remaining_space;
+
+ /*
+ * The environemnt is stored a a bunch of zero-terminated
+ * ASCII strings in "key":"value" pairs
+ */
+ while (cursor < end) {
+ const char *strings[STRINGS_NUM] = { NULL, NULL };
+ char *key;
+ unsigned int i;
+
+ for (i = 0; i < ARRAY_SIZE(strings); i++) {
+ if (!*cursor) {
+ /* We assume that last key:value pair
+ * will be terminated by an extra '\0'
+ * at the end */
+ goto free_config;
+ }
+
+ len = strnlen(cursor, remaining_space);
+ if (len >= remaining_space) {
+ ret = -EOVERFLOW;
+ goto free_config;
+ }
+
+ strings[i] = cursor;
+
+ len++; /* Account for '\0' at the end of the string */
+ cursor += len;
+ remaining_space -= len;
+
+ if (cursor > end) {
+ ret = -EOVERFLOW;
+ goto free_config;
+ }
+ }
+
+ key = basprintf("config_%s", strings[KEY]);
+ ret = setenv(key, strings[VALUE]);
+ free(key);
+
+ if (ret)
+ goto free_config;
+ }
+
+free_config:
+ free(config);
+ return ret;
+}
+late_initcall(zii_rdu1_load_config);
+
+static int zii_rdu1_ethernet_init(void)
+{
+ const char *mac_string;
+ struct device_node *np, *root;
+ uint8_t mac[ETH_ALEN];
+ int ret;
+
+ if (!of_machine_is_compatible("zii,imx51-rdu1"))
+ return 0;
+
+ root = of_get_root_node();
+
+ np = of_find_node_by_alias(root, "ethernet0");
+ if (!np) {
+ pr_warn("Failed to find ethernet0\n");
+ return -ENOENT;
+ }
+
+ mac_string = getenv("config_mac");
+ if (!mac_string)
+ return -ENOENT;
+
+ ret = string_to_ethaddr(mac_string, mac);
+ if (ret < 0)
+ return ret;
+
+ of_eth_register_ethaddr(np, mac);
+ return 0;
+}
+/* This needs to happen only after zii_rdu1_load_config was
+ * executed */
+environment_initcall(zii_rdu1_ethernet_init);
diff --git a/arch/arm/boards/zii-imx6q-rdu2/board.c b/arch/arm/boards/zii-imx6q-rdu2/board.c
index c99f993f02..6352f49c5a 100644
--- a/arch/arm/boards/zii-imx6q-rdu2/board.c
+++ b/arch/arm/boards/zii-imx6q-rdu2/board.c
@@ -15,7 +15,9 @@
#include <common.h>
#include <envfs.h>
+#include <fs.h>
#include <gpio.h>
+#include <i2c/i2c.h>
#include <init.h>
#include <mach/bbu.h>
#include <mach/imx6.h>
@@ -97,50 +99,29 @@ static int rdu2_reset_audio_touchscreen_nfc(void)
*/
late_initcall(rdu2_reset_audio_touchscreen_nfc);
-static const struct gpio rdu2_front_panel_usb_gpios[] = {
- {
- .gpio = IMX_GPIO_NR(3, 19),
- .flags = GPIOF_OUT_INIT_LOW,
- .label = "usb-emulation",
- },
- {
- .gpio = IMX_GPIO_NR(3, 20),
- .flags = GPIOF_OUT_INIT_HIGH,
- .label = "usb-mode1",
- },
- {
- .gpio = IMX_GPIO_NR(3, 23),
- .flags = GPIOF_OUT_INIT_HIGH,
- .label = "usb-mode2",
- },
-};
-
-static int rdu2_enable_front_panel_usb(void)
+static int rdu2_devices_init(void)
{
- int ret;
+ struct i2c_client client;
if (!of_machine_is_compatible("zii,imx6q-zii-rdu2") &&
!of_machine_is_compatible("zii,imx6qp-zii-rdu2"))
return 0;
- ret = gpio_request_array(rdu2_front_panel_usb_gpios,
- ARRAY_SIZE(rdu2_front_panel_usb_gpios));
- if (ret) {
- pr_err("Failed to request RDU2 front panel USB gpios: %s\n",
- strerror(-ret));
-
+ client.adapter = i2c_get_adapter(1);
+ if (client.adapter) {
+ u8 reg;
+
+ /*
+ * Reset PMIC SW1AB and SW1C rails to 1.375V. If an event
+ * caused only the i.MX6 SoC reset, the PMIC might still be
+ * stuck on the low voltage for the slow operating point.
+ */
+ client.addr = 0x08; /* PMIC i2c address */
+ reg = 0x2b; /* 1.375V, valid for both rails */
+ i2c_write_reg(&client, 0x20, &reg, 1);
+ i2c_write_reg(&client, 0x2e, &reg, 1);
}
- return ret;
-}
-late_initcall(rdu2_enable_front_panel_usb);
-
-static int rdu2_devices_init(void)
-{
- if (!of_machine_is_compatible("zii,imx6q-zii-rdu2") &&
- !of_machine_is_compatible("zii,imx6qp-zii-rdu2"))
- return 0;
-
barebox_set_hostname("rdu2");
imx6_bbu_internal_spi_i2c_register_handler("SPI", "/dev/m25p0.barebox",
@@ -208,3 +189,32 @@ static int rdu2_ethernet_init(void)
return 0;
}
late_initcall(rdu2_ethernet_init);
+
+#define I210_CFGWORD_PCIID_157B 0x157b1a11
+static int rdu2_i210_invm(void)
+{
+ int fd;
+ u32 val;
+
+ if (!of_machine_is_compatible("zii,imx6q-zii-rdu2") &&
+ !of_machine_is_compatible("zii,imx6qp-zii-rdu2"))
+ return 0;
+
+ fd = open("/dev/e1000-invm0", O_RDWR);
+ if (fd < 0) {
+ pr_err("could not open e1000 iNVM device!\n");
+ return fd;
+ }
+
+ pread(fd, &val, sizeof(val), 0);
+ if (val == I210_CFGWORD_PCIID_157B) {
+ pr_debug("i210 already programmed correctly\n");
+ return 0;
+ }
+
+ val = I210_CFGWORD_PCIID_157B;
+ pwrite(fd, &val, sizeof(val), 0);
+
+ return 0;
+}
+late_initcall(rdu2_i210_invm);
diff --git a/arch/arm/boards/zii-vf610-dev/board.c b/arch/arm/boards/zii-vf610-dev/board.c
index 275d0a432c..a8fa1ef61f 100644
--- a/arch/arm/boards/zii-vf610-dev/board.c
+++ b/arch/arm/boards/zii-vf610-dev/board.c
@@ -64,11 +64,6 @@ static int zii_vf610_cfu1_spu3_expose_signals(void)
{
static const struct gpio signals[] = {
{
- .gpio = 107,
- .flags = GPIOF_OUT_INIT_HIGH,
- .label = "soc_sw_rstn",
- },
- {
.gpio = 98,
.flags = GPIOF_IN,
.label = "e6352_intn",