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Diffstat (limited to 'arch/arm/mach-imx/include/mach/flash-header/vf610-ddr-phy-default.imxcfg')
-rw-r--r--arch/arm/mach-imx/include/mach/flash-header/vf610-ddr-phy-default.imxcfg41
1 files changed, 0 insertions, 41 deletions
diff --git a/arch/arm/mach-imx/include/mach/flash-header/vf610-ddr-phy-default.imxcfg b/arch/arm/mach-imx/include/mach/flash-header/vf610-ddr-phy-default.imxcfg
deleted file mode 100644
index e9d5ab0ca2..0000000000
--- a/arch/arm/mach-imx/include/mach/flash-header/vf610-ddr-phy-default.imxcfg
+++ /dev/null
@@ -1,41 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * VFxxx shared DDR PHY DCD code. Intended use is to share code
- * between all board that copy VF610 Tower Board DDR reference
- * layout/design
- *
- * Copyright (C) 2018 Zodiac Inflight Innovations
- */
-
-#define DDRMC_PHY_DQ_TIMING 0x00002613
-#define DDRMC_PHY_DQS_TIMING 0x00002615
-#define DDRMC_PHY_CTRL 0x00210000
-#define DDRMC_PHY_MASTER_CTRL 0x0001012a
-#define DDRMC_PHY_SLAVE_CTRL 0x00002000
-#define DDRMC_PHY_OFF 0x00000000
-#define DDRMC_PHY_PROC_PAD_ODT 0x00010101
-#define DDRMC_PHY50_DDR3_MODE_EN_SW_HALF_CYCLE 0x00001100
-
-
-wm 32 DDRMC_PHY00 DDRMC_PHY_DQ_TIMING
-wm 32 DDRMC_PHY16 DDRMC_PHY_DQ_TIMING
-wm 32 DDRMC_PHY32 DDRMC_PHY_DQ_TIMING
-
-wm 32 DDRMC_PHY01 DDRMC_PHY_DQS_TIMING
-wm 32 DDRMC_PHY17 DDRMC_PHY_DQS_TIMING
-
-wm 32 DDRMC_PHY02 DDRMC_PHY_CTRL
-wm 32 DDRMC_PHY18 DDRMC_PHY_CTRL
-wm 32 DDRMC_PHY34 DDRMC_PHY_CTRL
-
-wm 32 DDRMC_PHY03 DDRMC_PHY_MASTER_CTRL
-wm 32 DDRMC_PHY19 DDRMC_PHY_MASTER_CTRL
-wm 32 DDRMC_PHY35 DDRMC_PHY_MASTER_CTRL
-
-wm 32 DDRMC_PHY04 DDRMC_PHY_SLAVE_CTRL
-wm 32 DDRMC_PHY20 DDRMC_PHY_SLAVE_CTRL
-wm 32 DDRMC_PHY36 DDRMC_PHY_SLAVE_CTRL
-
-wm 32 DDRMC_PHY49 DDRMC_PHY_OFF
-wm 32 DDRMC_PHY50 DDRMC_PHY50_DDR3_MODE_EN_SW_HALF_CYCLE
-wm 32 DDRMC_PHY52 DDRMC_PHY_PROC_PAD_ODT