diff options
Diffstat (limited to 'arch/arm/mach-omap/include/mach/omap3-smx.h')
| -rw-r--r-- | arch/arm/mach-omap/include/mach/omap3-smx.h | 62 |
1 files changed, 0 insertions, 62 deletions
diff --git a/arch/arm/mach-omap/include/mach/omap3-smx.h b/arch/arm/mach-omap/include/mach/omap3-smx.h deleted file mode 100644 index fb444b8cf3..0000000000 --- a/arch/arm/mach-omap/include/mach/omap3-smx.h +++ /dev/null @@ -1,62 +0,0 @@ -/** - * @file - * @brief This file contains the SMX specific register definitions - * - * Originally from Linux kernel: - * http://linux.omap.com/pub/kernel/3430zoom/linux-ldp-v1.0b.tar.gz - * include/asm-arm/arch-omap/omap34xx.h - * - * (C) Copyright 2008 - * Texas Instruments, <www.ti.com> - * Nishanth Menon <x0nishan@ti.com> - * - * Copyright (C) 2007 Texas Instruments, <www.ti.com> - * Copyright (C) 2007 Nokia Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __ASM_ARCH_OMAP_SMX_H -#define __ASM_ARCH_OMAP_SMX_H - -/* SMX-APE */ -#define PM_RT_APE_BASE_ADDR_ARM (OMAP3_SMX_APE_BASE + 0x10000) -#define PM_GPMC_BASE_ADDR_ARM (OMAP3_SMX_APE_BASE + 0x12400) -#define PM_OCM_RAM_BASE_ADDR_ARM (OMAP3_SMX_APE_BASE + 0x12800) -#define PM_OCM_ROM_BASE_ADDR_ARM (OMAP3_SMX_APE_BASE + 0x12C00) -#define PM_IVA2_BASE_ADDR_ARM (OMAP3_SMX_APE_BASE + 0x14000) - -#define RT_REQ_INFO_PERMISSION_1 (PM_RT_APE_BASE_ADDR_ARM + 0x68) -#define RT_READ_PERMISSION_0 (PM_RT_APE_BASE_ADDR_ARM + 0x50) -#define RT_WRITE_PERMISSION_0 (PM_RT_APE_BASE_ADDR_ARM + 0x58) -#define RT_ADDR_MATCH_1 (PM_RT_APE_BASE_ADDR_ARM + 0x60) - -#define GPMC_REQ_INFO_PERMISSION_0 (PM_GPMC_BASE_ADDR_ARM + 0x48) -#define GPMC_READ_PERMISSION_0 (PM_GPMC_BASE_ADDR_ARM + 0x50) -#define GPMC_WRITE_PERMISSION_0 (PM_GPMC_BASE_ADDR_ARM + 0x58) - -#define OCM_REQ_INFO_PERMISSION_0 (PM_OCM_RAM_BASE_ADDR_ARM + 0x48) -#define OCM_READ_PERMISSION_0 (PM_OCM_RAM_BASE_ADDR_ARM + 0x50) -#define OCM_WRITE_PERMISSION_0 (PM_OCM_RAM_BASE_ADDR_ARM + 0x58) -#define OCM_ADDR_MATCH_2 (PM_OCM_RAM_BASE_ADDR_ARM + 0x80) - -/* IVA2 */ -#define IVA2_REQ_INFO_PERMISSION_0 (PM_IVA2_BASE_ADDR_ARM + 0x48) -#define IVA2_READ_PERMISSION_0 (PM_IVA2_BASE_ADDR_ARM + 0x50) -#define IVA2_WRITE_PERMISSION_0 (PM_IVA2_BASE_ADDR_ARM + 0x58) - -/* SMS */ -#define SMS_SYSCONFIG (OMAP3_SMS_BASE + 0x10) -#define SMS_RG_ATT0 (OMAP3_SMS_BASE + 0x48) -#define SMS_CLASS_ARB0 (OMAP3_SMS_BASE + 0xD0) -#define BURSTCOMPLETE_GROUP7 (0x1 << 31) - -#endif /* __ASM_ARCH_OMAP_SMX_H */ |