diff options
Diffstat (limited to 'arch/riscv/boards/riscvemu')
-rw-r--r-- | arch/riscv/boards/riscvemu/Makefile | 5 | ||||
-rw-r--r-- | arch/riscv/boards/riscvemu/board.c | 10 | ||||
-rw-r--r-- | arch/riscv/boards/riscvemu/overlay-of-sram.dts | 129 | ||||
-rw-r--r-- | arch/riscv/boards/riscvemu/riscvemu-sram.dtso | 112 |
4 files changed, 121 insertions, 135 deletions
diff --git a/arch/riscv/boards/riscvemu/Makefile b/arch/riscv/boards/riscvemu/Makefile index 56949c2357..baada2136e 100644 --- a/arch/riscv/boards/riscvemu/Makefile +++ b/arch/riscv/boards/riscvemu/Makefile @@ -1,5 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-only obj-y += board.o -obj-y += overlay-of-sram.dtb.o +obj-y += riscvemu-sram.dtbo.o bbenv-$(CONFIG_CMD_TUTORIAL) += defaultenv-riscvemu + +clean-files := *.dtb *.dtb.S .*.dtc .*.pre .*.dts *.dtb.z +clean-files += *.dtbo *.dtbo.S .*.dtso diff --git a/arch/riscv/boards/riscvemu/board.c b/arch/riscv/boards/riscvemu/board.c index d9c7bd77b8..afd6608ac5 100644 --- a/arch/riscv/boards/riscvemu/board.c +++ b/arch/riscv/boards/riscvemu/board.c @@ -33,17 +33,17 @@ static void __noreturn riscvemu_restart(struct restart_handler *rst) priv->restart(riscv_hartid(), barebox_riscv_boot_dtb()); } -extern char __dtb_overlay_of_sram_start[]; +extern char __dtbo_riscvemu_sram_start[]; -static int riscvemu_probe(struct device_d *dev) +static int riscvemu_probe(struct device *dev) { struct device_node *of_chosen; struct device_node *overlay; struct riscvemu_priv *priv; u64 start; - overlay = of_unflatten_dtb(__dtb_overlay_of_sram_start, INT_MAX); - of_overlay_apply_tree(dev->device_node, overlay); + overlay = of_unflatten_dtb(__dtbo_riscvemu_sram_start, INT_MAX); + of_overlay_apply_tree(dev->of_node, overlay); /* of_probe() will happen later at of_populate_initcall */ if (IS_ENABLED(CONFIG_CMD_TUTORIAL)) @@ -69,7 +69,7 @@ static const struct of_device_id riscvemu_of_match[] = { }; BAREBOX_DEEP_PROBE_ENABLE(riscvemu_of_match); -static struct driver_d riscvemu_board_driver = { +static struct driver riscvemu_board_driver = { .name = "board-riscvemu", .probe = riscvemu_probe, .of_compatible = riscvemu_of_match, diff --git a/arch/riscv/boards/riscvemu/overlay-of-sram.dts b/arch/riscv/boards/riscvemu/overlay-of-sram.dts deleted file mode 100644 index 506d45bde9..0000000000 --- a/arch/riscv/boards/riscvemu/overlay-of-sram.dts +++ /dev/null @@ -1,129 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -/dts-v1/; -/plugin/; - -/ { - fragment@0 { - target-path = "/soc"; - __overlay__ { - #address-cells = <2>; - #size-cells = <2>; - sram@0 { - compatible = "mtd-ram"; - reg = <0 0x1000 0 0x10000>; - #address-cells = <1>; - #size-cells = <1>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "bootrom"; - reg = <0x0 0x40>; - }; - - partition@40 { - label = "fdt"; - reg = <0x40 0x1fc0>; - }; - - environment_sram: partition@3000 { - label = "barebox-environment"; - reg = <0x3000 0xb000>; - }; - - backend_state_sram: partition@e000 { - label = "barebox-state"; - reg = <0xe000 0x1000>; - }; - }; - }; - }; - }; - - fragment@2 { - target-path = "/chosen"; - __overlay__ { - environment { - compatible = "barebox,environment"; - device-path = "/soc/sram@0/partitions/partition@3000"; - }; - }; - }; - - fragment@3 { - target-path = "/"; - __overlay__ { - aliases { - state = "/state"; - }; - - state { - #address-cells = <1>; - #size-cells = <1>; - compatible = "barebox,state"; - magic = <0x290cf8c6>; - backend-type = "raw"; - backend = <&backend_state_sram>; - backend-stridesize = <64>; - - bootstate { - #address-cells = <1>; - #size-cells = <1>; - - system0 { - #address-cells = <1>; - #size-cells = <1>; - - remaining_attempts@0 { - reg = <0x0 0x4>; - type = "uint32"; - default = <3>; - }; - - priority@4 { - reg = <0x4 0x4>; - type = "uint32"; - default = <20>; - }; - }; - - system1 { - #address-cells = <1>; - #size-cells = <1>; - - remaining_attempts@8 { - reg = <0x8 0x4>; - type = "uint32"; - default = <3>; - }; - - priority@c { - reg = <0xc 0x4>; - type = "uint32"; - default = <21>; - }; - }; - - last_chosen@10 { - reg = <0x10 0x4>; - type = "uint32"; - }; - }; - }; - }; - }; - - fragment@4 { - target-path = "/htif"; - #address-cells = <2>; - #size-cells = <2>; - - __overlay__ { - reg = <0 0x40008000 0 0x8>; - }; - }; -}; diff --git a/arch/riscv/boards/riscvemu/riscvemu-sram.dtso b/arch/riscv/boards/riscvemu/riscvemu-sram.dtso new file mode 100644 index 0000000000..395fde84c1 --- /dev/null +++ b/arch/riscv/boards/riscvemu/riscvemu-sram.dtso @@ -0,0 +1,112 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +/dts-v1/; +/plugin/; + +&{/soc} { + #address-cells = <2>; + #size-cells = <2>; + sram@1000 { + compatible = "mtd-ram"; + reg = <0 0x1000 0 0x10000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "bootrom"; + reg = <0x0 0x40>; + }; + + partition@40 { + label = "fdt"; + reg = <0x40 0x1fc0>; + }; + + environment_sram: partition@3000 { + label = "barebox-environment"; + reg = <0x3000 0xb000>; + }; + + backend_state_sram: partition@e000 { + label = "barebox-state"; + reg = <0xe000 0x1000>; + }; + }; + }; +}; + +&{/chosen} { + environment { + compatible = "barebox,environment"; + device-path = "/soc/sram@1000/partitions/partition@3000"; + }; +}; + +&{/} { + aliases { + state = "/state"; + }; + + state { + #address-cells = <1>; + #size-cells = <1>; + compatible = "barebox,state"; + magic = <0x290cf8c6>; + backend-type = "raw"; + backend = <&backend_state_sram>; + backend-stridesize = <64>; + + bootstate { + #address-cells = <1>; + #size-cells = <1>; + + system0 { + #address-cells = <1>; + #size-cells = <1>; + + remaining_attempts@0 { + reg = <0x0 0x4>; + type = "uint32"; + default = <3>; + }; + + priority@4 { + reg = <0x4 0x4>; + type = "uint32"; + default = <20>; + }; + }; + + system1 { + #address-cells = <1>; + #size-cells = <1>; + + remaining_attempts@8 { + reg = <0x8 0x4>; + type = "uint32"; + default = <3>; + }; + + priority@c { + reg = <0xc 0x4>; + type = "uint32"; + default = <21>; + }; + }; + + last_chosen@10 { + reg = <0x10 0x4>; + type = "uint32"; + }; + }; + }; +}; + +&{/htif} { + reg = <0 0x40008000 0 0x8>; +}; |