diff options
Diffstat (limited to 'dts/Bindings/display/exynos')
| -rw-r--r-- | dts/Bindings/display/exynos/exynos7-decon.txt | 3 | ||||
| -rw-r--r-- | dts/Bindings/display/exynos/exynos_dp.txt | 2 | ||||
| -rw-r--r-- | dts/Bindings/display/exynos/samsung-fimd.txt | 3 |
3 files changed, 0 insertions, 8 deletions
diff --git a/dts/Bindings/display/exynos/exynos7-decon.txt b/dts/Bindings/display/exynos/exynos7-decon.txt index 9e2e7f6f76..53912c99ec 100644 --- a/dts/Bindings/display/exynos/exynos7-decon.txt +++ b/dts/Bindings/display/exynos/exynos7-decon.txt @@ -9,9 +9,6 @@ Required properties: - reg: physical base address and length of the DECON registers set. -- interrupt-parent: should be the phandle of the decon controller's - parent interrupt controller. - - interrupts: should contain a list of all DECON IP block interrupts in the order: FIFO Level, VSYNC, LCD_SYSTEM. The interrupt specifier format depends on the interrupt controller used. diff --git a/dts/Bindings/display/exynos/exynos_dp.txt b/dts/Bindings/display/exynos/exynos_dp.txt index ade5d8eebf..9b6cba3f82 100644 --- a/dts/Bindings/display/exynos/exynos_dp.txt +++ b/dts/Bindings/display/exynos/exynos_dp.txt @@ -25,8 +25,6 @@ Required properties for dp-controller: from common clock binding: handle to dp clock. -clock-names: from common clock binding: Shall be "dp". - -interrupt-parent: - phandle to Interrupt combiner node. -phys: from general PHY binding: the phandle for the PHY device. -phy-names: diff --git a/dts/Bindings/display/exynos/samsung-fimd.txt b/dts/Bindings/display/exynos/samsung-fimd.txt index 5837402c3a..b3096421d4 100644 --- a/dts/Bindings/display/exynos/samsung-fimd.txt +++ b/dts/Bindings/display/exynos/samsung-fimd.txt @@ -16,9 +16,6 @@ Required properties: - reg: physical base address and length of the FIMD registers set. -- interrupt-parent: should be the phandle of the fimd controller's - parent interrupt controller. - - interrupts: should contain a list of all FIMD IP block interrupts in the order: FIFO Level, VSYNC, LCD_SYSTEM. The interrupt specifier format depends on the interrupt controller used. |