diff options
Diffstat (limited to 'dts/Bindings/net/can')
-rw-r--r-- | dts/Bindings/net/can/allwinner,sun4i-a10-can.yaml | 31 | ||||
-rw-r--r-- | dts/Bindings/net/can/bosch,c_can.yaml | 13 | ||||
-rw-r--r-- | dts/Bindings/net/can/bosch,m_can.yaml | 86 | ||||
-rw-r--r-- | dts/Bindings/net/can/can-controller.yaml | 2 | ||||
-rw-r--r-- | dts/Bindings/net/can/can-transceiver.yaml | 2 | ||||
-rw-r--r-- | dts/Bindings/net/can/cc770.txt | 2 | ||||
-rw-r--r-- | dts/Bindings/net/can/ctu,ctucanfd.yaml | 66 | ||||
-rw-r--r-- | dts/Bindings/net/can/fsl,flexcan.yaml | 19 | ||||
-rw-r--r-- | dts/Bindings/net/can/microchip,mcp251xfd.yaml | 24 | ||||
-rw-r--r-- | dts/Bindings/net/can/microchip,mpfs-can.yaml | 47 | ||||
-rw-r--r-- | dts/Bindings/net/can/nxp,sja1000.yaml | 136 | ||||
-rw-r--r-- | dts/Bindings/net/can/renesas,rcar-canfd.yaml | 151 | ||||
-rw-r--r-- | dts/Bindings/net/can/sja1000.txt | 58 | ||||
-rw-r--r-- | dts/Bindings/net/can/st,stm32-bxcan.yaml | 96 | ||||
-rw-r--r-- | dts/Bindings/net/can/tcan4x5x.txt | 16 | ||||
-rw-r--r-- | dts/Bindings/net/can/xilinx,can.yaml | 169 | ||||
-rw-r--r-- | dts/Bindings/net/can/xilinx_can.txt | 61 |
17 files changed, 730 insertions, 249 deletions
diff --git a/dts/Bindings/net/can/allwinner,sun4i-a10-can.yaml b/dts/Bindings/net/can/allwinner,sun4i-a10-can.yaml index a95960ee3f..e42ea28d6a 100644 --- a/dts/Bindings/net/can/allwinner,sun4i-a10-can.yaml +++ b/dts/Bindings/net/can/allwinner,sun4i-a10-can.yaml @@ -4,12 +4,15 @@ $id: http://devicetree.org/schemas/net/can/allwinner,sun4i-a10-can.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 CAN Controller Device Tree Bindings +title: Allwinner A10 CAN Controller maintainers: - Chen-Yu Tsai <wens@csie.org> - Maxime Ripard <mripard@kernel.org> +allOf: + - $ref: can-controller.yaml# + properties: compatible: oneOf: @@ -17,6 +20,8 @@ properties: - const: allwinner,sun7i-a20-can - const: allwinner,sun4i-a10-can - const: allwinner,sun4i-a10-can + - const: allwinner,sun8i-r40-can + - const: allwinner,sun20i-d1-can reg: maxItems: 1 @@ -27,6 +32,20 @@ properties: clocks: maxItems: 1 + resets: + maxItems: 1 + +if: + properties: + compatible: + enum: + - allwinner,sun8i-r40-can + - allwinner,sun20i-d1-can + +then: + required: + - resets + required: - compatible - reg @@ -47,5 +66,15 @@ examples: interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_APB1_CAN>; }; + - | + #define RST_BUS_CAN 68 + #define CLK_BUS_CAN 91 + can1: can@1c2bc00 { + compatible = "allwinner,sun8i-r40-can"; + reg = <0x01c2bc00 0x400>; + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_CAN>; + resets = <&ccu RST_BUS_CAN>; + }; ... diff --git a/dts/Bindings/net/can/bosch,c_can.yaml b/dts/Bindings/net/can/bosch,c_can.yaml index 2cd145a642..4d7d67ee17 100644 --- a/dts/Bindings/net/can/bosch,c_can.yaml +++ b/dts/Bindings/net/can/bosch,c_can.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/net/can/bosch,c_can.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Bosch C_CAN/D_CAN controller Device Tree Bindings +title: Bosch C_CAN/D_CAN controller description: Bosch C_CAN/D_CAN controller for CAN bus @@ -56,10 +56,10 @@ properties: offset). $ref: /schemas/types.yaml#/definitions/phandle-array items: - items: - - description: The phandle to the system control region. - - description: The register offset. - - description: The CAN instance number. + - items: + - description: The phandle to the system control region. + - description: The register offset. + - description: The CAN instance number. resets: maxItems: 1 @@ -80,8 +80,6 @@ if: then: properties: interrupts: - minItems: 4 - maxItems: 4 items: - description: Error and status IRQ - description: Message object IRQ @@ -91,7 +89,6 @@ then: else: properties: interrupts: - maxItems: 1 items: - description: Error and status IRQ diff --git a/dts/Bindings/net/can/bosch,m_can.yaml b/dts/Bindings/net/can/bosch,m_can.yaml index fb547e26c6..f9ffb963d6 100644 --- a/dts/Bindings/net/can/bosch,m_can.yaml +++ b/dts/Bindings/net/can/bosch,m_can.yaml @@ -4,12 +4,15 @@ $id: http://devicetree.org/schemas/net/can/bosch,m_can.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Bosch MCAN controller Bindings +title: Bosch MCAN controller description: Bosch MCAN controller for CAN bus maintainers: - - Sriram Dash <sriram.dash@samsung.com> + - Chandrasekar Ramakrishnan <rcsekar@samsung.com> + +allOf: + - $ref: can-controller.yaml# properties: compatible: @@ -66,8 +69,8 @@ properties: M_CAN includes the following elements according to user manual: 11-bit Filter 0-128 elements / 0-128 words 29-bit Filter 0-64 elements / 0-128 words - Rx FIFO 0 0-64 elements / 0-1152 words - Rx FIFO 1 0-64 elements / 0-1152 words + Rx FIFO 0 0-64 elements / 0-1152 words + Rx FIFO 1 0-64 elements / 0-1152 words Rx Buffers 0-64 elements / 0-1152 words Tx Event FIFO 0-32 elements / 0-64 words Tx Buffers 0-32 elements / 0-576 words @@ -76,33 +79,32 @@ properties: M_CAN user manual for details. $ref: /schemas/types.yaml#/definitions/int32-array items: - items: - - description: The 'offset' is an address offset of the Message RAM where - the following elements start from. This is usually set to 0x0 if - you're using a private Message RAM. - default: 0 - - description: 11-bit Filter 0-128 elements / 0-128 words - minimum: 0 - maximum: 128 - - description: 29-bit Filter 0-64 elements / 0-128 words - minimum: 0 - maximum: 64 - - description: Rx FIFO 0 0-64 elements / 0-1152 words - minimum: 0 - maximum: 64 - - description: Rx FIFO 1 0-64 elements / 0-1152 words - minimum: 0 - maximum: 64 - - description: Rx Buffers 0-64 elements / 0-1152 words - minimum: 0 - maximum: 64 - - description: Tx Event FIFO 0-32 elements / 0-64 words - minimum: 0 - maximum: 32 - - description: Tx Buffers 0-32 elements / 0-576 words - minimum: 0 - maximum: 32 - maxItems: 1 + - description: The 'offset' is an address offset of the Message RAM where + the following elements start from. This is usually set to 0x0 if + you're using a private Message RAM. + default: 0 + - description: 11-bit Filter 0-128 elements / 0-128 words + minimum: 0 + maximum: 128 + - description: 29-bit Filter 0-64 elements / 0-128 words + minimum: 0 + maximum: 64 + - description: Rx FIFO 0 0-64 elements / 0-1152 words + minimum: 0 + maximum: 64 + - description: Rx FIFO 1 0-64 elements / 0-1152 words + minimum: 0 + maximum: 64 + - description: Rx Buffers 0-64 elements / 0-1152 words + minimum: 0 + maximum: 64 + - description: Tx Event FIFO 0-32 elements / 0-64 words + minimum: 0 + maximum: 32 + - description: Tx Buffers 0-32 elements / 0-576 words + minimum: 0 + maximum: 32 + minItems: 1 power-domains: description: @@ -120,16 +122,15 @@ required: - compatible - reg - reg-names - - interrupts - - interrupt-names - clocks - clock-names - bosch,mram-cfg -additionalProperties: false +unevaluatedProperties: false examples: - | + // Example with interrupts #include <dt-bindings/clock/imx6sx-clock.h> can@20e8000 { compatible = "bosch,m_can"; @@ -147,4 +148,21 @@ examples: }; }; + - | + // Example with timer polling + #include <dt-bindings/clock/imx6sx-clock.h> + can@20e8000 { + compatible = "bosch,m_can"; + reg = <0x020e8000 0x4000>, <0x02298000 0x4000>; + reg-names = "m_can", "message_ram"; + clocks = <&clks IMX6SX_CLK_CANFD>, + <&clks IMX6SX_CLK_CANFD>; + clock-names = "hclk", "cclk"; + bosch,mram-cfg = <0x0 0 0 32 0 0 0 1>; + + can-transceiver { + max-bitrate = <5000000>; + }; + }; + ... diff --git a/dts/Bindings/net/can/can-controller.yaml b/dts/Bindings/net/can/can-controller.yaml index 1f0e980510..217be90960 100644 --- a/dts/Bindings/net/can/can-controller.yaml +++ b/dts/Bindings/net/can/can-controller.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/net/can/can-controller.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: CAN Controller Generic Binding +title: CAN Controller Common Properties maintainers: - Marc Kleine-Budde <mkl@pengutronix.de> diff --git a/dts/Bindings/net/can/can-transceiver.yaml b/dts/Bindings/net/can/can-transceiver.yaml index d1ef1fe6ab..d422b3921f 100644 --- a/dts/Bindings/net/can/can-transceiver.yaml +++ b/dts/Bindings/net/can/can-transceiver.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/net/can/can-transceiver.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: CAN transceiver Bindings +title: CAN transceiver description: CAN transceiver generic properties bindings diff --git a/dts/Bindings/net/can/cc770.txt b/dts/Bindings/net/can/cc770.txt index 77027bf646..042200cf44 100644 --- a/dts/Bindings/net/can/cc770.txt +++ b/dts/Bindings/net/can/cc770.txt @@ -26,7 +26,7 @@ Optional properties: will be disabled. - bosch,slew-rate : slew rate of the CLKOUT signal. If not specified, - a resonable value will be calculated. + a reasonable value will be calculated. - bosch,disconnect-rx0-input : see data sheet. diff --git a/dts/Bindings/net/can/ctu,ctucanfd.yaml b/dts/Bindings/net/can/ctu,ctucanfd.yaml new file mode 100644 index 0000000000..a009a44029 --- /dev/null +++ b/dts/Bindings/net/can/ctu,ctucanfd.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/can/ctu,ctucanfd.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: CTU CAN FD Open-source IP Core + +description: | + Open-source CAN FD IP core developed at the Czech Technical University in Prague + + The core sources and documentation on project page + [1] sources : https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core + [2] datasheet : https://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/doc/Datasheet.pdf + + Integration in Xilinx Zynq SoC based system together with + OpenCores SJA1000 compatible controllers + [3] project : https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top + Martin Jerabek dimploma thesis with integration and testing + framework description + [4] PDF : https://dspace.cvut.cz/bitstream/handle/10467/80366/F3-DP-2019-Jerabek-Martin-Jerabek-thesis-2019-canfd.pdf + +maintainers: + - Pavel Pisa <pisa@cmp.felk.cvut.cz> + - Ondrej Ille <ondrej.ille@gmail.com> + - Martin Jerabek <martin.jerabek01@gmail.com> + +allOf: + - $ref: can-controller.yaml# + +properties: + compatible: + oneOf: + - items: + - const: ctu,ctucanfd-2 + - const: ctu,ctucanfd + - const: ctu,ctucanfd + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + description: | + phandle of reference clock (100 MHz is appropriate + for FPGA implementation on Zynq-7000 system). + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + ctu_can_fd_0: can@43c30000 { + compatible = "ctu,ctucanfd"; + interrupts = <0 30 4>; + clocks = <&clkc 15>; + reg = <0x43c30000 0x10000>; + }; diff --git a/dts/Bindings/net/can/fsl,flexcan.yaml b/dts/Bindings/net/can/fsl,flexcan.yaml index 3f0ee17c14..f197d9b516 100644 --- a/dts/Bindings/net/can/fsl,flexcan.yaml +++ b/dts/Bindings/net/can/fsl,flexcan.yaml @@ -17,6 +17,7 @@ properties: compatible: oneOf: - enum: + - fsl,imx93-flexcan - fsl,imx8qm-flexcan - fsl,imx8mp-flexcan - fsl,imx6q-flexcan @@ -38,6 +39,9 @@ properties: - fsl,imx6sx-flexcan - const: fsl,imx6q-flexcan - items: + - const: fsl,imx95-flexcan + - const: fsl,imx93-flexcan + - items: - enum: - fsl,ls1028ar1-flexcan - const: fsl,lx2160ar1-flexcan @@ -62,6 +66,9 @@ properties: boot loader. This property should only be used the used operating system doesn't support the clocks and clock-names property. + power-domains: + maxItems: 1 + xceiver-supply: description: Regulator that powers the CAN transceiver. @@ -84,12 +91,12 @@ properties: req_bit is the bit offset of CAN stop request. $ref: /schemas/types.yaml#/definitions/phandle-array items: - items: - - description: The 'gpr' is the phandle to general purpose register node. - - description: The 'req_gpr' is the gpr register offset of CAN stop request. - maximum: 0xff - - description: The 'req_bit' is the bit offset of CAN stop request. - maximum: 0x1f + - items: + - description: The 'gpr' is the phandle to general purpose register node. + - description: The 'req_gpr' is the gpr register offset of CAN stop request. + maximum: 0xff + - description: The 'req_bit' is the bit offset of CAN stop request. + maximum: 0x1f fsl,clk-source: description: | diff --git a/dts/Bindings/net/can/microchip,mcp251xfd.yaml b/dts/Bindings/net/can/microchip,mcp251xfd.yaml index 2a884c1fe0..2a98b26630 100644 --- a/dts/Bindings/net/can/microchip,mcp251xfd.yaml +++ b/dts/Bindings/net/can/microchip,mcp251xfd.yaml @@ -4,23 +4,25 @@ $id: http://devicetree.org/schemas/net/can/microchip,mcp251xfd.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: - Microchip MCP2517FD and MCP2518FD stand-alone CAN controller device tree - bindings +title: Microchip MCP2517FD, MCP2518FD and MCP251863 stand-alone CAN controller maintainers: - Marc Kleine-Budde <mkl@pengutronix.de> +allOf: + - $ref: can-controller.yaml# + properties: compatible: oneOf: - - const: microchip,mcp2517fd - description: for MCP2517FD - - const: microchip,mcp2518fd - description: for MCP2518FD - - const: microchip,mcp251xfd - description: to autodetect chip variant - + - enum: + - microchip,mcp2517fd + - microchip,mcp2518fd + - microchip,mcp251xfd + - items: + - enum: + - microchip,mcp251863 + - const: microchip,mcp2518fd reg: maxItems: 1 @@ -60,7 +62,7 @@ examples: #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/irq.h> - spi0 { + spi { #address-cells = <1>; #size-cells = <0>; diff --git a/dts/Bindings/net/can/microchip,mpfs-can.yaml b/dts/Bindings/net/can/microchip,mpfs-can.yaml new file mode 100644 index 0000000000..01e4d4a54d --- /dev/null +++ b/dts/Bindings/net/can/microchip,mpfs-can.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/can/microchip,mpfs-can.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: + Microchip PolarFire SoC (MPFS) can controller + +maintainers: + - Conor Dooley <conor.dooley@microchip.com> + +allOf: + - $ref: can-controller.yaml# + +properties: + compatible: + const: microchip,mpfs-can + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: AHB peripheral clock + - description: CAN bus clock + +required: + - compatible + - reg + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + can@2010c000 { + compatible = "microchip,mpfs-can"; + reg = <0x2010c000 0x1000>; + clocks = <&clkcfg 17>, <&clkcfg 37>; + interrupt-parent = <&plic>; + interrupts = <56>; + }; diff --git a/dts/Bindings/net/can/nxp,sja1000.yaml b/dts/Bindings/net/can/nxp,sja1000.yaml new file mode 100644 index 0000000000..144a378513 --- /dev/null +++ b/dts/Bindings/net/can/nxp,sja1000.yaml @@ -0,0 +1,136 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/can/nxp,sja1000.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Memory mapped SJA1000 CAN controller from NXP (formerly Philips) + +maintainers: + - Wolfgang Grandegger <wg@grandegger.com> + +properties: + compatible: + oneOf: + - enum: + - nxp,sja1000 + - technologic,sja1000 + - items: + - enum: + - renesas,r9a06g032-sja1000 # RZ/N1D + - renesas,r9a06g033-sja1000 # RZ/N1S + - const: renesas,rzn1-sja1000 # RZ/N1 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + power-domains: + maxItems: 1 + + reg-io-width: + description: I/O register width (in bytes) implemented by this device + default: 1 + enum: [ 1, 2, 4 ] + + nxp,external-clock-frequency: + $ref: /schemas/types.yaml#/definitions/uint32 + default: 16000000 + description: | + Frequency of the external oscillator clock in Hz. + The internal clock frequency used by the SJA1000 is half of that value. + + nxp,tx-output-mode: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 1, 2, 3 ] + default: 1 + description: | + operation mode of the TX output control logic. Valid values are: + <0> : bi-phase output mode + <1> : normal output mode (default) + <2> : test output mode + <3> : clock output mode + + nxp,tx-output-config: + $ref: /schemas/types.yaml#/definitions/uint32 + default: 0x02 + description: | + TX output pin configuration. Valid values are any one of the below + or combination of TX0 and TX1: + <0x01> : TX0 invert + <0x02> : TX0 pull-down (default) + <0x04> : TX0 pull-up + <0x06> : TX0 push-pull + <0x08> : TX1 invert + <0x10> : TX1 pull-down + <0x20> : TX1 pull-up + <0x30> : TX1 push-pull + + nxp,clock-out-frequency: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + clock frequency in Hz on the CLKOUT pin. + If not specified or if the specified value is 0, the CLKOUT pin + will be disabled. + + nxp,no-comparator-bypass: + type: boolean + description: Allows to disable the CAN input comparator. + +required: + - compatible + - reg + - interrupts + +allOf: + - $ref: can-controller.yaml# + - if: + properties: + compatible: + contains: + enum: + - technologic,sja1000 + - renesas,rzn1-sja1000 + then: + required: + - reg-io-width + - if: + properties: + compatible: + contains: + const: renesas,rzn1-sja1000 + then: + required: + - clocks + - power-domains + +unevaluatedProperties: false + +examples: + - | + can@1a000 { + compatible = "technologic,sja1000"; + reg = <0x1a000 0x100>; + interrupts = <1>; + reg-io-width = <2>; + nxp,tx-output-config = <0x06>; + nxp,external-clock-frequency = <24000000>; + }; + + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/r9a06g032-sysctrl.h> + + can@52104000 { + compatible = "renesas,r9a06g032-sja1000", "renesas,rzn1-sja1000"; + reg = <0x52104000 0x800>; + reg-io-width = <4>; + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&sysctrl R9A06G032_HCLK_CAN0>; + power-domains = <&sysctrl>; + }; diff --git a/dts/Bindings/net/can/renesas,rcar-canfd.yaml b/dts/Bindings/net/can/renesas,rcar-canfd.yaml index 546c6e6d2f..d3f45d29fa 100644 --- a/dts/Bindings/net/can/renesas,rcar-canfd.yaml +++ b/dts/Bindings/net/can/renesas,rcar-canfd.yaml @@ -9,9 +9,6 @@ title: Renesas R-Car CAN FD Controller maintainers: - Fabrizio Castro <fabrizio.castro.jz@renesas.com> -allOf: - - $ref: can-controller.yaml# - properties: compatible: oneOf: @@ -23,6 +20,7 @@ properties: - renesas,r8a774e1-canfd # RZ/G2H - renesas,r8a7795-canfd # R-Car H3 - renesas,r8a7796-canfd # R-Car M3-W + - renesas,r8a77961-canfd # R-Car M3-W+ - renesas,r8a77965-canfd # R-Car M3-N - renesas,r8a77970-canfd # R-Car V3M - renesas,r8a77980-canfd # R-Car V3H @@ -32,7 +30,15 @@ properties: - items: - enum: + - renesas,r8a779a0-canfd # R-Car V3U + - renesas,r8a779g0-canfd # R-Car V4H + - const: renesas,rcar-gen4-canfd # R-Car Gen4 + + - items: + - enum: + - renesas,r9a07g043-canfd # RZ/G2UL and RZ/Five - renesas,r9a07g044-canfd # RZ/G2{L,LC} + - renesas,r9a07g054-canfd # RZ/V2L - const: renesas,rzg2l-canfd # RZ/G2L family reg: @@ -58,7 +64,7 @@ properties: $ref: /schemas/types.yaml#/definitions/flag description: The controller can operate in either CAN FD only mode (default) or - Classical CAN only mode. The mode is global to both the channels. + Classical CAN only mode. The mode is global to all channels. Specify this property to put the controller in Classical CAN only mode. assigned-clocks: @@ -72,17 +78,23 @@ properties: description: Maximum frequency of the CANFD clock. patternProperties: - "^channel[01]$": + "^channel[0-7]$": type: object description: - The controller supports two channels and each is represented as a child - node. Each child node supports the "status" property only, which - is used to enable/disable the respective channel. + The controller supports multiple channels and each is represented as a + child node. Each channel can be enabled/disabled individually. + + properties: + phys: + maxItems: 1 + + additionalProperties: false required: - compatible - reg - interrupts + - interrupt-names - clocks - clock-names - power-domains @@ -92,61 +104,73 @@ required: - channel0 - channel1 -if: - properties: - compatible: - contains: - enum: - - renesas,rzg2l-canfd -then: - properties: - interrupts: - items: - - description: CAN global error interrupt - - description: CAN receive FIFO interrupt - - description: CAN0 error interrupt - - description: CAN0 transmit interrupt - - description: CAN0 transmit/receive FIFO receive completion interrupt - - description: CAN1 error interrupt - - description: CAN1 transmit interrupt - - description: CAN1 transmit/receive FIFO receive completion interrupt - - interrupt-names: - items: - - const: g_err - - const: g_recc - - const: ch0_err - - const: ch0_rec - - const: ch0_trx - - const: ch1_err - - const: ch1_rec - - const: ch1_trx - - resets: - maxItems: 2 - - reset-names: - items: - - const: rstp_n - - const: rstc_n - - required: - - interrupt-names - - reset-names -else: - properties: - interrupts: - items: - - description: Channel interrupt - - description: Global interrupt - - interrupt-names: - items: - - const: ch_int - - const: g_int - - resets: - maxItems: 1 +allOf: + - $ref: can-controller.yaml# + + - if: + properties: + compatible: + contains: + enum: + - renesas,rzg2l-canfd + then: + properties: + interrupts: + items: + - description: CAN global error interrupt + - description: CAN receive FIFO interrupt + - description: CAN0 error interrupt + - description: CAN0 transmit interrupt + - description: CAN0 transmit/receive FIFO receive completion interrupt + - description: CAN1 error interrupt + - description: CAN1 transmit interrupt + - description: CAN1 transmit/receive FIFO receive completion interrupt + + interrupt-names: + items: + - const: g_err + - const: g_recc + - const: ch0_err + - const: ch0_rec + - const: ch0_trx + - const: ch1_err + - const: ch1_rec + - const: ch1_trx + + resets: + maxItems: 2 + + reset-names: + items: + - const: rstp_n + - const: rstc_n + + required: + - reset-names + else: + properties: + interrupts: + items: + - description: Channel interrupt + - description: Global interrupt + + interrupt-names: + items: + - const: ch_int + - const: g_int + + resets: + maxItems: 1 + + - if: + not: + properties: + compatible: + contains: + const: renesas,rcar-gen4-canfd + then: + patternProperties: + "^channel[2-7]$": false unevaluatedProperties: false @@ -162,6 +186,7 @@ examples: reg = <0xe66c0000 0x8000>; interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "ch_int", "g_int"; clocks = <&cpg CPG_MOD 914>, <&cpg CPG_CORE R8A7795_CLK_CANFD>, <&can_clk>; diff --git a/dts/Bindings/net/can/sja1000.txt b/dts/Bindings/net/can/sja1000.txt deleted file mode 100644 index ac3160eca9..0000000000 --- a/dts/Bindings/net/can/sja1000.txt +++ /dev/null @@ -1,58 +0,0 @@ -Memory mapped SJA1000 CAN controller from NXP (formerly Philips) - -Required properties: - -- compatible : should be one of "nxp,sja1000", "technologic,sja1000". - -- reg : should specify the chip select, address offset and size required - to map the registers of the SJA1000. The size is usually 0x80. - -- interrupts: property with a value describing the interrupt source - (number and sensitivity) required for the SJA1000. - -Optional properties: - -- reg-io-width : Specify the size (in bytes) of the IO accesses that - should be performed on the device. Valid value is 1, 2 or 4. - This property is ignored for technologic version. - Default to 1 (8 bits). - -- nxp,external-clock-frequency : Frequency of the external oscillator - clock in Hz. Note that the internal clock frequency used by the - SJA1000 is half of that value. If not specified, a default value - of 16000000 (16 MHz) is used. - -- nxp,tx-output-mode : operation mode of the TX output control logic: - <0x0> : bi-phase output mode - <0x1> : normal output mode (default) - <0x2> : test output mode - <0x3> : clock output mode - -- nxp,tx-output-config : TX output pin configuration: - <0x01> : TX0 invert - <0x02> : TX0 pull-down (default) - <0x04> : TX0 pull-up - <0x06> : TX0 push-pull - <0x08> : TX1 invert - <0x10> : TX1 pull-down - <0x20> : TX1 pull-up - <0x30> : TX1 push-pull - -- nxp,clock-out-frequency : clock frequency in Hz on the CLKOUT pin. - If not specified or if the specified value is 0, the CLKOUT pin - will be disabled. - -- nxp,no-comparator-bypass : Allows to disable the CAN input comparator. - -For further information, please have a look to the SJA1000 data sheet. - -Examples: - -can@3,100 { - compatible = "nxp,sja1000"; - reg = <3 0x100 0x80>; - interrupts = <2 0>; - interrupt-parent = <&mpic>; - nxp,external-clock-frequency = <16000000>; -}; - diff --git a/dts/Bindings/net/can/st,stm32-bxcan.yaml b/dts/Bindings/net/can/st,stm32-bxcan.yaml new file mode 100644 index 0000000000..de1d429889 --- /dev/null +++ b/dts/Bindings/net/can/st,stm32-bxcan.yaml @@ -0,0 +1,96 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/can/st,stm32-bxcan.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics bxCAN controller + +description: STMicroelectronics BxCAN controller for CAN bus + +maintainers: + - Dario Binacchi <dario.binacchi@amarulasolutions.com> + +allOf: + - $ref: can-controller.yaml# + +properties: + compatible: + enum: + - st,stm32f4-bxcan + + st,can-primary: + description: + Primary mode of the bxCAN peripheral is only relevant if the chip has + two CAN peripherals in dual CAN configuration. In that case they share + some of the required logic. + Not to be used if the peripheral is in single CAN configuration. + To avoid misunderstandings, it should be noted that ST documentation + uses the terms master instead of primary. + type: boolean + + st,can-secondary: + description: + Secondary mode of the bxCAN peripheral is only relevant if the chip + has two CAN peripherals in dual CAN configuration. In that case they + share some of the required logic. + Not to be used if the peripheral is in single CAN configuration. + To avoid misunderstandings, it should be noted that ST documentation + uses the terms slave instead of secondary. + type: boolean + + reg: + maxItems: 1 + + interrupts: + items: + - description: transmit interrupt + - description: FIFO 0 receive interrupt + - description: FIFO 1 receive interrupt + - description: status change error interrupt + + interrupt-names: + items: + - const: tx + - const: rx0 + - const: rx1 + - const: sce + + resets: + maxItems: 1 + + clocks: + maxItems: 1 + + st,gcan: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + The phandle to the gcan node which allows to access the 512-bytes + SRAM memory shared by the two bxCAN cells (CAN1 primary and CAN2 + secondary) in dual CAN peripheral configuration. + +required: + - compatible + - reg + - interrupts + - resets + - clocks + - st,gcan + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/stm32fx-clock.h> + #include <dt-bindings/mfd/stm32f4-rcc.h> + + can1: can@40006400 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40006400 0x200>; + interrupts = <19>, <20>, <21>, <22>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F4_APB1_RESET(CAN1)>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>; + st,can-primary; + st,gcan = <&gcan>; + }; diff --git a/dts/Bindings/net/can/tcan4x5x.txt b/dts/Bindings/net/can/tcan4x5x.txt index 0968b40aef..20c0572c98 100644 --- a/dts/Bindings/net/can/tcan4x5x.txt +++ b/dts/Bindings/net/can/tcan4x5x.txt @@ -4,7 +4,10 @@ Texas Instruments TCAN4x5x CAN Controller This file provides device node information for the TCAN4x5x interface contains. Required properties: - - compatible: "ti,tcan4x5x" + - compatible: + "ti,tcan4552", "ti,tcan4x5x" + "ti,tcan4553", "ti,tcan4x5x" or + "ti,tcan4x5x" - reg: 0 - #address-cells: 1 - #size-cells: 0 @@ -21,8 +24,12 @@ Optional properties: - reset-gpios: Hardwired output GPIO. If not defined then software reset. - device-state-gpios: Input GPIO that indicates if the device is in - a sleep state or if the device is active. - - device-wake-gpios: Wake up GPIO to wake up the TCAN device. + a sleep state or if the device is active. Not + available with tcan4552/4553. + - device-wake-gpios: Wake up GPIO to wake up the TCAN device. Not + available with tcan4552/4553. + - wakeup-source: Leave the chip running when suspended, and configure + the RX interrupt to wake up the device. Example: tcan4x5x: tcan4x5x@0 { @@ -31,10 +38,11 @@ tcan4x5x: tcan4x5x@0 { #address-cells = <1>; #size-cells = <1>; spi-max-frequency = <10000000>; - bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>; + bosch,mram-cfg = <0x0 0 0 16 0 0 1 1>; interrupt-parent = <&gpio1>; interrupts = <14 IRQ_TYPE_LEVEL_LOW>; device-state-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; device-wake-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>; reset-gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>; + wakeup-source; }; diff --git a/dts/Bindings/net/can/xilinx,can.yaml b/dts/Bindings/net/can/xilinx,can.yaml new file mode 100644 index 0000000000..8d4e5af6fd --- /dev/null +++ b/dts/Bindings/net/can/xilinx,can.yaml @@ -0,0 +1,169 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/can/xilinx,can.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: + Xilinx Axi CAN/Zynq CANPS controller + +maintainers: + - Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> + +properties: + compatible: + enum: + - xlnx,zynq-can-1.0 + - xlnx,axi-can-1.00.a + - xlnx,canfd-1.0 + - xlnx,canfd-2.0 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 2 + + clock-names: + maxItems: 2 + + power-domains: + maxItems: 1 + + tx-fifo-depth: + $ref: /schemas/types.yaml#/definitions/uint32 + description: CAN Tx fifo depth (Zynq, Axi CAN). + + rx-fifo-depth: + $ref: /schemas/types.yaml#/definitions/uint32 + description: CAN Rx fifo depth (Zynq, Axi CAN, CAN FD in sequential Rx mode) + + tx-mailbox-count: + $ref: /schemas/types.yaml#/definitions/uint32 + description: CAN Tx mailbox buffer count (CAN FD) + + resets: + maxItems: 1 + + xlnx,has-ecc: + $ref: /schemas/types.yaml#/definitions/flag + description: CAN TX_OL, TX_TL and RX FIFOs have ECC support(AXI CAN) + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +unevaluatedProperties: false + +allOf: + - $ref: can-controller.yaml# + - if: + properties: + compatible: + contains: + enum: + - xlnx,zynq-can-1.0 + + then: + properties: + clock-names: + items: + - const: can_clk + - const: pclk + required: + - tx-fifo-depth + - rx-fifo-depth + + - if: + properties: + compatible: + contains: + enum: + - xlnx,axi-can-1.00.a + + then: + properties: + clock-names: + items: + - const: can_clk + - const: s_axi_aclk + required: + - tx-fifo-depth + - rx-fifo-depth + + - if: + properties: + compatible: + contains: + enum: + - xlnx,canfd-1.0 + - xlnx,canfd-2.0 + + then: + properties: + clock-names: + items: + - const: can_clk + - const: s_axi_aclk + required: + - tx-mailbox-count + - rx-fifo-depth + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + can@e0008000 { + compatible = "xlnx,zynq-can-1.0"; + reg = <0xe0008000 0x1000>; + clocks = <&clkc 19>, <&clkc 36>; + clock-names = "can_clk", "pclk"; + interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&intc>; + tx-fifo-depth = <0x40>; + rx-fifo-depth = <0x40>; + }; + + - | + can@40000000 { + compatible = "xlnx,axi-can-1.00.a"; + reg = <0x40000000 0x10000>; + clocks = <&clkc 0>, <&clkc 1>; + clock-names = "can_clk", "s_axi_aclk"; + interrupt-parent = <&intc>; + interrupts = <GIC_SPI 59 IRQ_TYPE_EDGE_RISING>; + tx-fifo-depth = <0x40>; + rx-fifo-depth = <0x40>; + xlnx,has-ecc; + }; + + - | + can@40000000 { + compatible = "xlnx,canfd-1.0"; + reg = <0x40000000 0x2000>; + clocks = <&clkc 0>, <&clkc 1>; + clock-names = "can_clk", "s_axi_aclk"; + interrupt-parent = <&intc>; + interrupts = <GIC_SPI 59 IRQ_TYPE_EDGE_RISING>; + tx-mailbox-count = <0x20>; + rx-fifo-depth = <0x20>; + }; + + - | + can@ff060000 { + compatible = "xlnx,canfd-2.0"; + reg = <0xff060000 0x6000>; + clocks = <&clkc 0>, <&clkc 1>; + clock-names = "can_clk", "s_axi_aclk"; + interrupt-parent = <&intc>; + interrupts = <GIC_SPI 59 IRQ_TYPE_EDGE_RISING>; + tx-mailbox-count = <0x20>; + rx-fifo-depth = <0x40>; + }; diff --git a/dts/Bindings/net/can/xilinx_can.txt b/dts/Bindings/net/can/xilinx_can.txt deleted file mode 100644 index 100cc40b85..0000000000 --- a/dts/Bindings/net/can/xilinx_can.txt +++ /dev/null @@ -1,61 +0,0 @@ -Xilinx Axi CAN/Zynq CANPS controller Device Tree Bindings ---------------------------------------------------------- - -Required properties: -- compatible : Should be: - - "xlnx,zynq-can-1.0" for Zynq CAN controllers - - "xlnx,axi-can-1.00.a" for Axi CAN controllers - - "xlnx,canfd-1.0" for CAN FD controllers - - "xlnx,canfd-2.0" for CAN FD 2.0 controllers -- reg : Physical base address and size of the controller - registers map. -- interrupts : Property with a value describing the interrupt - number. -- clock-names : List of input clock names - - "can_clk", "pclk" (For CANPS), - - "can_clk", "s_axi_aclk" (For AXI CAN and CAN FD). - (See clock bindings for details). -- clocks : Clock phandles (see clock bindings for details). -- tx-fifo-depth : Can Tx fifo depth (Zynq, Axi CAN). -- rx-fifo-depth : Can Rx fifo depth (Zynq, Axi CAN, CAN FD in - sequential Rx mode). -- tx-mailbox-count : Can Tx mailbox buffer count (CAN FD). -- rx-mailbox-count : Can Rx mailbox buffer count (CAN FD in mailbox Rx - mode). - - -Example: - -For Zynq CANPS Dts file: - zynq_can_0: can@e0008000 { - compatible = "xlnx,zynq-can-1.0"; - clocks = <&clkc 19>, <&clkc 36>; - clock-names = "can_clk", "pclk"; - reg = <0xe0008000 0x1000>; - interrupts = <0 28 4>; - interrupt-parent = <&intc>; - tx-fifo-depth = <0x40>; - rx-fifo-depth = <0x40>; - }; -For Axi CAN Dts file: - axi_can_0: axi-can@40000000 { - compatible = "xlnx,axi-can-1.00.a"; - clocks = <&clkc 0>, <&clkc 1>; - clock-names = "can_clk","s_axi_aclk" ; - reg = <0x40000000 0x10000>; - interrupt-parent = <&intc>; - interrupts = <0 59 1>; - tx-fifo-depth = <0x40>; - rx-fifo-depth = <0x40>; - }; -For CAN FD Dts file: - canfd_0: canfd@40000000 { - compatible = "xlnx,canfd-1.0"; - clocks = <&clkc 0>, <&clkc 1>; - clock-names = "can_clk", "s_axi_aclk"; - reg = <0x40000000 0x2000>; - interrupt-parent = <&intc>; - interrupts = <0 59 1>; - tx-mailbox-count = <0x20>; - rx-fifo-depth = <0x20>; - }; |