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-rw-r--r--dts/Bindings/soc/fsl/cpm_qe/gpio.txt1
-rw-r--r--dts/Bindings/soc/fsl/cpm_qe/qe/ucc.txt2
-rw-r--r--dts/Bindings/soc/fsl/cpm_qe/qe/usb.txt1
3 files changed, 0 insertions, 4 deletions
diff --git a/dts/Bindings/soc/fsl/cpm_qe/gpio.txt b/dts/Bindings/soc/fsl/cpm_qe/gpio.txt
index 626e1afa64..cce3cd71e8 100644
--- a/dts/Bindings/soc/fsl/cpm_qe/gpio.txt
+++ b/dts/Bindings/soc/fsl/cpm_qe/gpio.txt
@@ -21,7 +21,6 @@ Optional properties:
one as described by the fsl,cpm1-gpio-irq-mask property. There should be as
many interrupts as number of ones in the mask property. The first interrupt in
the list corresponds to the most significant bit of the mask.
-- interrupt-parent : Parent for the above interrupt property.
Example of four SOC GPIO banks defined as gpio-controller nodes:
diff --git a/dts/Bindings/soc/fsl/cpm_qe/qe/ucc.txt b/dts/Bindings/soc/fsl/cpm_qe/qe/ucc.txt
index e47734bee3..5efb7ac94c 100644
--- a/dts/Bindings/soc/fsl/cpm_qe/qe/ucc.txt
+++ b/dts/Bindings/soc/fsl/cpm_qe/qe/ucc.txt
@@ -11,8 +11,6 @@ Required properties:
information for the interrupt. This should be encoded based on
the information in section 2) depending on the type of interrupt
controller you have.
-- interrupt-parent : the phandle for the interrupt controller that
- services interrupts for this device.
- pio-handle : The phandle for the Parallel I/O port configuration.
- port-number : for UART drivers, the port number to use, between 0 and 3.
This usually corresponds to the /dev/ttyQE device, e.g. <0> = /dev/ttyQE0.
diff --git a/dts/Bindings/soc/fsl/cpm_qe/qe/usb.txt b/dts/Bindings/soc/fsl/cpm_qe/qe/usb.txt
index 9ccd5f3040..da13999337 100644
--- a/dts/Bindings/soc/fsl/cpm_qe/qe/usb.txt
+++ b/dts/Bindings/soc/fsl/cpm_qe/qe/usb.txt
@@ -6,7 +6,6 @@ Required properties:
length, the next two two cells should contain PRAM location and
length.
- interrupts : should contain USB interrupt.
-- interrupt-parent : interrupt source phandle.
- fsl,fullspeed-clock : specifies the full speed USB clock source:
"none": clock source is disabled
"brg1" through "brg16": clock source is BRG1-BRG16, respectively