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Diffstat (limited to 'dts/src/arm/sh73a0.dtsi')
-rw-r--r--dts/src/arm/sh73a0.dtsi9
1 files changed, 5 insertions, 4 deletions
diff --git a/dts/src/arm/sh73a0.dtsi b/dts/src/arm/sh73a0.dtsi
index 914a7c2..c953648 100644
--- a/dts/src/arm/sh73a0.dtsi
+++ b/dts/src/arm/sh73a0.dtsi
@@ -22,7 +22,7 @@
#address-cells = <1>;
#size-cells = <0>;
- cpu@0 {
+ cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0>;
@@ -31,7 +31,7 @@
power-domains = <&pd_a2sl>;
next-level-cache = <&L2>;
};
- cpu@1 {
+ cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <1>;
@@ -91,6 +91,7 @@
compatible = "arm,cortex-a9-pmu";
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu0>, <&cpu1>;
};
cmt1: timer@e6138000 {
@@ -336,7 +337,7 @@
GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks SH73A0_CLK_SDHI1>;
power-domains = <&pd_a3sp>;
- toshiba,mmc-wrprotect-disable;
+ disable-wp;
cap-sd-highspeed;
status = "disabled";
};
@@ -348,7 +349,7 @@
GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks SH73A0_CLK_SDHI2>;
power-domains = <&pd_a3sp>;
- toshiba,mmc-wrprotect-disable;
+ disable-wp;
cap-sd-highspeed;
status = "disabled";
};