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Diffstat (limited to 'dts/src/arm64/exynos/exynos5433.dtsi')
-rw-r--r--dts/src/arm64/exynos/exynos5433.dtsi14
1 files changed, 7 insertions, 7 deletions
diff --git a/dts/src/arm64/exynos/exynos5433.dtsi b/dts/src/arm64/exynos/exynos5433.dtsi
index 038c997..2131f12 100644
--- a/dts/src/arm64/exynos/exynos5433.dtsi
+++ b/dts/src/arm64/exynos/exynos5433.dtsi
@@ -630,7 +630,7 @@
clocks = <&cmu_peris CLK_PCLK_TMU0_APBIF>,
<&cmu_peris CLK_SCLK_TMU0>;
clock-names = "tmu_apbif", "tmu_sclk";
- #include "exynos5433-tmu-sensor-conf.dtsi"
+ #thermal-sensor-cells = <0>;
status = "disabled";
};
@@ -641,7 +641,7 @@
clocks = <&cmu_peris CLK_PCLK_TMU0_APBIF>,
<&cmu_peris CLK_SCLK_TMU0>;
clock-names = "tmu_apbif", "tmu_sclk";
- #include "exynos5433-tmu-sensor-conf.dtsi"
+ #thermal-sensor-cells = <0>;
status = "disabled";
};
@@ -652,7 +652,7 @@
clocks = <&cmu_peris CLK_PCLK_TMU1_APBIF>,
<&cmu_peris CLK_SCLK_TMU1>;
clock-names = "tmu_apbif", "tmu_sclk";
- #include "exynos5433-tmu-g3d-sensor-conf.dtsi"
+ #thermal-sensor-cells = <0>;
status = "disabled";
};
@@ -663,7 +663,7 @@
clocks = <&cmu_peris CLK_PCLK_TMU1_APBIF>,
<&cmu_peris CLK_SCLK_TMU1>;
clock-names = "tmu_apbif", "tmu_sclk";
- #include "exynos5433-tmu-sensor-conf.dtsi"
+ #thermal-sensor-cells = <0>;
status = "disabled";
};
@@ -674,7 +674,7 @@
clocks = <&cmu_peris CLK_PCLK_TMU1_APBIF>,
<&cmu_peris CLK_SCLK_TMU1>;
clock-names = "tmu_apbif", "tmu_sclk";
- #include "exynos5433-tmu-sensor-conf.dtsi"
+ #thermal-sensor-cells = <0>;
status = "disabled";
};
@@ -1171,7 +1171,7 @@
power-domains = <&pd_gscl>;
};
- sysmmu_scaler_0: sysmmu@0x15040000 {
+ sysmmu_scaler_0: sysmmu@15040000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x15040000 0x1000>;
interrupts = <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>;
@@ -1182,7 +1182,7 @@
power-domains = <&pd_mscl>;
};
- sysmmu_scaler_1: sysmmu@0x15050000 {
+ sysmmu_scaler_1: sysmmu@15050000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x15050000 0x1000>;
interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>;