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-rw-r--r--dts/src/arm64/qcom/sdm845.dtsi333
1 files changed, 241 insertions, 92 deletions
diff --git a/dts/src/arm64/qcom/sdm845.dtsi b/dts/src/arm64/qcom/sdm845.dtsi
index 038538c8c6..f0e286715d 100644
--- a/dts/src/arm64/qcom/sdm845.dtsi
+++ b/dts/src/arm64/qcom/sdm845.dtsi
@@ -188,7 +188,7 @@
};
};
- cpus {
+ cpus: cpus {
#address-cells = <2>;
#size-cells = <0>;
@@ -197,15 +197,14 @@
compatible = "qcom,kryo385";
reg = <0x0 0x0>;
enable-method = "psci";
- cpu-idle-states = <&LITTLE_CPU_SLEEP_0
- &LITTLE_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
capacity-dmips-mhz = <611>;
dynamic-power-coefficient = <290>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ power-domains = <&CPU_PD0>;
+ power-domain-names = "psci";
#cooling-cells = <2>;
next-level-cache = <&L2_0>;
L2_0: l2-cache {
@@ -222,15 +221,14 @@
compatible = "qcom,kryo385";
reg = <0x0 0x100>;
enable-method = "psci";
- cpu-idle-states = <&LITTLE_CPU_SLEEP_0
- &LITTLE_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
capacity-dmips-mhz = <611>;
dynamic-power-coefficient = <290>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ power-domains = <&CPU_PD1>;
+ power-domain-names = "psci";
#cooling-cells = <2>;
next-level-cache = <&L2_100>;
L2_100: l2-cache {
@@ -244,15 +242,14 @@
compatible = "qcom,kryo385";
reg = <0x0 0x200>;
enable-method = "psci";
- cpu-idle-states = <&LITTLE_CPU_SLEEP_0
- &LITTLE_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
capacity-dmips-mhz = <611>;
dynamic-power-coefficient = <290>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ power-domains = <&CPU_PD2>;
+ power-domain-names = "psci";
#cooling-cells = <2>;
next-level-cache = <&L2_200>;
L2_200: l2-cache {
@@ -266,9 +263,6 @@
compatible = "qcom,kryo385";
reg = <0x0 0x300>;
enable-method = "psci";
- cpu-idle-states = <&LITTLE_CPU_SLEEP_0
- &LITTLE_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
capacity-dmips-mhz = <611>;
dynamic-power-coefficient = <290>;
qcom,freq-domain = <&cpufreq_hw 0>;
@@ -276,6 +270,8 @@
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
#cooling-cells = <2>;
+ power-domains = <&CPU_PD3>;
+ power-domain-names = "psci";
next-level-cache = <&L2_300>;
L2_300: l2-cache {
compatible = "cache";
@@ -289,14 +285,13 @@
reg = <0x0 0x400>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
- cpu-idle-states = <&BIG_CPU_SLEEP_0
- &BIG_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
dynamic-power-coefficient = <442>;
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ power-domains = <&CPU_PD4>;
+ power-domain-names = "psci";
#cooling-cells = <2>;
next-level-cache = <&L2_400>;
L2_400: l2-cache {
@@ -311,14 +306,13 @@
reg = <0x0 0x500>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
- cpu-idle-states = <&BIG_CPU_SLEEP_0
- &BIG_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
dynamic-power-coefficient = <442>;
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ power-domains = <&CPU_PD5>;
+ power-domain-names = "psci";
#cooling-cells = <2>;
next-level-cache = <&L2_500>;
L2_500: l2-cache {
@@ -333,14 +327,13 @@
reg = <0x0 0x600>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
- cpu-idle-states = <&BIG_CPU_SLEEP_0
- &BIG_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
dynamic-power-coefficient = <442>;
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ power-domains = <&CPU_PD6>;
+ power-domain-names = "psci";
#cooling-cells = <2>;
next-level-cache = <&L2_600>;
L2_600: l2-cache {
@@ -355,14 +348,13 @@
reg = <0x0 0x700>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
- cpu-idle-states = <&BIG_CPU_SLEEP_0
- &BIG_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
dynamic-power-coefficient = <442>;
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ power-domains = <&CPU_PD7>;
+ power-domain-names = "psci";
#cooling-cells = <2>;
next-level-cache = <&L2_700>;
L2_700: l2-cache {
@@ -407,53 +399,35 @@
};
};
- idle-states {
+ cpu_idle_states: idle-states {
entry-method = "psci";
LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
compatible = "arm,idle-state";
- idle-state-name = "little-power-down";
- arm,psci-suspend-param = <0x40000003>;
+ idle-state-name = "little-rail-power-collapse";
+ arm,psci-suspend-param = <0x40000004>;
entry-latency-us = <350>;
exit-latency-us = <461>;
min-residency-us = <1890>;
local-timer-stop;
};
- LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
- compatible = "arm,idle-state";
- idle-state-name = "little-rail-power-down";
- arm,psci-suspend-param = <0x40000004>;
- entry-latency-us = <360>;
- exit-latency-us = <531>;
- min-residency-us = <3934>;
- local-timer-stop;
- };
-
BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
compatible = "arm,idle-state";
- idle-state-name = "big-power-down";
- arm,psci-suspend-param = <0x40000003>;
+ idle-state-name = "big-rail-power-collapse";
+ arm,psci-suspend-param = <0x40000004>;
entry-latency-us = <264>;
exit-latency-us = <621>;
min-residency-us = <952>;
local-timer-stop;
};
+ };
- BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
- compatible = "arm,idle-state";
- idle-state-name = "big-rail-power-down";
- arm,psci-suspend-param = <0x40000004>;
- entry-latency-us = <702>;
- exit-latency-us = <1061>;
- min-residency-us = <4488>;
- local-timer-stop;
- };
-
+ domain-idle-states {
CLUSTER_SLEEP_0: cluster-sleep-0 {
- compatible = "arm,idle-state";
- idle-state-name = "cluster-power-down";
- arm,psci-suspend-param = <0x400000F4>;
+ compatible = "domain-idle-state";
+ idle-state-name = "cluster-power-collapse";
+ arm,psci-suspend-param = <0x4100c244>;
entry-latency-us = <3263>;
exit-latency-us = <6562>;
min-residency-us = <9987>;
@@ -462,7 +436,7 @@
};
};
- cpu0_opp_table: cpu0_opp_table {
+ cpu0_opp_table: opp-table-cpu0 {
compatible = "operating-points-v2";
opp-shared;
@@ -557,7 +531,7 @@
};
};
- cpu4_opp_table: cpu4_opp_table {
+ cpu4_opp_table: opp-table-cpu4 {
compatible = "operating-points-v2";
opp-shared;
@@ -1050,9 +1024,62 @@
};
};
- psci {
+ psci: psci {
compatible = "arm,psci-1.0";
method = "smc";
+
+ CPU_PD0: power-domain-cpu0 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
+ };
+
+ CPU_PD1: power-domain-cpu1 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
+ };
+
+ CPU_PD2: power-domain-cpu2 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
+ };
+
+ CPU_PD3: power-domain-cpu3 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
+ };
+
+ CPU_PD4: power-domain-cpu4 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&BIG_CPU_SLEEP_0>;
+ };
+
+ CPU_PD5: power-domain-cpu5 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&BIG_CPU_SLEEP_0>;
+ };
+
+ CPU_PD6: power-domain-cpu6 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&BIG_CPU_SLEEP_0>;
+ };
+
+ CPU_PD7: power-domain-cpu7 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&BIG_CPU_SLEEP_0>;
+ };
+
+ CLUSTER_PD: power-domain-cluster {
+ #power-domain-cells = <0>;
+ domain-idle-states = <&CLUSTER_SLEEP_0>;
+ };
};
soc: soc@0 {
@@ -1104,7 +1131,7 @@
clock-names = "core";
};
- qup_opp_table: qup-opp-table {
+ qup_opp_table: opp-table-qup {
compatible = "operating-points-v2";
opp-50000000 {
@@ -1181,6 +1208,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>,
<&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
+ dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>,
+ <&gpi_dma0 1 0 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1235,6 +1265,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>,
<&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
+ dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
+ <&gpi_dma0 1 1 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1251,6 +1284,9 @@
interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
interconnect-names = "qup-core", "qup-config";
+ dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
+ <&gpi_dma0 1 1 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1286,6 +1322,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>,
<&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
+ dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>,
+ <&gpi_dma0 1 2 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1302,6 +1341,9 @@
interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
interconnect-names = "qup-core", "qup-config";
+ dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>,
+ <&gpi_dma0 1 2 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1337,6 +1379,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>,
<&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
+ dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>,
+ <&gpi_dma0 1 3 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1353,6 +1398,9 @@
interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
interconnect-names = "qup-core", "qup-config";
+ dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>,
+ <&gpi_dma0 1 3 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1388,6 +1436,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>,
<&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
+ dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>,
+ <&gpi_dma0 1 4 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1404,6 +1455,9 @@
interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
interconnect-names = "qup-core", "qup-config";
+ dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>,
+ <&gpi_dma0 1 4 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1439,6 +1493,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>,
<&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
+ dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>,
+ <&gpi_dma0 1 5 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1455,6 +1512,9 @@
interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
interconnect-names = "qup-core", "qup-config";
+ dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>,
+ <&gpi_dma0 1 5 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1490,6 +1550,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>,
<&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
+ dmas = <&gpi_dma0 0 6 QCOM_GPI_I2C>,
+ <&gpi_dma0 1 6 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1506,6 +1569,9 @@
interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
interconnect-names = "qup-core", "qup-config";
+ dmas = <&gpi_dma0 0 6 QCOM_GPI_SPI>,
+ <&gpi_dma0 1 6 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1553,6 +1619,9 @@
interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
interconnect-names = "qup-core", "qup-config";
+ dmas = <&gpi_dma0 0 7 QCOM_GPI_SPI>,
+ <&gpi_dma0 1 7 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1626,6 +1695,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
<&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
+ dmas = <&gpi_dma1 0 0 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 0 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1642,6 +1714,9 @@
interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
interconnect-names = "qup-core", "qup-config";
+ dmas = <&gpi_dma1 0 0 QCOM_GPI_SPI>,
+ <&gpi_dma1 1 0 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1677,6 +1752,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
<&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
+ dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 1 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1693,6 +1771,9 @@
interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
interconnect-names = "qup-core", "qup-config";
+ dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
+ <&gpi_dma1 1 1 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1728,6 +1809,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
<&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
+ dmas = <&gpi_dma1 0 2 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 2 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1744,6 +1828,9 @@
interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
interconnect-names = "qup-core", "qup-config";
+ dmas = <&gpi_dma1 0 2 QCOM_GPI_SPI>,
+ <&gpi_dma1 1 2 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1779,6 +1866,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
<&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
+ dmas = <&gpi_dma1 0 3 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 3 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1795,6 +1885,9 @@
interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
interconnect-names = "qup-core", "qup-config";
+ dmas = <&gpi_dma1 0 3 QCOM_GPI_SPI>,
+ <&gpi_dma1 1 3 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1830,6 +1923,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
<&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
+ dmas = <&gpi_dma1 0 4 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 4 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1846,6 +1942,9 @@
interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
interconnect-names = "qup-core", "qup-config";
+ dmas = <&gpi_dma1 0 4 QCOM_GPI_SPI>,
+ <&gpi_dma1 1 4 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1881,6 +1980,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
<&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
+ dmas = <&gpi_dma1 0 5 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 5 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1897,6 +1999,9 @@
interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
interconnect-names = "qup-core", "qup-config";
+ dmas = <&gpi_dma1 0 5 QCOM_GPI_SPI>,
+ <&gpi_dma1 1 5 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1932,6 +2037,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
<&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
+ dmas = <&gpi_dma1 0 6 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 6 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1948,6 +2056,9 @@
interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
interconnect-names = "qup-core", "qup-config";
+ dmas = <&gpi_dma1 0 6 QCOM_GPI_SPI>,
+ <&gpi_dma1 1 6 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1984,6 +2095,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
<&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
+ dmas = <&gpi_dma1 0 7 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 7 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
};
spi15: spi@a9c000 {
@@ -1999,6 +2113,9 @@
interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
interconnect-names = "qup-core", "qup-config";
+ dmas = <&gpi_dma1 0 7 QCOM_GPI_SPI>,
+ <&gpi_dma1 1 7 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -2026,6 +2143,43 @@
interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
};
+ pmu@1436400 {
+ compatible = "qcom,sdm845-bwmon", "qcom,msm8998-bwmon";
+ reg = <0 0x01436400 0 0x600>;
+ interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
+ interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_LLCC 3>;
+
+ operating-points-v2 = <&cpu_bwmon_opp_table>;
+
+ cpu_bwmon_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ /*
+ * The interconnect path bandwidth taken from
+ * cpu4_opp_table bandwidth for OSM L3
+ * interconnect. This also matches the OSM L3
+ * from bandwidth table of qcom,cpu4-l3lat-mon
+ * (qcom,core-dev-table, bus width: 16 bytes)
+ * from msm-4.9 downstream kernel.
+ */
+ opp-0 {
+ opp-peak-kBps = <4800000>;
+ };
+ opp-1 {
+ opp-peak-kBps = <9216000>;
+ };
+ opp-2 {
+ opp-peak-kBps = <15052800>;
+ };
+ opp-3 {
+ opp-peak-kBps = <20889600>;
+ };
+ opp-4 {
+ opp-peak-kBps = <25497600>;
+ };
+ };
+ };
+
pcie0: pci@1c00000 {
compatible = "qcom,pcie-sdm845";
reg = <0 0x01c00000 0 0x2000>,
@@ -3551,7 +3705,7 @@
};
};
- sdhc_2: sdhci@8804000 {
+ sdhc_2: mmc@8804000 {
compatible = "qcom,sdm845-sdhci", "qcom,sdhci-msm-v5";
reg = <0 0x08804000 0 0x1000>;
@@ -3569,7 +3723,7 @@
status = "disabled";
- sdhc2_opp_table: sdhc2-opp-table {
+ sdhc2_opp_table: opp-table {
compatible = "operating-points-v2";
opp-9600000 {
@@ -3594,7 +3748,7 @@
};
};
- qspi_opp_table: qspi-opp-table {
+ qspi_opp_table: opp-table-qspi {
compatible = "operating-points-v2";
opp-19200000 {
@@ -3640,7 +3794,7 @@
qcom,apps-ch-pipes = <0x780000>;
qcom,ea-pc = <0x270>;
status = "okay";
- dmas = <&slimbam 3>, <&slimbam 4>,
+ dmas = <&slimbam 3>, <&slimbam 4>,
<&slimbam 5>, <&slimbam 6>;
dma-names = "rx", "tx", "tx2", "rx2";
@@ -3655,13 +3809,13 @@
wcd9340_ifd: ifd@0{
compatible = "slim217,250";
- reg = <0 0>;
+ reg = <0 0>;
};
wcd9340: codec@1{
compatible = "slim217,250";
- reg = <1 0>;
- slim-ifc-dev = <&wcd9340_ifd>;
+ reg = <1 0>;
+ slim-ifc-dev = <&wcd9340_ifd>;
#sound-dai-cells = <1>;
@@ -3692,8 +3846,8 @@
reg = <0xc85 0x40>;
interrupts-extended = <&wcd9340 20>;
- qcom,dout-ports = <6>;
- qcom,din-ports = <2>;
+ qcom,dout-ports = <6>;
+ qcom,din-ports = <2>;
qcom,ports-sinterval-low =/bits/ 8 <0x07 0x1F 0x3F 0x7 0x1F 0x3F 0x0F 0x0F>;
qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x0C 0x6 0x12 0x0D 0x07 0x0A >;
qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x1F 0x00 0x00 0x1F 0x00 0x00>;
@@ -3971,7 +4125,7 @@
compatible = "venus-encoder";
};
- venus_opp_table: venus-opp-table {
+ venus_opp_table: opp-table {
compatible = "operating-points-v2";
opp-100000000 {
@@ -4208,7 +4362,7 @@
clock-names = "bi_tcxo";
};
- dsi_opp_table: dsi-opp-table {
+ dsi_opp_table: opp-table-dsi {
compatible = "operating-points-v2";
opp-19200000 {
@@ -4248,9 +4402,6 @@
<&dispcc DISP_CC_MDSS_MDP_CLK>;
clock-names = "iface", "core";
- assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>;
- assigned-clock-rates = <300000000>;
-
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
@@ -4268,7 +4419,7 @@
#size-cells = <2>;
ranges;
- mdss_mdp: mdp@ae01000 {
+ mdss_mdp: display-controller@ae01000 {
compatible = "qcom,sdm845-dpu";
reg = <0 0x0ae01000 0 0x8f000>,
<0 0x0aeb0000 0 0x2008>;
@@ -4281,10 +4432,8 @@
<&dispcc DISP_CC_MDSS_VSYNC_CLK>;
clock-names = "gcc-bus", "iface", "bus", "core", "vsync";
- assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>,
- <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
- assigned-clock-rates = <300000000>,
- <19200000>;
+ assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
+ assigned-clock-rates = <19200000>;
operating-points-v2 = <&mdp_opp_table>;
power-domains = <&rpmhpd SDM845_CX>;
@@ -4310,7 +4459,7 @@
};
};
- mdp_opp_table: mdp-opp-table {
+ mdp_opp_table: opp-table {
compatible = "operating-points-v2";
opp-19200000 {
@@ -4574,7 +4723,7 @@
};
gmu: gmu@506a000 {
- compatible="qcom,adreno-gmu-630.2", "qcom,adreno-gmu";
+ compatible = "qcom,adreno-gmu-630.2", "qcom,adreno-gmu";
reg = <0 0x506a000 0 0x30000>,
<0 0xb280000 0 0x10000>,
@@ -4721,8 +4870,8 @@
cell-index = <0>;
};
- imem@146bf000 {
- compatible = "simple-mfd";
+ sram@146bf000 {
+ compatible = "qcom,sdm845-imem", "syscon", "simple-mfd";
reg = <0 0x146bf000 0 0x1000>;
#address-cells = <1>;
@@ -4939,7 +5088,7 @@
compatible = "qcom,bam-v1.7.0";
qcom,controlled-remotely;
reg = <0 0x17184000 0 0x2a000>;
- num-channels = <31>;
+ num-channels = <31>;
interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
qcom,ee = <1>;
@@ -4948,9 +5097,9 @@
};
timer@17c90000 {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0 0x20000000>;
compatible = "arm,armv7-timer-mem";
reg = <0 0x17c90000 0 0x1000>;
@@ -4958,49 +5107,49 @@
frame-number = <0>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0 0x17ca0000 0 0x1000>,
- <0 0x17cb0000 0 0x1000>;
+ reg = <0x17ca0000 0x1000>,
+ <0x17cb0000 0x1000>;
};
frame@17cc0000 {
frame-number = <1>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0 0x17cc0000 0 0x1000>;
+ reg = <0x17cc0000 0x1000>;
status = "disabled";
};
frame@17cd0000 {
frame-number = <2>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0 0x17cd0000 0 0x1000>;
+ reg = <0x17cd0000 0x1000>;
status = "disabled";
};
frame@17ce0000 {
frame-number = <3>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0 0x17ce0000 0 0x1000>;
+ reg = <0x17ce0000 0x1000>;
status = "disabled";
};
frame@17cf0000 {
frame-number = <4>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0 0x17cf0000 0 0x1000>;
+ reg = <0x17cf0000 0x1000>;
status = "disabled";
};
frame@17d00000 {
frame-number = <5>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0 0x17d00000 0 0x1000>;
+ reg = <0x17d00000 0x1000>;
status = "disabled";
};
frame@17d10000 {
frame-number = <6>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0 0x17d10000 0 0x1000>;
+ reg = <0x17d10000 0x1000>;
status = "disabled";
};
};
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-28 05:56:31 +0000