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Diffstat (limited to 'dts/src/riscv/starfive/jh7100.dtsi')
-rw-r--r--dts/src/riscv/starfive/jh7100.dtsi18
1 files changed, 15 insertions, 3 deletions
diff --git a/dts/src/riscv/starfive/jh7100.dtsi b/dts/src/riscv/starfive/jh7100.dtsi
index 69f22f9aad..000447482a 100644
--- a/dts/src/riscv/starfive/jh7100.dtsi
+++ b/dts/src/riscv/starfive/jh7100.dtsi
@@ -17,7 +17,7 @@
#address-cells = <1>;
#size-cells = <0>;
- cpu@0 {
+ U74_0: cpu@0 {
compatible = "sifive,u74-mc", "riscv";
reg = <0>;
d-cache-block-size = <64>;
@@ -42,7 +42,7 @@
};
};
- cpu@1 {
+ U74_1: cpu@1 {
compatible = "sifive,u74-mc", "riscv";
reg = <1>;
d-cache-block-size = <64>;
@@ -66,6 +66,18 @@
#interrupt-cells = <1>;
};
};
+
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <&U74_0>;
+ };
+
+ core1 {
+ cpu = <&U74_1>;
+ };
+ };
+ };
};
osc_sys: osc_sys {
@@ -118,7 +130,7 @@
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
- riscv,ndev = <127>;
+ riscv,ndev = <133>;
};
clkgen: clock-controller@11800000 {