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* ARM64: <asm/barebox-arm-head.h>: mark prologue locationAhmad Fatoum2021-11-081-0/+2
| | | | | | | | | | | | | Unlike with ARM32, barebox prologue on ARM64 starts with the function prologue, because of the absence of the naked attribute. The code is written with that in mind (6 branches instead of 8 to account for the two instructions inserted by the compiler), but it's still suprising. Add a hint about that in the code. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20211108075209.2366770-5-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/misc'Sascha Hauer2021-10-071-1/+0
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| * asm-generic: include bitio.h from io.hAhmad Fatoum2021-08-231-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This is currently used on ARM and sandbox, but it's relevant for other platforms like x86 as well if driver code wants to make use of the functions defined within. MIPS and PowerPC already defines the symbols, but that's ok because <bitio.h> doesn't override existing macros. This works for MIPS, but not PowerPC, where those aren't macros. Fix that up. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20210812121944.4419-3-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: document arm_setup_stack() pitfallsAhmad Fatoum2021-10-051-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many arm32 board entry points use arm_setup_stack() to set up the stack from C code. This necessitates using __naked, which probably has been our most frequent cause of misscompiled C code. GCC is quite clear that: Only basic asm statements can safely be included in naked functions While using extended asm or a mixture of basic asm and C code may appear to work, they cannot be depended upon to work reliably and are not supported. But some boards use it anyway, because it's nice to avoid writing assembly. Reading generated assembly to spot compiler miscompilation isn't that nice though, so add some documentation, comments and compiler diagnostics to hopefully reduce future porting effort. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20210917121152.16033-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | arm64: Don't truncate upper 32 bits in ENTRY_FUNCTION arg registersAhmad Fatoum2021-10-021-4/+4
|/ | | | | | | | | | | Use a long instead of an u32. For 32-bit arm there is no difference, for arm64 this results in being able to use the whole register size of 64 bits. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.barebox.org/20210916093356.173149-1-u.kleine-koenig@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: Add atf common supportSascha Hauer2021-06-241-0/+163
| | | | | | | | | | | | ARM trusted firmware has some common data structures passed to bl31. This patch imports the code supporting this taken from U-Boot. The defines and data structures are taken directly from U-Boot, the support code is heavily modified for the sake of readability. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210615141641.31577-9-s.hauer@pengutronix.de Link: https://lore.barebox.org/20210621092802.27275-9-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: Add relocate_to_adr_full()Sascha Hauer2021-06-211-0/+1
| | | | | | | | | | | | | | relocate_to_adr() currently relocates the PBL code to another address, but doesn't move the piggy data (compressed barebox image). This patch adds relocate_to_adr_full() which moves the full image including the piggy data. This is needed for upcoming Rockchip RK3568 support. Here we are started at address 0x0, but must move away from that address as this is where the ATF/OP-Tee binaries are expected to be loaded. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210615141641.31577-6-s.hauer@pengutronix.de Link: https://lore.barebox.org/20210621092802.27275-6-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: <asm/memory.h>: propagate error codes from arm_add_mem_device()Ahmad Fatoum2021-06-021-3/+3
| | | | | | | | | | | | | | | | | | | barebox_add_memory_bank() can fail if the to-be-added memory region has been requested before. This can happen most easily on i.MX and STM32MP1 boards: - The /memory node in the device tree requests a region - The DDR controller driver requests an overlapping region after reading back RAM configuration. This most often leads to error messages down the road, but it can be difficult to pinpoint the cause. Propagate the error code from arm_add_mem_device(), so DDR controller drivers can fail their probe on error. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20210531071239.30653-6-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: support PCI BIOS preassigned busesAhmad Fatoum2021-05-031-0/+7
| | | | | | | | | | | | | | | | | | | | | When running under UEFI, barebox should no redo PCI enumeration, because the UEFI implementation will likely already have drivers that won't cope with e.g. BAR addresses changing. The user-visible effect of this is that likely the framebuffer will stop working because the UEFI driver won't be able to access it any longer. Support this configuration by changing the PCI code to consult the new pcibios_assign_all_busses(). When it's true, there is no change to previous behavior. When it's false, reconfiguration is omitted and instead current configuration is read back from the bus. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Link: https://lore.barebox.org/20210416062436.332665-3-ahmad@a3f.at Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: make ARM_USE_COMPRESSED_DTB available for other archesAhmad Fatoum2021-03-231-7/+0
| | | | | | | | | | Other PBL-enabled architecture can benefit from compressed dtbs as well. Move symbol and code to a comm place to be able to use it from RISC-V in a later commit. In order not to break out of tree boards at runtime, the old symbol name is maintained for ARM. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/virtio'Sascha Hauer2021-03-231-11/+0
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| * dma: move dma_map/unmap_single from ARM to common codeAhmad Fatoum2021-03-041-11/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There's nothing ARM specific about these functions. Move them to a common location, so other arches can use them as well. This also fixes a bug on ARM MMU=n configurations: Previously these two functions these functions only respected dma-ranges translation when compiled with MMU support. DMA address translation is applicable regardless of CPU use of MMU though. Now, dma-ranges should be respected unconditionally. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/bthreads'Sascha Hauer2021-03-231-2/+4
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| * | ARM: asm: setjmp: implement coroutine dependency initjmp()Ahmad Fatoum2021-03-171-0/+2
| | | | | | | | | | | | | | | | | | | | | Implement initjmp() for use with the incoming bthread support. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: asm: setjmp: annotate setjmp/longjmp for GCCAhmad Fatoum2021-03-121-2/+2
| |/ | | | | | | | | | | | | | | | | To avoid invalid optimizations and to enable warnings, GCC must be told that setjmp and longjmp are to be handled specially. Add the missing attributes. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM64: board-dt-2nd: adopt kernel image headerAhmad Fatoum2021-03-221-0/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARM64 generic DT image is meant to be interchangeable with a kernel image to aid in debugging and testing. To achieve this, it reuses an externally passed device tree in x0, just like Linux does. The ARM barebox image format used however imposes some limitations: - Commands verifying the header before boot, like U-Boot's booti won't boot the barebox image - The barebox image is not fully relocatable. It has the implicit assumption that the barebox stack can grow into the memory space preceding the barebox image while the /memory node is parsed from the FDT. Adopting the Linux ARM64 header solves both issues. booti won't be able to tell us apart and we can specify an image load offset to reserve a stack space that won't interfere with anything else. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM64: qemu-virt64: remove dead CPU identification codeAhmad Fatoum2021-03-111-11/+0
|/ | | | | | | | | | | | | | cpu_is_arm(cpu) masks the read_cpuid_id() return value and compares with a CPU-specific value. The used masks for the Cortex A53/57 zeroes bits that are set in the value, so the comparison will never return true. In fact the compiler already optimizes it away completely, because read_cpuid_id() is only implemented for ARM32 anyway. Drop the dead code. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/firmware'Sascha Hauer2021-02-221-0/+70
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| * ARM: add fncpy.h from linux v5.10Steffen Trumtrar2021-01-251-0/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Description from the linux commit 5756e9dd0de6d5c307773f8f734c0684b3098fdd: ARM: 6640/1: Thumb-2: Symbol manipulation macros for function body copying In low-level board support code, there is sometimes a need to copy a function body to another location at run-time. A straightforward call to memcpy doesn't work in Thumb-2, because bit 0 of external Thumb function symbols is set to 1, indicating that the function is Thumb. Without corrective measures, this will cause an off-by-one copy, and the copy may be called using the wrong instruction set. This patch adds an fncpy() macro to help with such copies. Particular care is needed, because C doesn't guarantee any defined behaviour when casting a function pointer to any other type. This has been observed to lead to strange optimisation side-effects when doing the arithmetic which is required in order to copy/move function bodies correctly in Thumb-2. Thanks to Russell King and Nicolas Pitre for their input on this patch. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: <asm/io.h>: define macros for I/O memcpy/memsetAhmad Fatoum2021-02-041-0/+4
|/ | | | | | | | | | <asm-generic/io.h> expects architectures to define memcpy_toio, memcpy_fromio and memset_io as macros as it checks for their existence with #ifndef. Only ARM defines an own implementation, but does so as function declaration. Add the missing macros. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: Add KASan supportSascha Hauer2020-09-221-0/+3
| | | | | | | | | | | | | | This adds KASan support to the ARM architecture. What we are doing is: * Add __no_sanitize_address attribute to various lowlevel functions which do not run in a proper C environment * Add non-instrumented variants of memset/memcpy (prefixed with '__') * make original memcpy/memset weak symbols so strong definitions in lib/kasan/common.c can replace them * Use non-instrumented memcpy in early functions * call kasan_init() Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/module'Sascha Hauer2020-07-272-6/+30
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| * arm: module: Allow modules outside of bl rangeDavid Dgien2020-07-011-6/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unlike the Linux kernel, barebox does not have a dedicated heap for storing modules. Therefore, if the system memory configuration places the general heap further away than can be reached by a 'bl' instruction (24 bits of address, or 16 MiB), then the module relocations will fail due to being out of range. Allocate PLTs when loading modules so that jumps and calls whose targets are too far away for their relative offsets to be encoded in the instructions themselves can be bounced via veneers in the module's PLT. The modules will use slightly more memory, but after rounding up to page size, the actual memory footprint is usually the same. Adoption of Linux commits: 66e94ba3c8ea ARM: kernel: avoid brute force search on PLT generation 1031a7e674d1 ARM: kernel: sort relocation sections before allocating PLTs 05123fef0982 ARM: kernel: allocate PLT entries only for external symbols 35fa91eed817 ARM: kernel: merge core and init PLTs 7d485f647c1f ARM: 8220/1: allow modules outside of bl range Signed-off-by: David Dgien <dgienda125@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * arm: elf: Add THM relocation typesDavid Dgien2020-07-011-0/+3
| | | | | | | | | | Signed-off-by: David Dgien <dgienda125@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | treewide: Convert files covered by ARM copyright to SPDXUwe Kleine-König2020-07-142-8/+4
| | | | | | | | | | | | | | | | | | | | According to Marc Zyngier, former employee at ARM, the company owns the copyright for code created by its employees. Convert accordingly to SPDX with the usual rearrangements. Also dropped Marc's email address which doesn't work any more. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | arch/arm/include: Convert to SPDX-License and -Copyright specifiersUwe Kleine-König2020-07-1417-182/+55
|/ | | | | | | | | Converts the files that licensecheck can determine the license for. Also convert to obvious right Copyright statements. Additionally some minor code reformatting is done. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/sandbox-compile-test'Sascha Hauer2020-06-112-162/+4
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| * ARM: atomic.h: move generic implementation to asm-genericAhmad Fatoum2020-06-031-105/+3
| | | | | | | | | | | | | | | | | | For easier code-sharing, the UBIFS code still uses the Linux atomic accessors. Make porting it to sandbox easier, by providing these functions for all platforms. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: asm/io.h: fall back to <asm-generic/bitio.h> out_be32 and friendsAhmad Fatoum2020-06-031-57/+1
| | | | | | | | | | | | | | | | With the generic implementations in place in <asm-generic/bitio.h>, we can drop the now-duplicate ARM definitions. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | arch: include <asm-generic/int-ll64.h> from <asm/types.h>Masahiro Yamada2020-05-181-47/+1
|/ | | | | | | | | | | | | | | | Many architectures duplicate the same fixed type definitions as in <asm-generic/int-ll64.h>. Include <asm-generic/int-ll64.h> from <asm/types.h>, and remove the duplicated code. Note: Linux commit 0c79a8e29b5f ("asm/types.h: Remove include/asm-generic/int-l64.h") unified the kernel space definition into int-ll64.h. Barebox also adopts int-ll64. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* treewide: remove references to CREDITSUwe Kleine-König2020-04-271-3/+0
| | | | | | | | The CREDITS file was removed from barebox in 2015 by commit 6570288f2d97 ("Remove the CREDITS file"). Remove references to it from several files. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: include: remove unused <asm/processor.h>Ahmad Fatoum2020-04-151-131/+0
| | | | | | | | | | | | | File has been in source tree for 17 years and is unused. Drop it. The only definition we might want out of the file is cpu_relax(), which we already open code as barrier() with a comment in a couple of places. Move the definition to <linux/barebox-wrapper.h> and drop the file altogether. No functional change. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: add optee early loading functionRouven Czerwinski2020-01-301-1/+1
| | | | | | | | | | | | | | | | | | | Add a OP-TEE early loading function which expects a pointer to a valid tee binary and the device tree. OP-TEE will then be started and barebox will continue to run in normal mode. The function start_optee_early should be used in a boards lowlevel.c file. Ensure that barebox has been relocated and a proper c environment has been setup beforehand. Depending on the OP-TEE configuration, the fdt will be modified. If the internal barebox device tree is passed, OP-TEE will overwrite barebox PBL memory during this modification. Copy the fdt to a save memory location beforehand to avoid a corruption of barebox PBL memory. This also moves the OP-TEE Kconfig symbols into a separate menu. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: import setjmp implementation from U-BootRouven Czerwinski2020-01-301-0/+29
| | | | | Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/randfixes'Sascha Hauer2019-12-101-0/+4
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| * ARM: implement CONFIG_PBL_BREAK for ARM64Lucas Stach2019-12-021-0/+4
| | | | | | | | | | | | | | ARM64 uses a different assembler mnemonic for the breakpoint. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM64: Switch to 4 level page tablesSascha Hauer2019-11-271-1/+4
|/ | | | | | | | | | | | | | 3 level page tables only allow to resolve 39 bit addresses. Switch to 4 level page tables to add support for bigger physical address ranges. This is needed for example on Layerscape SoCs where the PCI windows are outside the 39bit range. The early MMU support still uses 39bit addressing. We only use a single level page table in early MMU support and with 48bit addresses we wouldn't have enough granularity to map the SDRAM differently then the rest of the address space. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: psci: implement PSCI client driverAhmad Fatoum2019-11-071-2/+21
| | | | | | | | | | | | System reset on the STM32MP may be done via PSCI when running TF-A as first-stage boot loader. Provide a PSCI driver to simplify using it: - A psci_invoke function is exported, so other code can use it - A fixup for the PSCI device tree node is registered - A reset and poweroff handler via PSCI is registered for PSCI >= v0.2 Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: aarch64: Re-implement most of barebox_arm_entry() in assemblyAndrey Smirnov2019-10-011-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | GCC9 now produces the following warning: common.h:51:2: warning: listing the stack pointer register ‘sp’ in a clobber list is deprecated [-Wdeprecated] 51 | __asm__ __volatile__("mov sp, %0" | ^~~~~~~ common.h:51:2: note: the value of the stack pointer after an ‘asm’ statement must be the same as it was before the statement Stack pointer was added to clobber list in commit f9fc8254b2 ("ARM: Mark SP as being clobbered in arm_setup_stack()") to prevent GCC from generating code that would corrupt 'boarddata' pointer by trying to restore it from invalid stack frame. Interestingly enough, seemingly unrelated change in commit 64d95896cf ("ARM: aarch64: compile with general-regs-only") changed generated code such that adding SP to clobber list became no longer necessary. While the above can probably be a fix by itself, it seems a better and more future proof approach would be to address the problem at its root and re-implement offending startup sequence in assembly. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Kconfig: retire empty <asm/barebox.h>Ahmad Fatoum2019-08-301-4/+0
| | | | | | | With the latest changes, this file is empty on all archs. Drop it. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Kconfig: create Kconfig symbol for ARCH_HAS_DATA_ABORT_MASKAhmad Fatoum2019-08-301-4/+0
| | | | | | | | Other arch-specific features are exposed in Kconfig too, so do here likewise. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Kconfig: create Kconfig symbol for ARCH_HAS_STACK_DUMPAhmad Fatoum2019-08-301-8/+0
| | | | | | | | Other arch-specific features are exposed in Kconfig too, so do here likewise. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: access __boot_cpu_mode with a functionSascha Hauer2019-08-071-1/+2
| | | | | | | | | | | | | | | | __boot_cpu_mode is accessed from barebox_multi_pbl_start() and barebox_single_pbl_start(). These functions may be called at an address different from the address they are linked at. Calculating the address of global variables can yield wrong results when it is done before setup_c() is called. We can't make sure when the address is calculated, OSELAS.Toolchain-2018.12.0 indeed calculates the address after setup_c() is called, but Debian arm-linux-gnueabihf-gcc 8.3.0 does it before setup_c() is called and thus doesn't work. This is solved by accessing __boot_cpu_mode with a wrapper function which we call explicitly after setup_c() is done. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: Fix global_variable_offset() for aarch64Sascha Hauer2019-07-161-6/+14
| | | | | | | | | | | | | Not all toolchains use pc relative addresses for global variables. Apparently the gcc 8.3.0 YOCTO toolchain uses absolute addresses. This means can't simply return 0 for global_variable_offset() but instead have to calculate the offset between the compile addresses for global variables and their runtime address. We do this by getting the address of a global variable pc relative explicitely in assembly and substracting that address from the location the C compiler thinks they are. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/stm32'Sascha Hauer2019-07-121-0/+29
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| * ARM: sm: move get_gicd_base_address to header for reuseAhmad Fatoum2019-07-041-0/+29
| | | | | | | | | | | | | | | | | | Incoming PSCI implementation for the STM32MP1 needs to get_gicd_base_address as well, so move it to gic.h to avoid code duplication. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | add CONFIG_PBL_BREAK optionOleksij Rempel2019-06-272-0/+8
|/ | | | | | | | With this option barebox will be build with breakpoint instruction in early pbl stage. Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/arm'Sascha Hauer2019-06-115-105/+8
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| * ARM: Initial OP-TEE supportSascha Hauer2019-06-072-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds initial support for OP-TEE, see https://www.op-tee.org/ barebox starts in secure mode as usual. When booting a kernel the bootm code also loads the optee_os binary. Instead of jumping into the kernel barebox jumps into the optee_os binary and puts the kernel execution address into the lr register. OP-TEE then jumps into the kernel in nonsecure mode. The optee_os binary is passed with the -t option to bootm or with global.bootm.tee. Optionally OP-TEE can be compiled into barebox using the builtin firmware feature. Enable the Kconfig option and place or link your tee binary as optee.bin into the firmware directory. The amount of SDRAM which is kept free for OP-TEE is configurable. This patch was tested on a i.MX6 Nitrogen6x board. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: psci: factor out of_psci_fixup() to separate fileSascha Hauer2019-05-131-0/+2
| | | | | | | | | | | | | | | | | | of_psci_fixup() can be used by code which doesn't use the barebox psci implementation, but provides its own PSCI compatible firmware. Factor it out to a separate file to compile it independently of the barebox PSCI implementation. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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