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* mips: Implement setjmp/longjmp/initjmp for 32BITSascha Hauer2021-03-172-0/+51
| | | | | | | | | The header has been taken from glibc, the implementation itself is based on the newlib implementation. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mips: lib: bootm: use bootm elf loading capabilitiesClement Leger2020-06-151-13/+7
| | | | | | | | | | Now that the elf file is loaded by the bootm core, there is no need for elf pointer anymore. Thus all elf related fields can be removed and bootm_load_os can be used. Signed-off-by: Clement Leger <cleger@kalray.eu> Tested-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* common: elf: add elf_open, elf_close and elf_loadClement Leger2020-06-151-2/+6
| | | | | | | | | In order to integrate elf loading into bootm command, split elf opening from elf loading. Signed-off-by: Clement Leger <cleger@kalray.eu> Tested-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* common: elf: load elf directly from fileClement Leger2020-06-151-7/+2
| | | | | | | | | | | | | | Currently, elf file must be loaded into a buffer and then passed to elf_load_image. This requires to copy the whole elf file before booting it. This commit allows to pass the filename directly and will allocate data only for the elf header (elf header + program headers). This will then be used to load the elf data from the file without copying it in an intermediate buffer. Elf segments are first parsed into a list and are then loaded from the file in a second time. Signed-off-by: Clement Leger <cleger@kalray.eu> Tested-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: correctly work with disabled CONFIG_MMUAntony Pavlov2020-06-081-1/+5
| | | | | | | | | | | | | | There are some issues with CONFIG_MMU=n in MIPS configuration (e.g. qemu-malta_defconfig): * "Cannot request SDRAM region for stack" error message on start; * empty kseg1_ram0 region in the iomem command output. The patch fixes the problems by forcing KSEG1 memory region usage for CONFIG_MMU=n MIPS configurations. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: don't overlay relocation data with BSSOleksij Rempel2020-02-032-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | .bss __rel_start (OVERLAY) was used to optimize RAM size used by barebox. Since .bss and __rel_start overlap, we should clear bss only after __rel_start was used. Following patch changed initialization sequence to clear .bss before __rel_start: 1e5aef61fc6a444 ("MIPS: reloc: init bss and cpu") This make relocation buffer unusable and broke relocation with different symptoms reported by Antony Pavlov <antonynpavlov@gmail.com>: * iomem output has no information on sdram regions, so memtest is unusable; * pc = 0xa081232c, relocation does not work, barebox is located with 8M offset from start of RAM. The board has 256M and relocation routine should move barebox code much higher; * pc = 0xa081232c, so barebox code works from KSEG1 not from KSEG0 as MMU=y option implies. There is a choice of moving .bss clear sequence after __rel_start or remove this optimization. Since the use of this optimization is minimal and danger to trap in to similar issue is still high, i prefer to remove this optimization. As result of this change, we need to fix calculation of relocation are size: relocate_code() calculates relocation area size as a sum (barebox_image_size + bss_len). barebox_image_size and bss_len are calculated as (__image_end - __image_start) and (__bss_stop - __bss_start) respectively. This doesn't take into account relocation data placed between __image_end and __bss_start. However relocation preserves BSS position relative to image start, as if relocation data is still there. This causes RAM overflow during BSS initialization in main_entry(). This problem may be hidden due to the alignment of the `relocaddr`. Reported-by: Antony Pavlov <antonynpavlov@gmail.com> Fixes: 1e5aef61fc6a444 ("MIPS: reloc: init bss and cpu") Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Peter Mamonov <pmamonov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: actually use CONFIG_MIPS_RELOCATION_TABLE_SIZEAntony Pavlov2020-01-161-1/+1
| | | | | | | | | The commit 28ed10d6a67c9 ("MIPS: relocation: add relocation support") introduce the Kconfig CONFIG_MIPS_RELOCATION_TABLE_SIZE parameter but it is never used. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: loongson: rename CPU_LOONGSON1 to CPU_GS232Du Huanpeng2020-01-061-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The CPU in the loongson 1b SoC is called GS232. Here is some active chips and it's core: NAME CPU Core(s) The loongson 3 series/server & desktop 3A3000/3B3000 GS464E 64bit x4 3A2000/3B2000 GS464E 64bit x4 3B1500 GS464 64bit x8 3A1000 GS464 64bit x4 The loongson 2 series/low power 2K1000 GS264 64bit x2 2F GS464 64bit x1 2H GS464 64bit x1 The loongson 1 series/embeded 1C101 GS132R 32bit ? 1D GS132 32bit ? 1C GS232 32bit x1 1B GS232 32bit x1 1A GS232 32bit x1 see: [1] http://www.loongson.cn/product/ Signed-off-by: Du Huanpeng <duhuanpeng@loongson.cn> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: reloc: init bss and cpuOleksij Rempel2019-10-231-0/+2
| | | | | | | We need it to make flush_cache_all() work properly. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: move r4k_cache_init in to cpu_probe functionOleksij Rempel2019-10-231-0/+5
| | | | | Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: reloc: remove init of relocated bssOleksij Rempel2019-10-231-5/+1
| | | | | | | It will be done in main_entry() any way. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* lds: Add and use RO_DATA_SECTION macroSascha Hauer2019-10-141-12/+4
| | | | | | | | | We have many different pointer arrays which we put into linker sections and each time there's one added we have to adjust all linker scripts. This adds a common RO_DATA_SECTION define and uses it for all architectures. This makes it easier to add a new linker array. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* lds: create and use BAREBOX_PCI_FIXUP macroSascha Hauer2019-10-141-13/+1
| | | | | | | No need to repeat the pci fixup sections in each linker script. Add a define for it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* lds: Move start/end address variables into definesSascha Hauer2019-10-141-19/+2
| | | | | | | | | | | For the older section defines we specify the start and end addresses outside the macro which means we have to repeat them in each linker script. Make the start/end addresses part of the define to simplify things. While at it, add a BAREBOX_ prefix to the INITCALLS and EXITCALLS macros for consistency to the other defines. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Sam Ravnborg <sam@ravnborg.org>
* barebox.lds: Remove unnecessary bracesSascha Hauer2019-10-141-2/+2
| | | | | | | The BAREBOX_CLK_TABLE and BAREBOX_DTB macros are defines that do not take a parameter, so we can remove the braces. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mips: bootm: Cast elf entry into unsigned longClement Leger2019-09-061-1/+1
| | | | | | | | | Since elf entry type is now a u64 to accomodate both type of elf files (64 and 32 bits), we need to cast it to the pointer length before casting it to the pointer type. Signed-off-by: Clement Leger <cleger@kalray.eu> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mips: reloc: remove outdated commentOleksij Rempel2019-07-021-11/+0
| | | | | Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: relocate_code: fix barebox image memcpy() sizeAntony Pavlov2019-06-201-6/+5
| | | | | | | | | | | | | | | | | In this relocate_code() piece 'length' is greater than 'barebox_image_size': #define MAX_BSS_SIZE SZ_1M ... length = barebox_image_size + MAX_BSS_SIZE; relocaddr = ALIGN_DOWN(ram_size - barebox_image_size, SZ_64K); ... memcpy((void *)relocaddr, __image_start, length); so 'ram_size' overflow occurs during memcpy(). Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Tested-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: lib/Makefile: fix whitespacesAntony Pavlov2019-06-201-2/+2
| | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: relocation: do not use configurable memory layoutOleksij Rempel2019-04-232-5/+22
| | | | | | | | | The relocator is not able to patch properly new location of the stack. To make it work properly it is better to disable HAVE_CONFIGURABLE_MEMORY_LAYOUT. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: relocation: add relocation supportOleksij Rempel2019-04-234-3/+217
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | this patch i a port of following patch from u-boot with some additional integration changes and fixes of original code: | Subject: [PATCH] MIPS: Stop building position independent code | | U-Boot has up until now built with -fpic for the MIPS architecture, | producing position independent code which uses indirection through a | global offset table, making relocation fairly straightforward as it | simply involves patching up GOT entries. | | Using -fpic does however have some downsides. The biggest of these is | that generated code is bloated in various ways. For example, function | calls are indirected through the GOT & the t9 register: | | 8f998064 lw t9,-32668(gp) | 0320f809 jalr t9 | | Without -fpic the call is simply: | | 0f803f01 jal be00fc04 <puts> | | This is more compact & faster (due to the lack of the load & the | dependency the jump has on its result). It is also easier to read & | debug because the disassembly shows what function is being called, | rather than just an offset from gp which would then have to be looked up | in the ELF to discover the target function. | | Another disadvantage of -fpic is that each function begins with a | sequence to calculate the value of the gp register, for example: | | 3c1c0004 lui gp,0x4 | 279c3384 addiu gp,gp,13188 | 0399e021 addu gp,gp,t9 | | Without using -fpic this sequence no longer appears at the start of each | function, reducing code size considerably. | | This patch switches U-Boot from building with -fpic to building with | -fno-pic, in order to gain the benefits described above. The cost of | this is an extra step during the build process to extract relocation | data from the ELF & write it into a new .rel section in a compact | format, plus the added complexity of dealing with multiple types of | relocation rather than the single type that applied to the GOT. The | benefit is smaller, cleaner, more debuggable code. The relocate_code() | function is reimplemented in C to handle the new relocation scheme, | which also makes it easier to read & debug. | | Taking maltael_defconfig as an example the size of u-boot.bin built | using the Codescape MIPS 2016.05-06 toolchain (gcc 4.9.2, binutils | 2.24.90) shrinks from 254KiB to 224KiB. | | Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pbl multiimage: Allow to check image sizesSascha Hauer2019-03-131-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PBL images are often constrained in size by limitations exposed by the SoCs SRAM size or partition sizes on the boot device. So far we tried to configure these limits in Kconfig, but with PBL multi images and thus different limitations for the different supported images this no longer works. This patch has another approach for it: During build time make variables containing the relevant sizes for each image are created. These are: PBL_CODE_SIZE_$(symbol) PBL_MEMORY_SIZE_$(symbol) PBL_IMAGE_SIZE_$(symbol) PBL_CODE_SIZE_$(symbol) contains the pure code size of the PBL, it should be smaller than the available SRAM during boot. Normally the PBL's bss segment also needs to be in the initial SRAM, for this case PBL_MEMORY_SIZE_$(symbol) is the relevant variable. PBL_IMAGE_SIZE_$(symbol) contains the full size of the PBL image including the compressed payload (but without any image headers created later by SoC specific image tools). $(symbol) is a placeholder for the start symbol used for this PBL image, thus for the i.MX53 QSB with entry start_imx53_loco PBL_CODE_SIZE_start_imx53_loco will be created. The images/Makefile.* can use these variables directly to check sizes or specify the same variables with a "MAX_" prefix. So when images/Makefile.imx specifies MAX_PBL_CODE_SIZE_start_imx53_loco = 0x10000 then the build system will make sure that the PBL code for the QSB will not get bigger than 64KiB. Also included in this patch are the size restrictions for the i.MX8MQ images as an example how to use this. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: ath79: add spi and sram bootstrap helpersOleksij Rempel2019-01-242-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | At least some ath79 SoC have build in 32K RAM. It allow us to use lowlevel portion of barebox to bootstrap the system by using JTAG debugger (For example OpenOCD). Since ath79 has no reliable way to stop the CPU execution before reading SPI Flash, this can cause different issues. To avoid it, we need to flash a execution trap with software debug breakpoint to the flash. The workflow should be as follow: - After power on or reset the CPU will start execution of SPI flash. As soon as software debug breakpoint is executed, CPU will halt and notify OpenOCD about breakpoint event. - OpenOCD will load reduced barebox to SRAM and execute it. This part will do all needed low level initialization - PLL, RAM and trigger second breakpoint event. - OpenOCD will load full barebox version to the main RAM and start execution. It can be used for bring-up, so no regular flashing is needed. Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: convert files with not precise GNU version to SPDXOleksij Rempel2019-01-033-12/+3
| | | | | | | | | Default barebox license is GPL-2.0-only. Set it to the files with the missing one. Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-by: Roland Hieber <r.hieber@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: migrate all files to SPDXOleksij Rempel2019-01-036-55/+6
| | | | | | Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-by: Roland Hieber <r.hieber@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: add arch/mips/lib/pbl.lds.SOleksij Rempel2018-12-131-0/+53
| | | | | | | we need it for multiimage support. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: fix PCI quirk infrastructure buildAntony Pavlov2018-09-171-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | The commit fc2c618c2038 ("pci: add quirk infrastructure") adds necessary ld-script changes only for ARM architecture. As a result, qemu-malta build fails: LD barebox drivers/built-in.o: In function `pci_fixup_device': (.text.pci_fixup_device+0x30): undefined reference to `__end_pci_fixups_enable' (.text.pci_fixup_device+0x38): undefined reference to `__end_pci_fixups_enable' (.text.pci_fixup_device+0x34): undefined reference to `__start_pci_fixups_enable' (.text.pci_fixup_device+0x3c): undefined reference to `__start_pci_fixups_enable' (.text.pci_fixup_device+0x70): undefined reference to `__end_pci_fixups_header' (.text.pci_fixup_device+0x78): undefined reference to `__end_pci_fixups_header' (.text.pci_fixup_device+0x74): undefined reference to `__start_pci_fixups_header' (.text.pci_fixup_device+0x80): undefined reference to `__start_pci_fixups_header' (.text.pci_fixup_device+0x2c): undefined reference to `__end_pci_fixups_early' (.text.pci_fixup_device+0x88): undefined reference to `__end_pci_fixups_early' (.text.pci_fixup_device+0x84): undefined reference to `__start_pci_fixups_early' (.text.pci_fixup_device+0x90): undefined reference to `__start_pci_fixups_early' make: *** [Makefile:767: barebox] Error 1 Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/riscv'Sascha Hauer2018-07-095-120/+0
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| * MIPS: Use generic GCC library routines from lib/Antony Pavlov2018-06-295-120/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | This is a port of Linux kernel commit | commit 740129b36faf049e6845819144542a0455e1e285 | Author: Antony Pavlov <antonynpavlov@gmail.com> | Date: Wed Apr 11 08:50:19 2018 +0100 | | MIPS: Use generic GCC library routines from lib/ Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/bootm'Sascha Hauer2018-07-091-0/+59
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| * MIPS: bootm: add ELF handlerOleksij Rempel2018-06-181-0/+59
| | | | | | | | | | | | | | | | With this handler barebox will be able to start linux kernel as is, without additional image conversion. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | MIPS: use CKSEG1 instead of KSEG1Peter Mamonov2018-05-241-4/+4
|/ | | | | | | | KSEG1 constant is defined for 32 bit MIPS only. Use CKSEG1 which is defined for both MIPS32 and MIPS64. Signed-off-by: Peter Mamonov <pmamonov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* dma: Use dma_addr_t as type for DMA addressesSascha Hauer2018-03-291-2/+2
| | | | | | | DMA addresses are not necessarily the same as unsigned long. Fix the type for the dma_sync_single_* operations. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ratp: implement generic command supportAleksander Morgado2018-03-011-0/+4
| | | | | | | | | | | | | | | | | | | The RATP implementation now allows executing generic commands with a binary interface: binary requests are received and binary responses are returned. Each command can define its own RATP request contents (e.g. to specify command-specific options) as well as its own RATP response contents (if any data is to be returned). Each command is associated with a pair of numeric unique request and response IDs, and for easy reference these IDs are maintained in the common ratp_bb header. Modules may override generic implemented commands or include their own new ones (as long as the numeric IDs introduced are unique). Signed-off-by: Aleksander Morgado <aleksander@aleksander.es> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: add 74Kc infoOleksij Rempel2017-07-311-0/+4
| | | | | | | This patch is preparation for SoC QCA AR9344 Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
* MIPS: barebox.lds.S: put .text_entry contents after _stext and _textAntony Pavlov2017-05-081-1/+1
| | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: barebox.lds.S: remove unused gotAntony Pavlov2017-05-081-3/+0
| | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: barebox.lds.S: drop unneeded '_start = .'Antony Pavlov2017-05-081-1/+0
| | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* include: Move bulk of boot.h to bootm.hSascha Hauer2016-07-261-0/+1
| | | | | | | | The majority of the stuff currently in include/boot.h is about bootm code implemented common/bootm.c. To be more consistent move it to a new file include/bootm.h. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: csrc-r4k: get cp0 counter rate from devicetreeAntony Pavlov2016-07-071-2/+22
| | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: implement dma_sync_* functionsPeter Mamonov2016-03-092-0/+58
| | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Peter Mamonov <pmamonov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: flush cache on shutdownAntony Pavlov2016-03-093-0/+37
| | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Peter Mamonov <pmamonov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: add initial R4000-style cache supportAntony Pavlov2016-03-091-0/+47
| | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Peter Mamonov <pmamonov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: probe_scache(): use MIPS_CONF_M linux kernel macroAntony Pavlov2016-03-091-3/+2
| | | | | | | | | We already have MIPS_CONF_M macro in <asm/mipsregs.h> so we have no need in homebrew CONFIG_M macro. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Cc: Peter Mamonov <pmamonov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* bootm: Push dryrun to handlersSascha Hauer2016-01-261-0/+6
| | | | | | | We can make the dryrun option more useful by calling into the handlers. With this we can detect more cases that can go wrong during boot. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: import optimized string functions from LinuxAleksey Kuleshov2015-11-263-0/+425
| | | | | | | | | 10x performance gain according to simple test on QEMU malta: barebox:/ time memcpy 0xa0000000 0xa0001000 0x100000 Signed-off-by: Aleksey Kuleshov <rndfax@yandex.ru> Acked-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: allow user to pass incorrect address to md commandAntony Pavlov2015-11-112-6/+52
| | | | | | | | | | | | | | | | | | | | | | This commit makes it possible to handle exception on incorrect data access so 'md' command just show 'xxxxxxxx' instead of crashing the system. barebox:/ md -l 0xa0000003+4 a0000003: xxxxxxxx .... Without this commit we will get this barebox:/ md -l 0xa0000003+4 a0000003: Ooops, address error on load or ifetch! ... ### ERROR ### Please RESET the board ### Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: traps.c: separate registers print stuff to show_regs()Antony Pavlov2015-11-111-7/+12
| | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mips: cpuinfo: report secondary cache configurationPeter Mamonov2015-11-031-1/+10
| | | | | Signed-off-by: Peter Mamonov <pmamonov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mips: c-r4k: detect secondary cachePeter Mamonov2015-11-032-2/+31
| | | | | Signed-off-by: Peter Mamonov <pmamonov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
generated by cgit v1.2.3 (git 2.39.1) at 2024-05-20 13:02:27 +0000