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* MIPS: rzx50_defconfig: use UART1 for low-level debugAntony Pavlov2013-06-041-0/+1
| | | | | | | | | By default CONFIG_JZ4750D_DEBUG_LL_UART0 is selected. This can confuse the Ritmix RZX50 user as the board has only UART1 connected. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: rzx50: pbl: use debug_llAntony Pavlov2013-06-041-0/+6
| | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: unify ns16550 debug_ll support codeAntony Pavlov2013-06-044-39/+17
| | | | | | | | | | | This commit moves the C debug_ll code from the MIPS <debug_ll_ns16550.h> header file to the MIPS <asm/debug_ll_ns16550.h> header file, so the C code and the asm code can use the same register address macros. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: malta: prepare for new debug_llAntony Pavlov2013-06-041-0/+1
| | | | | | | Set fake DEBUG_LL_UART_DIVISOR to use <asm/debug_ll_ns16550.h>. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: rzx50: prepare for new debug_llAntony Pavlov2013-06-041-0/+4
| | | | | | | | | | | | Set DEBUG_LL_UART_DIVISOR to use <asm/debug_ll_ns16550.h>. The JZ4755 uses 24 MHz as the main reference frequency (EXCLK). The UART controller can work on full EXCLK or on EXCLK/2. Just now we use EXCLK/2 legacy clock setup made by U-Boot. So set UART controller base frequency to 12 MHz. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/tegra'Sascha Hauer2013-06-026-0/+483
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| * tegra20: add generic board and Colibri T20 on IrisLucas Stach2013-05-154-0/+258
| | | | | | | | | | | | | | | | | | | | | | | | | | The Tegra arch will be fully based on device tree and most boards shouldn't need anything more than the generic drivers and arch code. This adds generic tegra20 board support, but since we currently have no way to combine an image with a devicetree other than compiling it into the single image we also add Colibri T20 on Iris support here and add a defconfig for it. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * tegra: paz00: import pinconfig from LinuxLucas Stach2013-05-121-0/+216
| | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * tegra20: add pinctrl driverLucas Stach2013-05-122-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | This adds a pinctrl driver for the Tegra 20 line of SoCs. It only supports the three basic pinconfiguration settings function mux, tristate control and pullup/down control. The driver understands the same devicetree bindings as the Linux one, unimplemented pinconfiguration options will be ignored. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/ppc'Sascha Hauer2013-06-021-34/+37
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| * | ppc: update I/O accessorsRenaud Barbier2013-05-311-29/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The I/O accessors in_bexx, out_bexx, in_lexx and out_lexx are updated to the latest Linux version. The patch is tested on a MPC8544 based board and solved I/O access issues on I2C devices. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ppc io.h: fix indentationRenaud Barbier2013-05-311-24/+24
| | | | | | | | | | | | | | | | | | | | | | | | To prepare for an update of the I/O functions to the latest Linux version, the indentation is fixed. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/omap'Sascha Hauer2013-06-027-6/+90
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| * | | pcm049: clean upJan Weitzel2013-05-301-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | Remove magic numbers Signed-off-by: Jan Weitzel <j.weitzel@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | pcm049: add 1GB RAM supportTeresa Gámez2013-05-303-1/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add config to select RAM assembly. The difference is if one or two chip selects are used. This can't be checkt at runtime. Signed-off-by: Jan Weitzel <j.weitzel@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | arm: am33xx: add pinmux config for RMII2Jan Luebbe2013-05-232-0/+26
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Jan Luebbe <jlu@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | arm: am33xx: add pinmux and clock config for UART2Jan Luebbe2013-05-234-0/+23
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Jan Luebbe <jlu@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | Merge branch 'for-next/of'Sascha Hauer2013-06-021-0/+4
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| * | | | bootm: print Kernel commandline in verbose modeSascha Hauer2013-05-311-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without devicetree support we print the Kernel commandline in verbose mode. Do the same with devicetree boot aswell. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | bootm: make sure to print fixed oftreeSascha Hauer2013-05-311-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | when doing bootm -v -v we dumped the original tree to the console. Make sure to print the fixed tree instead so that the fixups can be examined. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | | Merge branch 'for-next/mxs'Sascha Hauer2013-06-022-1/+59
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| * | | | | ARM: cfa10036: Add more board ID for boot time detectionBrian Lilly2013-05-241-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As new breakout boards are being developped, we need to add their IDs in the device detection code, otherwise they will be treated as regular CFA-10036. Signed-off-by: Brian Lilly <brian@crystalfontz.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | MXS/i.MX23: add boot source detectionJuergen Beisert2013-05-231-1/+43
| | |/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The boot source for the i.MX23 is configured via a few GPIOs, which are later be used for different purposes (like LCD data for example). The SoC internal ROM reads these GPIOs and uses the selected boot source. For various reasons the boot source is also of interest when Barebox is running. This detection approach reads again the GPIOs. It switches temporarily the pins to act as GPIOs and input, reads their settings, and switches back to their previous functions. Signed-off-by: Juergen Beisert <jbe@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | | Merge branch 'for-next/mips'Sascha Hauer2013-06-0232-64/+1311
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: include/of.h
| * | | | | MIPS: pbl: add low-level debug asm macros for ns16550Antony Pavlov2013-06-021-0/+100
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds macros for ns16550 port initialisation and single char output. The macros can be used in MIPS asm pbl code. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | MIPS: XBurst: use mach-specific debug_ll setupAntony Pavlov2013-06-024-4/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ingenic JZ4755 SoC (JZ4750D family) has three UARTs. So we can give to the user choose which one of them to use for low level debug (debug_ll) output. Also this commit adapts the only JZ4755 board (Ritmix RZX50) for using the new debug_ll port selection. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | MIPS: ar231x: add netgear-wg102Oleksij Rempel2013-05-315-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | MIPS: add Atheros ar531x family supportOleksij Rempel2013-05-319-0/+883
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | MIPS: asm/mipsregs.h: remove unused stuffAntony Pavlov2013-05-311-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In barebox we have no CONFIG_MIPS_MT_SMTC Kconfig option. So remove the code under this macro. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | MIPS: rzx50: enable pbl in defconfigAntony Pavlov2013-05-281-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also enable the iomem and poweroff commands. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | MIPS: XBurst: enable pbl supportAntony Pavlov2013-05-281-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | MIPS: rzx50: add trivial board_pbl_startAntony Pavlov2013-05-281-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | MIPS: qemu-malta_defconfig: enable OF supportAntony Pavlov2013-05-131-6/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also enable iomem. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | MIPS: qemu-malta: add device tree supportAntony Pavlov2013-05-132-11/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | MIPS: add initial device tree supportAntony Pavlov2013-05-137-0/+108
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | MIPS: rzx50: switch to common mach-xburst serial codeAntony Pavlov2013-05-081-35/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | MIPS: xburst: use common serial codeAntony Pavlov2013-05-083-0/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Ingenic JZ4740, JZ4755 and JZ4770 SoCs use the same IP core for UART interface. This IP core is NS16550-compatible, but it needs small workaround. This commit moves the UART code for Ingenic SoCs from board level to machine level. So the code can be reused for different boards or even different SoCs. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | | | Merge branch 'for-next/mci'Sascha Hauer2013-06-023-4/+21
|\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: include/driver.h
| * | | | | | twl6030: Set WR_S for VMMCJan Weitzel2013-05-311-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After Reset VMMC goes to default VSEL. This is not a clean power cycle for some SD cards. Set flag WR_S for VMMC to avoid going to default VSEL. Signed-off-by: Jan Weitzel <j.weitzel@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | | driver: Attach info callback to device, not to driverSascha Hauer2013-05-301-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the info is device specific and not driver specific, attach the callback to the device. This makes it possible to have a info callback for a device which does not have a driver attached. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | | ARM: OMAP MCI: Move TWL6030 power initialization into OMAP directoryAlexander Shiyan2013-05-301-2/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | | Added sd driver for bcm2835 (Raspberry PI)wilhelm2013-05-301-0/+1
| | |/ / / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | Replaced defines according to sdhci.h Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | | | Merge branch 'for-next/marvell'Sascha Hauer2013-06-0244-0/+1173
|\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/Makefile
| * | | | | | arm: mvebu: introduce common lowlevel and early initSebastian Hesselbarth2013-05-2127-322/+319
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At early stage after boot, all MVEBU SoCs are similar enough to have a common lowlevel and barebox entry. We also remap the internal register base address to 0xf100000 as it gives some 512M more of contiguous address space. As we cannot determine real memory size that early, we start with a default memory size of 64M and probe correct size later in SoC init. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | | arm: mvebu: add more visible SoC separators to KconfigSebastian Hesselbarth2013-05-211-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This just add more visible separators between each subconfig of the supported Marvell EBU SoCs. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | | arm: mvebu: remove useless lines in kwbimage.cfg for CuBoxThomas Petazzoni2013-05-171-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Thanks to the improvements brought into the kwbimage tool, it is no longer necessary to have dummy DEST_ADDR and EXEC_ADDR lines in the kwbimage.cfg file if those values are passed on the command line to the kwbimage tool, which is what the Barebox build process does. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | | arm: mvebu: add basic support for Globalscale Guruplug boardThomas Petazzoni2013-05-178-0/+97
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Globalscale Guruplug board is a small NAS-type plug platform that uses a Marvell Kirkwood SoC. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | | arm: mvebu: initial support for Marvell Kirkwood SoCsThomas Petazzoni2013-05-175-0/+185
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Marvell Kirkwood SoCs are based on a ARMv5 compatible core designed by Marvell, and a large number of peripherals with Marvell Dove, Marvell Armada 370 and Marvell Armada XP SoCs. The Marvell Kirkwood are used in a large number of consumer-grade NAS devices, for example. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | | arm: mvebu: add Feroceon CPU typeThomas Petazzoni2013-05-171-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Kirkwood Marvell SoC uses a Marvell-specific implementation of an ARMv5TE compatible ARM core, the Feroceon. This patch introduces a Kconfig option that allows to select this CPU type. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | | arm: mach-mvebu: rename Armada 370/XP core codeSebastian Hesselbarth2013-05-152-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are more than Armada 370/XP in Marvell MVEBU SoC familiy. To avoid irritation with source file nameing, we rename setup source file for Armada 370/XP from core.c to armada-370-xp.c. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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