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* ARM: imx6: properly check for IPU presenceLucas Stach2020-01-271-2/+11
| | | | | | | | | | | | | Since a73850bd76d0 (ARM: imx: disable IPU QoS setup for correct SoCs), which fixed the condition to not execute the IPU QoS fixups on SoCs that don't have a IPU, the fixups aren't applied on i.MX6Q/DP anymore, since those SoCs were missing from the whitelist. Add a function to make it a bit more clearer what we are checking here and add the Q/DP SoCs. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: actually use CONFIG_MIPS_RELOCATION_TABLE_SIZEAntony Pavlov2020-01-161-1/+1
| | | | | | | | | The commit 28ed10d6a67c9 ("MIPS: relocation: add relocation support") introduce the Kconfig CONFIG_MIPS_RELOCATION_TABLE_SIZE parameter but it is never used. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: qemu-virt64: convert to assembly entryLucas Stach2020-01-163-2/+16
| | | | | | | | | | The C entry function isn't naked, so tries to push to the stack in the function prologue. This doesn't work on QEMU where there is no valid SP on entry. Convert the lowlevel entry to the assembly facilities provided for this case. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/zynq'Sascha Hauer2020-01-157-4/+150
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| * ARM: zynq: zedboard: add PBL console supportLucas Stach2020-01-141-0/+16
| | | | | | | | | | | | | | Allows for significantly easier debugging of PBL functions. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: zynq: zed: partially revert zynq_cpu_lowlevel_init() chnagesLucas Stach2020-01-142-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Calling arm_cpu_lowlevel_init() from zynq_cpu_lowlevel_init() adds a stack push/pop to the latter function which doesn't work this early in the boot. As the BootROM apparently hands proccessor control to us in abort(!?!) mode, setting up a stack requires duplicating most of arm_cpu_lowlevel_init(). To get around this catch-22 move the call to arm_cpu_lowlevel_init back into the board lowlevel start function, so we don't need a stack at all. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: zynq: zed: use zynq_cpu_lowlevel_init()Lucas Stach2020-01-081-1/+2
| | | | | | | | | | | | | | Make sure the required workarounds for CPU errata are applied. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: zynq: add Zynq specific lowlevel CPU init functionLucas Stach2020-01-083-0/+24
| | | | | | | | | | | | | | | | This adds a Zynq specific CPU lowlevel init function, which applies the required workarounds for the Cortex A9 r3p0 core. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: zynq: zed: add QSPI flash supportLucas Stach2019-12-202-0/+27
| | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: zynq: add QSPI DT nodeLucas Stach2019-12-201-0/+15
| | | | | | | | | | | | | | | | The node is not available in the upstream DT, yet. Add it to the Barebox DT extensions. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: zynq: add Zynq image bootm handlerLucas Stach2019-12-112-1/+50
| | | | | | | | | | | | | | | | This adds a bootm handler for the Zynq image, to allow second stage booting of a unchanged Zynq boot image. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: zynq: zedboard: allow lowlevel init to be called as second stageLucas Stach2019-12-111-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the code is already executing in DRAM, the PS7 init must not be executed, as it initializes the DRAM controller. As the OCM can be configured to an address which aliases with the DRAM address space we can't reliably infer if we are running from OCM or DRAM from the execution address. So instead of using the address, look at the OCM mapping, as the BootROM leaves a quite unique mapping behind with 192KB OCM mapped at the low address and 64KB mapped to the high address. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: zynq: zedboard: split out PS7 initLucas Stach2019-12-111-4/+9
| | | | | | | | | | | | | | | | | | | | | | | | Move the PS7 inititalization into its own function. This helps readability and logically splits the FPGA toolchain generated setup from the reset of the board init. Also execute the PS7 setup after the lowlevel CPU init, as this is the regular order used in the Barebox codebase. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/rpi'Sascha Hauer2020-01-158-34/+114
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| * | ARM: rpi_defconfig: Enable more featuresSascha Hauer2020-01-081-2/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This enabled more features for the rasperrypi boards: - DWC2 USB driver - Networking support - GPIO EXP driver - LED support - more commands Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: rpi mailbox: Use non interruptible timeoutSascha Hauer2020-01-081-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This makes sure that during a mailbox transfer no other mailbox transfer is started. This happens on a raspberrypi3 where one GPIO on the firmware GPIO controller (which is controlled via mailbox) is registered as a heartbeat LED. With this it can happen that during a mailbox transfer the poller which drives the heartbeat LED is triggered in is_timeout() which results in corrupted transfers. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: rpi_defconfig: Enable raspberry GPIO exp driverSascha Hauer2020-01-081-0/+1
| | | | | | | | | | | | | | | | | | Enable the recently introduced GPIO exp driver. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: bcm2835 mbox: use pr_* to print messagesSascha Hauer2020-01-081-17/+19
| | | | | | | | | | | | | | | | | | To give the user an idea where the messages come from. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | gpio: Add raspberrypi exp gpio driverSascha Hauer2020-01-081-0/+4
| | | | | | | | | | | | | | | | | | Taken from the kernel adopted to barebox. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: bcm2835 mbox: Remove response valid checkSascha Hauer2020-01-081-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | Not all messages return a valid response as they do not send a response at all. This is at least true for the SET_GPIO_STATE and SET_GPIO_CONFIG messages. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | rpi: Enable USB Power domain during startupSascha Hauer2019-12-201-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the USB Power domain during startup. The power domain is abstracted as a regulator in barebox, but modelled as a power domain in the device tree. Until this is sorted out just enable the power domain or regulator in the board code. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | device: Introduce dma_offsetSascha Hauer2019-12-203-2/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For devices that do not have a 1:1 mapping between DMA and CPU we need a dma_offset. This adds dma_offset to struct device_d and starts honoring it in ARM dma_(un)map_single(). Also we add some comments to functions that would normally need a device argument to make the DMA <-> CPU translations device specific. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: rpi: Do not warn when firmware doesn't pass a dtbSascha Hauer2019-12-192-5/+15
| |/ | | | | | | | | | | | | When there is no dtb placed in the boot partition then none is passed by the firmware to barebox. This may be intended, so do not warn about it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/misc'Sascha Hauer2020-01-157-9/+9
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| * | MIPS: dts: rename tplink-mr3020.dts -> ar9331_tl_mr3020.dtsAntony Pavlov2020-01-143-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Linux MIPS uses <soc-name>_<board-name>.dts board dts-file naming scheme so use it in barebox too. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | MIPS: loongson: rename CPU_LOONGSON1 to CPU_GS232Du Huanpeng2020-01-064-7/+7
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The CPU in the loongson 1b SoC is called GS232. Here is some active chips and it's core: NAME CPU Core(s) The loongson 3 series/server & desktop 3A3000/3B3000 GS464E 64bit x4 3A2000/3B2000 GS464E 64bit x4 3B1500 GS464 64bit x8 3A1000 GS464 64bit x4 The loongson 2 series/low power 2K1000 GS264 64bit x2 2F GS464 64bit x1 2H GS464 64bit x1 The loongson 1 series/embeded 1C101 GS132R 32bit ? 1D GS132 32bit ? 1C GS232 32bit x1 1B GS232 32bit x1 1A GS232 32bit x1 see: [1] http://www.loongson.cn/product/ Signed-off-by: Du Huanpeng <duhuanpeng@loongson.cn> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/layerscape'Sascha Hauer2020-01-151-148/+463
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| * | ARM: Layerscape: setup icids for the IOMMUSascha Hauer2020-01-131-16/+265
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Isolation Context Identifiers (icid) have to be configured in the hardware and communicated to the Kernel via device tree fixups. This adds the missing bits and pieces to make the IOMMU work under Linux. As of Linux-5.5 the SMMU doesn't work out of the box. This series has been tested in conjunction with this Kernel series: https://lore.kernel.org/patchwork/cover/997994/ Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | include/soc/fsl: Make struct ccsr_qman v3 specificSascha Hauer2020-01-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | struct ccsr_qman is ifdeffed for different versions of this structure. CONFIG_SYS_FSL_QMAN_V3 is not defined which means we happen to use the wrong version on LS1046a. Hardcode it to the v3 version to make it work on LS1046a and rename it to ccsr_qman_v3 to make it obvious that it needs a change on non v3 versions. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: Layerscape: replace overcomplicated macrosSascha Hauer2020-01-131-138/+204
| |/ | | | | | | | | | | | | The icid tables are generated with several macros which makes the code hard to read. Drop the macros. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/imx'Sascha Hauer2020-01-1525-282/+499
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| * | esdhc-pbl: remove now unused imx8_esdhc_load_piggyLucas Stach2020-01-091-1/+0
| | | | | | | | | | | | | | | Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: nxp-imx8mq-evk: fix second stage bootingLucas Stach2020-01-091-19/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the whole image already resides in DRAM, e.g. by starting the image via the bootm handler we try to load the piggydata from storage, which may well be different from our expected piggydata, already present in DRAM. Fix this by avoiding the special piggydata load function, but instead load the whole image after DRAM is up and just replace the PBL part to ensure we are still running the HAB validated code after TF-A hands back control to our code in DRAM. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | esdhc-pbl: allow to skip starting i.MX8 imageLucas Stach2020-01-093-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add an option that allows to just load the image into memory, but return to the calling function instead of directly jumping to the loaded image. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: nxp-imx8mq-evk: fix bootflow commentLucas Stach2019-12-201-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | The comment above nxp_imx8mq_evk_start is no longer accurate, as there is no trampoline in DRAM anymore. Change the comment to reflect the current boot flow. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: nxp-imx8mq-evk: clean up nxp_imx8mq_evk_startLucas Stach2019-12-201-13/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mostly cosmetic changes: - reduce scope of local variabes - wrap comment to fir 80 char limit - check return value from imx8_esdhc_load_piggy - drop intermediate function that only wraps a single other function Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: nxp-imx8mq-evk: switch the PBL memcpy parameters to common variablesLucas Stach2019-12-201-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Use the variables defined in sections.h, instead of hand rolling the same computation. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: nxp-imx8mq-evk: switch to SPDX license headerLucas Stach2019-12-201-10/+1
| | | | | | | | | | | | | | | Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: rdu1: add default environmentLucas Stach2019-12-208-0/+54
| | | | | | | | | | | | | | | | | | | | | | | | Adds scripts for network detection in development case and autoboot from the SD card. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: rdu2: fixup touchscreen aliasLucas Stach2019-12-201-1/+8
| | | | | | | | | | | | | | | Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: rdu2: don't reduce i2c frequency for eGalax touchLucas Stach2019-12-201-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | The electrical issues that caused the i2c bus to lock up at higher frequencies has been tracked down and solved by a improved i2c pin configuration, so it's no longer required to reduce the bus frequency. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | RDU2: add support to boot from SD card autonomouslyRuslan V. Sushko2019-12-201-0/+4
| | | | | | | | | | | | | | | Signed-off-by: Ruslan Sushko <Ruslan.Sushko@zii.aero> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: rdu-common: restart machine after fixing i210 device IDLucas Stach2019-12-201-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For the iNVM change to take effect we need to reset the i210 adapter. As this is not really possible in isolation in Barebox, we just go through a full machine reset cycle. As this should only happen once during the lifetime of each device there is no need for a more elaborate solution. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: zii-imx8mq-dev: fixup touchscreen and ethernet switch aliasLucas Stach2019-12-201-2/+19
| | | | | | | | | | | | | | | Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: zii-imx8mq-dev: add DT fixupsLucas Stach2019-12-202-0/+148
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are only two fixups we need to apply at the moment: - The 27" RMB3 based unit has a eGalax Touchscreen instead of Synaptics. - The 10.1" SCU/CCU unit has no DEB and thus no switch, but instead the i210 ethernet is routed to the external connector directly. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: zii-imx8mq-dev: make eMMC update target the defaultLucas Stach2019-12-181-1/+2
| | | | | | | | | | | | | | | | | | | | | We only have a single update target, so make it the default. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: dts: imx6: phytec: Increase NAND barebox partition sizeStefan Riedmueller2019-12-123-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For NAND flash with eraseblock size 1 MB and more the current barebox partition size is not sufficient. The 4 FCB copies alone occupy the 4 MB partition size. Increase the partition size to 16 MB to be fit for the future and leaving some blocks for bad block handling as well. Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: dts: imx6: phycard: Use gpio binding constantsStefan Riedmueller2019-12-121-1/+3
| | | | | | | | | | | | | | | Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: dts: imx6: phycard: Switch to new partitions bindingStefan Riedmueller2019-12-121-9/+13
| | | | | | | | | | | | | | | | | | | | | | | | The SD card interface is still using the legacy partition binding. Change this by switching to the new bindings. Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: dts: imx6: phycard: Make eeprom configurableStefan Riedmueller2019-12-122-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | The EEPROM is a configurable option. So make it configurable from the dts file. Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
generated by cgit v1.2.3 (git 2.39.1) at 2024-05-03 06:27:09 +0000