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* | arm: at91: fix sdram controller initAhmad Fatoum2018-11-051-9/+9
|/ | | | | | | | | e739663535 confused parameters to __raw_writel. The value and the base address was mixed up. Fixes: e739663535 (arm: at91: code cleanup in at91sam926x_board_init) Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/socfpga'Sascha Hauer2018-10-093-9/+125
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| * ARM: socfpga: Add missing inline to noop functionsSascha Hauer2018-10-031-5/+5
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: dts: socfpga: achilles: enable second ethernet portSteffen Trumtrar2018-10-021-0/+21
| | | | | | | | | | | | | | The Reflex Achilles has 2 ethernet ports. Enable the second one, too. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: socfpga: achilles: let bootchooser boot from system0 initiallyEnrico Jorns2018-10-021-1/+1
| | | | | | | | | | Signed-off-by: Enrico Jorns <ejo@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: socfpga: achilles: bitstream will not exceed 32MEnrico Jorns2018-10-021-1/+1
| | | | | | | | | | | | | | Thus we decrease offsets to save space Signed-off-by: Enrico Jorns <ejo@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: socfpga: achilles: move partitions to free disk spaceEnrico Jorns2018-10-021-2/+2
| | | | | | | | | | | | | | | | Prior to this, environment and state was placed inside the redundant barbeox copies. Signed-off-by: Enrico Jorns <ejo@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * barebox: move mmc partitions to partitions subnodeEnrico Jorns2018-10-021-7/+12
| | | | | | | | | | | | | | | | Linux kernel implicitly adds this, thus we have to add them explicitly to stay compatible Signed-off-by: Enrico Jorns <ejo@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * dts: achilles: add state for bootchooserEnrico Jorns2018-10-021-0/+90
| | | | | | | | | | Signed-off-by: Enrico Jorns <ejo@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/imx'Sascha Hauer2018-10-0939-529/+1516
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| * | i.MX: Add support for ZII's i.MX7D-based RPU2 boardAndrey Smirnov2018-10-088-0/+727
| | | | | | | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX7: bbu: Add I2C and SPI handlerAndrey Smirnov2018-10-082-0/+16
| | | | | | | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX7: bbu: Add MMC boot handlerAndrey Smirnov2018-10-082-0/+15
| | | | | | | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | i.MX7D: DCD: Create shared DDR configuration headerAndrey Smirnov2018-10-082-78/+79
| | | | | | | | | | | | | | | | | | | | | | | | Create a shared DDR configuration header based on configuration used by i.MX7D SabreSD board. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: freescale-mx7-sabresd: Make use of imx7d_barebox_entry()Andrey Smirnov2018-10-081-5/+2
| | | | | | | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX: esdctl: Add memory size detection for i.MX7DAndrey Smirnov2018-10-084-0/+79
| | | | | | | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: rdu1: Remove now redundant RAVE SP properties/nodesAndrey Smirnov2018-10-081-21/+0
| | | | | | | | | | | | | | | | | | | | | | | | Remove RAVE SP properties/nodes that are now availible from upstream Linux DTS files. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: rdu2: Remove now redundant RAVE SP properties/nodesAndrey Smirnov2018-10-081-16/+0
| | | | | | | | | | | | | | | | | | | | | | | | Remove RAVE SP properties/nodes that are now availible from upstream Linux DTS files. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX8MQ: Add node for CPU thermal sensorAndrey Smirnov2018-09-241-0/+85
| | | | | | | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: nxp-imx8mq-evk: Make use of memory size detection codeAndrey Smirnov2018-09-243-9/+3
| | | | | | | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX: esdctl: Add memory size detection for i.MX8MQAndrey Smirnov2018-09-243-0/+209
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add memory size detection for i.MX8MQ. Only basic LPDDR4 configurations are supported for now. Support for other types of memory can be added later once we have any boards that use it. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: nxp-imx8mq-evk: Add FEC's PHY configuration codeAndrey Smirnov2018-09-242-0/+25
| | | | | | | | | | | | | | | | | | | | | Add appropriate DT and PHY fixup code needed for i.MX8MQ EVK board. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: nxp-imx8mq-evk: Add missing compatibility checkAndrey Smirnov2018-09-241-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | Add missing compatibility check to imx8mq_evk_mem_init() to prevent it from being executed for other i.MX8MQ boards. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX8MQ: Configure FEC1 clocksAndrey Smirnov2018-09-241-2/+14
| | | | | | | | | | | | | | | | | | | | | Select proper parents as well as rates for FEC1 related clocks. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX8MQ: Configure USDHC1,2 clocksAndrey Smirnov2018-09-241-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | Select appropriate parents as well as clock rates for USDHC1 and USDHC2 related clocks. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX8MQ: Add missing node for ECSPI1Andrey Smirnov2018-09-241-0/+10
| | | | | | | | | | | | | | | | | | | | | Add node for ECSPI1 that is missing from imx8mq.dtsi Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX: Add ZII SCU3 ESB boardAndrey Smirnov2018-09-244-2/+20
| | | | | | | | | | | | | | | | | | | | | | | | Add ZII SCU3 ESB board, which is i.MX51 based and similar enought to RDU1 that it can be handled by the same image (different DT). Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX: Add ZII SCU2 Mezz BoardAndrey Smirnov2018-09-244-5/+90
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add ZII SCU2 Mezz Board. Which is a i.MX51 based board that is similar enough to RDU1 that they both can be handled by a single image (type can be detected at runtime). Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: zii-vf610-dev: Convert SPU3 to use upstream DTSAndrey Smirnov2018-09-245-150/+14
| | | | | | | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: zii-vf610-dev: Convert CFU1 to use upstream DTSAndrey Smirnov2018-09-245-216/+17
| | | | | | | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX: boot: Detect boot instance on i.MX51Andrey Smirnov2018-09-241-0/+2
| | | | | | | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX: boot: Make use of FIELD_GET() in imx51_get_boot_source()Andrey Smirnov2018-09-241-7/+7
| | | | | | | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: rdu1: Switch MMC BBU to use boot partitionsAndrey Smirnov2018-09-191-1/+1
| | | | | | | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: rdu1: Change BBU names to match RDU2Andrey Smirnov2018-09-191-2/+2
| | | | | | | | | | | | | | | | | | | | | Change BBU names to match RDU2 and the rest of ZII boards. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: rdu2: Switch MMC BBU to use boot partitionsAndrey Smirnov2018-09-191-1/+1
| | | | | | | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: zii-vf610-dev: Switch MMC BBU to use boot partitionsAndrey Smirnov2018-09-191-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | Convert SPU3 to use MMC boot partitions as well as extend the initcall to cover CFU1 which can support this feature as well. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | dts: VFxxx: Add aliases for ESDHC controllersAndrey Smirnov2018-09-194-2/+17
| | | | | | | | | | | | | | | | | | | | | | | | Add aliases for ESDHC controllers in order to make their naming across Vybrid and i.MX. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: VFxxx: bbu: Add a handler for MMC boot partitionsAndrey Smirnov2018-09-192-0/+16
| | | | | | | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX: bbu: Detect MMC before reading current boot partitionAndrey Smirnov2018-09-191-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | In order to be able to read "mmcN.boot" we need to detect that device first. Not doing so would result in failure if "barebox_update" is executed before "detect mmc0". Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX: bbu: Convert devicefile to device nameAndrey Smirnov2018-09-191-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | Data->devicefile can contain absolute path to target device, so we need to convert it to a device name before we can safely use it. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX: bbu: Check retrun value of getenv()Andrey Smirnov2018-09-191-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Add code to make sure that getenv() returned correct result and bail out if it failed. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX51: bbu: Add a handler for MMC boot partitionsAndrey Smirnov2018-09-192-0/+15
| | | | | | | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX: bbu: Add support for v1 header to MMC boot handlerAndrey Smirnov2018-09-191-15/+17
| |/ | | | | | | | | | | | | | | | | | | Convert imx_bbu_internal_v2_mmcboot_update() to use imx_bbu_update() for actual update in order to be able to support v1 as well as v2 headers. While at it rename the function to imx_bbu_internal_mmcboot_update() to reflect that change. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | arm: crypto: fix SHA256 shipped assembler codeLucas Stach2018-10-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Binutils 2.29 changed behavior of the adr instruction to always add the thumb mode switch offset, which breaks usages where the user is interested in the address of an internal symbol, instead of a jump address. Binutils 3.31 fixed this by only adding the offset when interworking is required. As there are toolchains out there with broken binutils, it's better to fix the code to work around the issue by not using the named label. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Tested-by: Robert Schwebel <r.schwebel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: socfpga: Arria10: Fix compiler warningSascha Hauer2018-10-081-1/+1
| | | | | | | | | | | | | | | | | | Fixes: arch/arm/mach-socfpga/arria10-xload.c: In function 'arria10_prepare_mmc': arch/arm/mach-socfpga/arria10-xload.c:339:40: warning: dereferencing 'void *' pointer Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: socfpga: Arria10: add missing staticSascha Hauer2018-10-081-1/+1
|/ | | | | | Avoid "multiple definition of `a10_wait_for_usermode'" Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX27: Fix NAND boot with newer gccSascha Hauer2018-09-191-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a fix for a very weird icache problem when booting from NAND. With a OSELAS-2018.01 toolchain imx27_barebox_boot_nand_external() is compiled like this: 0000063c <imx27_barebox_boot_nand_external>: 63c: e92d4010 push {r4, lr} 640: e1a0200f mov r2, pc 644: e282230a add r2, r2, #671088640 ; 0x28000000 648: e3520b02 cmp r2, #2048 ; 0x800 64c: 9a000012 bls 69c <imx27_barebox_boot_nand_external+0x60> 650: eb000034 bl 728 <imx27_barebox_entry> 654: e592c000 ldr ip, [r2] 658: e2822004 add r2, r2, #4 65c: e580c000 str ip, [r0] 660: e1520001 cmp r2, r1 664: e2820332 add r0, r2, #-939524096 ; 0xc8000000 668: 1afffff9 bne 654 <imx27_barebox_boot_nand_external+0x18> 66c: e1a00003 mov r0, r3 670: e59f2034 ldr r2, [pc, #52] ; 6ac <imx27_barebox_boot_nand_external+0x70> 674: e2401376 sub r1, r0, #-671088639 ; 0xd8000001 678: e59f3030 ldr r3, [pc, #48] ; 6b0 <imx27_barebox_boot_nand_external+0x74> 67c: e1510002 cmp r1, r2 680: 93c004ff bicls r0, r0, #-16777216 ; 0xff000000 684: e1a03a83 lsl r3, r3, #21 688: e1a03aa3 lsr r3, r3, #21 68c: 93c0073e bicls r0, r0, #16252928 ; 0xf80000 690: e283320a add r3, r3, #-1610612736 ; 0xa0000000 694: 9280020a addls r0, r0, #-1610612736 ; 0xa0000000 698: e12fff33 blx r3 69c: e1a03000 mov r3, r0 6a0: e3a02336 mov r2, #-671088640 ; 0xd8000000 6a4: e59f1008 ldr r1, [pc, #8] ; 6b4 <imx27_barebox_boot_nand_external+0x78> 6a8: eaffffec b 660 <imx27_barebox_boot_nand_external+0x24> 6ac: 0007fffe .word 0x0007fffe 6b0: 00000604 .word 0x00000604 6b4: d8000800 .word 0xd8000800 From 0x64c the code jumps to 0x69c and then back to 0x660. The jump to 0x69c triggers a icache line fetch which works fine, but then when the function continues and the code enters the same instruction cache line at 0x680 again then only garbage is executed, most of the time we end up in an endless loop and the CPU jumps back somewhere at the beginning of the function. I have carefully added nops right before the out of line code block. When there are enough nops to move the block to the next cache line then the code works again. That of course is no solution to the problem. Since I am out of ideas what the real issue is let's just disable the icache in this function and re-enable it in the next function. This seems to solve the problem. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Tested-by: Florian Bäuerle <florian.baeuerle@allegion.com>
* ARM: radxa-rock: Fix passing device tree to kernelSascha Hauer2018-09-181-3/+1
| | | | | | | The device tree can be passed in global.bootm.oftree. This used to be "oftree -f" / "oftree -l" which no longer works. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: omap: xload: Fix network boot filenameSascha Hauer2018-09-181-2/+5
| | | | | | | | | | | | The dhcp code no longer exports the "bootfile" environment variable. It now uses global.dhcp.bootfile. Since global variable support is not necessarily part of the MLO we instead use struct dhcp_result * to get the bootfile information. Fixes: 528298b702 ("net: dhcp: rework") Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Tested-by: Dennis Menschel <menschel-d@posteo.de>
* MIPS: fix PCI quirk infrastructure buildAntony Pavlov2018-09-171-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | The commit fc2c618c2038 ("pci: add quirk infrastructure") adds necessary ld-script changes only for ARM architecture. As a result, qemu-malta build fails: LD barebox drivers/built-in.o: In function `pci_fixup_device': (.text.pci_fixup_device+0x30): undefined reference to `__end_pci_fixups_enable' (.text.pci_fixup_device+0x38): undefined reference to `__end_pci_fixups_enable' (.text.pci_fixup_device+0x34): undefined reference to `__start_pci_fixups_enable' (.text.pci_fixup_device+0x3c): undefined reference to `__start_pci_fixups_enable' (.text.pci_fixup_device+0x70): undefined reference to `__end_pci_fixups_header' (.text.pci_fixup_device+0x78): undefined reference to `__end_pci_fixups_header' (.text.pci_fixup_device+0x74): undefined reference to `__start_pci_fixups_header' (.text.pci_fixup_device+0x80): undefined reference to `__start_pci_fixups_header' (.text.pci_fixup_device+0x2c): undefined reference to `__end_pci_fixups_early' (.text.pci_fixup_device+0x88): undefined reference to `__end_pci_fixups_early' (.text.pci_fixup_device+0x84): undefined reference to `__start_pci_fixups_early' (.text.pci_fixup_device+0x90): undefined reference to `__start_pci_fixups_early' make: *** [Makefile:767: barebox] Error 1 Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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