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* ARM: cpu: don't clobber sp when booted in HYP modeAhmad Fatoum2022-06-011-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | arm_cpu_lowlevel_init() is usually called first thing and will ensure barebox runs in SVC mode. If barebox is started in HYP mode instead, like is the case on Raspberry Pi 2-3, it will do an exception return into SVC mode, which will bank the previously used SP_Hyp and restore SP_Svc that may not have been properly initialized by barebox. This wasn't too bad so far, because arm_setup_stack was usually called after arm_cpu_lowlevel_init, but with ENTRY_FUNCTION_WITHSTACK, SP is initialized early on in the naked entry point with arm_cpu_lowlevel_init() being called after that. This can lead to spurious boot hangs in the Raspberry Pi 2 and 3 entry points. Fix this by always saving sp to r3 and restoring it, like we do with lr. This is safe to do, because r3 isn't clobbered by any instruction in arm_cpu_lowlevel_init() and because it's an argument register, callers have to expect it being overwritten by the callee. Fixes: b267578d0567 ("ARM: rpi: use ENTRY_FUNCTION_WITHSTACK to prepare for ARM64 support") Fixes: 41292192c01b ("ARM: safely switch from HYP to SVC mode if required") Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220531082914.1654316-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: rpi: reinstate support for multiple variants with same DTAhmad Fatoum2022-05-311-91/+19
| | | | | | | | | | | | | | Raspberry Pi support contains custom board code to allow the same DT to be used across different board model for a given Raspberry Pi generation. For this to work, barebox may not deduce the model specific init from the device tree compatible, but instead detect it automatically. This was broken in the commit changing the board code to the driver model, so reinstate it. Fixes: c062cd5cf47d ("ARM: rpi: validate devicetree compatible instead of changing model name") Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220530162016.1052586-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* arm: imx: mmdc_size: Increase row_max for imx8mTeresa Remmet2022-05-241-1/+1
| | | | | | | | | | | | | | | As DDRC_ADDRMAP7_ROW_B16 and DDRC_ADDRMAP7_ROW_B17 are used now for the row size calculation we need to increase row_max to 18. For LPDDR4 this only works in combination with ram timings created with recent configuration spreadsheet versions. With older versions the register DDRC_ADDRMAP7 may not be set and calculation will lead to wrong results even with this patch. Fixes: dad2b5636bd8 ("ARM: imx: Add imx8 support for 18 bit SDRAM row size handle") Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Link: https://lore.barebox.org/20220520142337.993417-1-t.remmet@phytec.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/stm32'Sascha Hauer2022-05-192-4/+122
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| * ARM: dts: stm32mp151-prtt1c: add DSA switch and MDIO nodesOleksij Rempel2022-05-111-4/+120
| | | | | | | | | | | | | | | | | | For netboot support we need to configure switch and PHYs. So, provide needed nodes. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://lore.barebox.org/20220510121447.216507-2-o.rempel@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: boards: protonic-stm32mp1: enable deep-probe supportOleksij Rempel2022-05-111-0/+2
| | | | | | | | | | | | | | | | | | We are on early development stage, so enable deep-probe support as early as possible to detect and fix possible regressions. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://lore.barebox.org/20220510121447.216507-1-o.rempel@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/rpi'Sascha Hauer2022-05-194-4/+6
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| * | ARM: configs: rpi: add and document single barebox-dt-2nd bootloaderAhmad Fatoum2022-04-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With recent rework, we can install barebox along with all supported Raspberry Pi device trees to the boot partition and let the VideoCore take core of passing the correct device tree to barebox. Enable the relevant option in config and document this briefly. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220425062849.17954-5-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: rpi: remove outdated comment after stack setup reworkAhmad Fatoum2022-04-251-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Stack is now set up with ENTRY_FUNCTION_WITH_STACK, so board code need not concern itself with what is allowed in C code and what isn't before stack is setup. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220425062849.17954-4-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: rpi: don't warn about lack of videocore fdtAhmad Fatoum2022-04-251-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When barebox is booted as generic second stage DT image, it will throw an annoying but harmless error that the videocore FDT saved in PBL has invalid magic. This is expected because the generic code doesn't store the device tree, instead it passes it to barebox proper to probe from. Storing the DT in /vd.dtb would thus just be duplication. Remove the error message in this case. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220425062849.17954-3-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: cpu: board-dt-2nd: call arm_cpu_lowlevel_initAhmad Fatoum2022-04-251-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The generic DT image could be started by boot firmware that doesn't do all the initialization that we do in arm_cpu_lowlevel_init(), so call it always for good measure. This enables using the generic image as second stage to the Raspberry Pi videocore. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220425062849.17954-2-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/of-board'Sascha Hauer2022-05-192-60/+22
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| * | | ARM: boards: protonic-imx6: add HW revision specific machine compatibleOleksij Rempel2022-05-051-4/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently we use generic/pinned machine compatible for different HW revisions. With this patch we extend this compatible string with HW revision specific. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://lore.barebox.org/20220503091220.3871612-6-o.rempel@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: boards: skov-imx6: make use of of_prepend_machine_compatible()Oleksij Rempel2022-05-051-37/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace board specific fixup_machine_compatible() with generic of_prepend_machine_compatible() Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://lore.barebox.org/20220503091220.3871612-5-o.rempel@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: boards: protonic-imx6: make use of barebox_set_serial_number()Oleksij Rempel2022-05-051-19/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace board specific serial-number fixup with common barebox_set_serial_number(). Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://lore.barebox.org/20220503091220.3871612-3-o.rempel@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | Merge branch 'for-next/misc'Sascha Hauer2022-05-1925-178/+310
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| * | | | usb: dwc3: align dwc3 clocks with bindingMichael Riesch2022-05-113-62/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The device tree bindings snps,dwc3.yaml and rockchip,dwc3.yaml specify different clock names. This inconsistency did not matter in the past as the snps,dwc3 used to be a subnode of the rockchip,rk3xyz-dwc3 glue node. For the RK356x, however, a different approach is used and the two nodes are merged. Therefore, the dwc3 driver must accept both groups of clock names. This step is a prerequisite for replacing the initial rk3568.dtsi in arch/arm/dts with the mainline Linux version. For compatibility, the former is updated accordingly. This also illustrates the migration from glue node and subnode to a single device tree node. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.barebox.org/20220509113618.1602657-3-michael.riesch@wolfvision.net Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | phy: rockchip: align naneng-combphy clocks and resets with bindingMichael Riesch2022-05-111-6/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There was no device tree binding in mainline Linux when this driver was introduced in barebox. This has changed in the mean time, hence we need to align the clocks and resets in this driver. This step is a prerequisite for replacing the initial rk3568.dtsi in arch/arm/dts with the mainline Linux version. For compatibility, the former is updated accordingly. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.barebox.org/20220509113618.1602657-2-michael.riesch@wolfvision.net Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: omap: Cleanup omap4_revisionAlexander Shiyan2022-05-051-13/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clean up the omap4 revision function by removing exceeding break statements. Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com> Link: https://lore.barebox.org/20220505065206.10816-1-eagle.alexander923@gmail.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | arm: boards: Add support for MYIR MYD-AM335X Development BoardAlexander Shiyan2022-04-2913-1/+228
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MYD-AM335X Development Board designed by MYIR is a high-performance ARM Evaluation Module (EVM) using the MYC-AM335X CPU module as the core controller board. It is based on up to 1GHz Texas Instruments (TI) Sitara AM335x family of ARM Cortex-A8 Microprocessors (MPUs) that deliver high DMIPs at a low cost while also delivering optional 3D graphics acceleration and key peripherals. Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com> Link: https://lore.barebox.org/20220426070440.12471-1-eagle.alexander923@gmail.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | RISC-V: sifive: enable SPI Flash and SD in configAhmad Fatoum2022-04-291-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To test SD-Card: ./test/emulate.pl sifive_defconfig -- -drive file=image.sdcard,if=sd Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Link: https://lore.barebox.org/20220426064604.422292-2-ahmad@a3f.at Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | video: omap-fb: Rework to enable COMPILE_TEST optionAlexander Shiyan2022-04-257-90/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To add a compilation check for the omap-fb driver, move the omap-fb.h header to a global location. The "omap_add_display" function is used only for legacy boards, so we will move it to a common place for such calls (omap_devices.c). Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com> Link: https://lore.barebox.org/20220422071158.14631-1-eagle.alexander923@gmail.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | | ARM: rockchip: fix iodomain for r2pro V1.0Frank Wunderlich2022-05-162-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current code sets vccio4 and vccio6 both to 1v8. R2Pro v1.0 needs 3v3 setting on vccio4, else gmac0 (switch for lan-ports) will be damaged. IO-domain is per default 3v3 so only vccio6 needs to be set to 1v8 and clear this bit in the 3v3 register. Fixes: 8ba96c5942d6 ("ARM: rockchip: add BPI-R2-Pro V00 board") Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Link: https://lore.barebox.org/20220514155609.8306-1-linux@fw-web.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | | ARM: imx: esdctl: fix LPDDR4 size calculationLucas Stach2022-05-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DDRC only uses the DEVICE_CONFIG field for memory types other than LPDDR4. While LPDDR4 always has a bus width of x32, the script aid generates the value for a x16 bus, as this was apparently used for the controller validation. This resulted in the calculated DRAM size to be halved on boards with LPDDR4 memory. Fixes: d8d5778ee8c2 ("ARM: imx: Correct mem size calculation for 4/8/16/32 bit bus width") Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Link: https://lore.barebox.org/20220513141625.1411217-1-l.stach@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | | ARM: i.MX7: esdctl: fix out-of-bounds read on memory size calculationAhmad Fatoum2022-05-161-3/+5
| |/ / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | addrmap[] has 9 elements on i.MX8M platforms and 7 elements on i.MX7. Checking unconditionally for addrmap[8] is thus out-of-bounds on the i.MX7. Get both arrays to the same size to fix this. This is ok, because an addrmap of 0 is a no-op. Fixes: 42d45ef380c5 ("ARM: imx: Add imx8 support for SDRAM with two or more bank groups") Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220513135352.2061026-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | ARM: karo-tx6x: Fix DCD check operationsSascha Hauer2022-05-034-36/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In f04deb4018 was discovered that we used the wrong names for the check operations. What we named "while_all_bits_clear" really was the operation "until_all_bits_clear" and likewise for the other operations, so this patch renamed the operations from "while_*" to "until_*". Additionally it was assumed that the users have the correct textual logic, but were compiled to the wrong result. At least for the Karo TX6X boards it was the other way round though: The texts were wrong, but the result was correct. This means, although they had the wrong text, the result was working on the hardware. Now f04deb4018 replaced "while_all_bits_clear" with "until_all_bits_set" and with this broke the DCD tables. Fix this by replacing them with the correct commands. Fixes: f04deb4018 ("i.MX/DCD compiler and interpreter: logic is different") Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | ARM: rpi: fix CM3 breakage after multi-image reworkAhmad Fatoum2022-05-032-4/+29
| |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | barebox used to apply quirks by asking VideoCore firmware. If this was not possible, an error message is printed, but other initialization happened as expected. With the move to board driver matched by DT, we incur two breakages: - Compute Module 3/3+ used to be explicitly supported, but are absent in new compatible list - Unsupported variants used to initialize with only an error message, but now their revision ID must be known Fix this by amending the compatible list with all non-Raspberry Pi 4 compatibles listed in the binding. We also make existence of a match data optional and error out if it doesn't exist. This is so far unused, but it conveys the intent for future users. Fixes: c062cd5cf47d ("ARM: rpi: validate devicetree compatible instead of changing model name") Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220502142959.1325298-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | clocksource: assign non-zero priorities to all clocksourcesAhmad Fatoum2022-04-2515-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most barebox clocksources have a zero priority and if multiple of them exist, but no higher priority ones, the first to call init_clock wins. Some supported boards like the Raspberry Pi additionally depended on initcall ordering to favor one zero-priority clocksource over another. With the move to deep probe and with Commit b641580deb8c ("of: platform: Ensure timers are probed early"), device tree blob iteration order could now dictate which clocksource is ultimately used. This led to a 20 times slower clock source being chosen on the Raspberry Pi, because the ARM architected timer was taken instead of the bcm2835 timer. Fix the root cause by assigning priorities to all clocksource drivers. Priorities chosen are: 50: device_initcall 60: coredevice_initcall 70: postcore_initcall 80: core_initcall These priorities are all below 100, which was previously the lowest positive priority and as they are positive, they win against the dummy clocksource. This should ensure no priority inversion happens. Fixes: b641580deb8c ("of: platform: Ensure timers are probed early") Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220425094857.674044-4-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | ARM: asm: fix miscompilation of 32-bit ENTRY_FUNCTION_WITHSTACKAhmad Fatoum2022-04-251-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gcc-11.1.1 shipped with OSELAS.Toolchain-2021.07.0 hoists a single instruction from __ARM_SETUP_STACK in front of __barebox_arm_head breaking the barebox header format for the Raspberry Pi 3. This can't happen with ARM64 and the Raspberry Pi entry points are currently the only 32-bit users. While the resulting barebox image was still bootable, header detection would fail. Add an intermediate naked function for arm32 to work around this. This is not required for plain ENTRY_FUNCTION, because the board-supplied entry point is already NAKED. For ENTRY_FUNCTION_WITH_FUNCTION, that naked entry point is moved to arch code intentionally to reduce pitfalls for board code authors.. Fixes: 880c9803b95a ("ARM: implement ENTRY_FUNCTION_WITHSTACK") Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220425094857.674044-2-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/stm32'Sascha Hauer2022-04-211-5/+0
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| * | ARM: dts: stm32mp: remove no-longer required DT overrideAhmad Fatoum2022-03-281-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These same properties have been available in the upstream DT since Linux commit c9669b4692ce ("ARM: dts: stm32: add usbphyc vdda1v1 and vdda1v8 supplies on stm32mp151") imported to barebox with commit f826d85b7ab0 ("dts: update to v5.12-rc1"). They can thus be safely dropped now. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220322132545.227838-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/misc'Sascha Hauer2022-04-215-151/+22
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| * | ARM: Rockchip: Update DTS for BPI-R2Pro for new HW-RevFrank Wunderlich2022-04-141-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | New Hardware revision swapped the gmacs (wan is now gmac1). Previous Revision (v00) was not in public sale so devicetree can be safely changed. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Link: https://lore.barebox.org/20220411114447.20488-1-linux@fw-web.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: dts: at91-microchip-ksz9477-evb: start using kernel DTOleksij Rempel2022-04-121-136/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | This DT is mainlined to the kernel. Now we can start using kernel version. At same time it will fix SPI and KSZ switch detection. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://lore.barebox.org/20220407085933.952078-1-o.rempel@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: fix GCC 11.x build failures for ARMv7Ian Abbott2022-04-121-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Building barebox for ARMv7 with GCC 11.x results in errors similar to the following: CC common/state/state_variables.o {standard input}: Assembler messages: {standard input}:1535: Error: selected processor does not support `rev r3,r3' in Thumb mode {standard input}:1576: Error: selected processor does not support `rev r3,r3' in Thumb mode Or: CC common/state/state_variables.o {standard input}: Assembler messages: {standard input}:1405: Error: selected processor does not support `rev r3,r3' in ARM mode {standard input}:1453: Error: selected processor does not support `rev r3,r3' in ARM mode The problem is that the compiler option `-march=armv7-a` is not being chosen by "arch/arm/Makefile", but rather the fallback options `-march=armv5t -Wa,-march=armv7-a` are being chosen. Appending `-msoft-float` to `KBUILD_CPPFLAGS` earlier in "arch/arm/Makefile" before the tests for supported `-march` options seems to fix the problem. Signed-off-by: Ian Abbott <abbotti@mev.co.uk> Link: https://lore.barebox.org/20220408170154.114526-1-abbotti@mev.co.uk Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | sandbox: board: add stickypage.bin into .gitignoreAhmad Fatoum2022-03-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Otherwise, it shows up in version control for in-tree builds. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220318153047.733241-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: asm: setjmp: add missing .pop_sectionAhmad Fatoum2022-03-281-0/+1
| |/ | | | | | | | | | | | | | | | | This fixes a mismatched .push_section. This had no effect, because the file ended after the follow-up .push_section. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Link: https://lore.barebox.org/20220319074335.1313872-1-ahmad@a3f.at Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/imx'Sascha Hauer2022-04-2110-23/+772
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| * | ARM: pbab01: allow USB-OTG port runtime configurationAndrej Picej2022-04-201-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit a5a4c1d5a3 ("dts: update to v5.13-rc1"), which synced kernel dts, USB-OTG port on phyFLEX board was set to work only in peripheral mode. This has to do with phyFLEX baseboard hardware bug, which prevents correct USB OTG ID pin detection in kernel code. Unlike linux kernel, barebox doesn't support OTG auto-detection mode via ID pin. In barebox, user has to select desired USB mode of operation by setting 'otg.mode' variable. Thus set the 'dr_mode' property to "otg" to be able to later select USB OTG operating mode at runtime (either host or peripheral). Signed-off-by: Andrej Picej <andrej.picej@norik.com> Link: https://lore.barebox.org/20220419124659.257134-1-andrej.picej@norik.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: CCMX51: Add support for 16-bit memory module variantsAlexander Shiyan2022-04-203-2/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | Modules can have memory chips with a bus width of 16 bits. Let's separate the binaries for initializing different types. Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com> Link: https://lore.barebox.org/20220419072123.28590-3-eagle.alexander923@gmail.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: CCMX51: Add support for low-level debugAlexander Shiyan2022-04-201-0/+28
| | | | | | | | | | | | | | | | | | Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com> Link: https://lore.barebox.org/20220419072123.28590-2-eagle.alexander923@gmail.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: CCMX51: Remove excess assignmentAlexander Shiyan2022-04-201-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | Default assignment for board index is already done in array initialization. Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com> Link: https://lore.barebox.org/20220419072123.28590-1-eagle.alexander923@gmail.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: boards: protonic-imx6: fix file system access warningOleksij Rempel2022-04-011-11/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We should not access a file system from the poller. So, do it from the worker. This patch will fix warning on FS access for Protonic board code. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://lore.barebox.org/20220328120956.2402132-1-o.rempel@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: boards: protonic-imx6: properly configure RGMII direction for the FEC MACOleksij Rempel2022-03-281-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | To make SJA1105 switch work properly with bareobx, we need to configure RGMII ref_clk. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://lore.barebox.org/20220321092103.1357659-2-o.rempel@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: boards: protonic-imx6: add board specific BBU SD handlersOleksij Rempel2022-03-281-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | Add barebox update handler for the SD ports. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://lore.barebox.org/20220321092103.1357659-1-o.rempel@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: webasto-marvel: share the run-time setup with the ccbv2 variantJuergen Borleis2022-03-282-7/+23
| | | | | | | | | | | | | | | | | | Signed-off-by: Juergen Borleis <jbe@pengutronix.de> Link: https://lore.barebox.org/20220321140856.59479-3-jbe@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: webasto-marvel: add device tree shared with the kernelJuergen Borleis2022-03-282-0/+587
| | | | | | | | | | | | | | | | | | Signed-off-by: Juergen Borleis <jbe@pengutronix.de> Link: https://lore.barebox.org/20220321140856.59479-2-jbe@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: webasto-ccbv2: consider the available memory size for opteeJuergen Borleis2022-03-281-4/+4
| |/ | | | | | | | | | | Signed-off-by: Juergen Borleis <jbe@pengutronix.de> Link: https://lore.barebox.org/20220321140856.59479-1-jbe@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: omap: Fix linker error with MTD disabledSascha Hauer2022-04-211-0/+5
| | | | | | | | | | | | | | We are using mtd functions now, make sure we do so only with MTD enabled to prevent linker errors. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: omap: xload: read from unpartitioned deviceSascha Hauer2022-04-211-53/+33
|/ | | | | | | | | | | | The omap xload code creates a temporary partition where the barebox image is read from. Since 7f9f45b9bf it is no longer allowed to create overlapping partitions which means the temporary partition can no longer be created when the device was partitioned already. Fix this by using the mtd PEB api to read the barebox image from the full device and not from a partition. Fixes: 7f9f45b9bf ("devfs: Do not create overlapping partitions") Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
generated by cgit v1.2.3 (git 2.39.1) at 2024-05-01 17:05:01 +0000