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* efi: payload: rename CONFIG_EFI_BOOTUP to CONFIG_EFI_PAYLOADAhmad Fatoum2024-03-051-1/+1
| | | | | | | | | | The symbol is internal, so we don't break anything by renaming it. CONFIG_EFI_PAYLOAD is clearer in intent, as BOOTUP doesn't clearly indificate whether barebox would act as EFI payload or as EFI loader. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240304190038.3486881-9-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* drivers: soc: split off powerdomains into new pmdomain directoryAhmad Fatoum2024-01-221-0/+1
| | | | | | | | | Linux v6.6 has moved the pmdomain drivers from drivers/soc to drivers/pmdomain. Follow its lead in barebox too. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240119162610.1014870-2-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* optee: add bidirectional communication supportMarc Kleine-Budde2023-12-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | So far, barebox support for OP-TEE was restricted to loading it either early in PBL or via bootm and to not step over it when allocating memory. This was guarded behind CONFIG_HAVE_OPTEE. This commit imports from Linux the driver behind CONFIG_OPTEE, which brings actual bidirectional communication with OP-TEE in barebox. This is useful as trusted applications running in OP-TEE can provide various services to the normal world, like filtered OTP access, RNG seeded from normally inaccessible entropy sources, firmware TPM and management of resources like clocks, resets, power domains and voltage regulators in the form of SCMI. We already have SCMI support, but only via the SMC calling convention for communication with TF-A. For integration with publicly available STM32MP13 firmware, we need to do SCMI over OP-TEE and this is likewise interesting for STM32MP1 trusted boot setups. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20231127063559.2205776-7-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Add initial mailbox supportSascha Hauer2023-11-031-0/+1
| | | | | | | | | This adds a minimum mailbox support. The code is based on the corresponding U-Boot code. It's currently enough to bring up the communication with the SCI on TI K3 SoCs. Link: https://lore.barebox.org/20230803105003.4088205-6-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* firmware: make drivers/firmware/ obj-ySascha Hauer2023-05-031-1/+1
| | | | | | | | drivers/firmware/ contains ARM SCMI support which doesn't depend on CONFIG_FIRMWARE. Unconditionally compile drivers/firmware/ to make sure SCMI support can be compiled in with CONFIG_FIRMWARE disabled. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* drivers: drop unneeded CONFIG_CRYPTO_HW guardAhmad Fatoum2023-03-101-1/+1
| | | | | | | | | | | CAAM and imx-scc both have their own Kconfig symbols, so CONFIG_CRYPTO_HW only serves the purpose of hiding a two entry menu behind it. Let's just get rid of it. This has the added benefit of being able to use imply on the drivers. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230307093426.1551193-4-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* drivers: implement of_optee_fixup helper functionAhmad Fatoum2023-03-101-0/+1
| | | | | | | | | This function can be called by board-code after checking whether OP-TEE was installed or not. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230307093426.1551193-2-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* drivers: migrate "GPL-2.0" license identifiers to SPDX 2.0Roland Hieber2021-11-221-1/+1
| | | | | | | | | | "GPL-2.0-only" was introduced in SPDX 2.0, and the old identifier "GPL-2.0" is now considered deprecated; see <https://spdx.org/licenses>. Fixes: 28f4a6a4df76f0f1581d (2021-10-30, "drivers: add missing SPDX-License-Identifier") Signed-off-by: Roland Hieber <rhi@pengutronix.de> Link: https://lore.barebox.org/20211117113851.2022669-2-rhi@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* drivers: add missing SPDX-License-IdentifierAhmad Fatoum2021-11-011-0/+1
| | | | | | | | | | | | | | | | | | | | This adds the suitable SPDX-License-Identifier to all files in drivers/ that previously lacked one. To aid manual inspection, following heuristics can be used: * No changes outside of comments/whitespace: git show -U0 HEAD | rg -v '^(@@|diff|index)|[-+]([-+]|//|#|[\s/]\*)' * -or-later come in pairs: git show --inter-hunk-context=19 HEAD | \ perl -0777 -F'/^@/gm' -ne 'for (@F) { @m = /later/g; print if @m & 1 }' Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20211030175632.2276077-4-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/riscv'Sascha Hauer2021-07-181-1/+1
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| * drivers: soc: sifive: add basic L2 cache controller driverAhmad Fatoum2021-06-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | SiFive SoCs are cache coherent with respect to other DMA masters, so there is no need to explicitly flush cache lines. Incoming StarFive SoC uses SiFive CPU and L2 cache controller, but is cache-incoherent and thus needs the maintenance for DMA. Add a basic driver that exports the cache flush function for SoC-specific drivers to use. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20210619045055.779-13-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | drivers: add fpga bridge frameworkSteffen Trumtrar2021-06-211-0/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import the fpga bridge framework from linux v4.10-rc2. Description from the initial commit adding this to linux: 21aeda950c5f84a8351b862816d832120b217a9b fpga: add fpga bridge framework This framework adds API functions for enabling/ disabling FPGA bridges under kernel control. This allows the Linux kernel to disable FPGA bridges during FPGA reprogramming and to enable FPGA bridges when FPGA reprogramming is done. This framework is be manufacturer-agnostic, allowing it to be used in interfaces that use the FPGA Manager Framework to reprogram FPGA's. The functions are: * of_fpga_bridge_get * fpga_bridge_put Get/put an exclusive reference to a FPGA bridge. * fpga_bridge_enable * fpga_bridge_disable Enable/Disable traffic through a bridge. * fpga_bridge_register * fpga_bridge_unregister Register/unregister a device-specific low level FPGA Bridge driver. Get an exclusive reference to a bridge and add it to a list: * fpga_bridge_get_to_list To enable/disable/put a set of bridges that are on a list: * fpga_bridges_enable * fpga_bridges_disable * fpga_bridges_put Signed-off-by: Alan Tull <atull@opensource.altera.com> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Link: https://lore.barebox.org/20210616063246.14900-2-s.trumtrar@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/virtio'Sascha Hauer2021-02-221-0/+1
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| * drivers: add support for memory-mapped VirtIO paravirtualizationAhmad Fatoum2021-02-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | Sandbox is only useful to test barebox in isolation. For interaction between barebox and firmware/OS, Qemu is the better choice. Qemu supports specifying VirtIO devices on the command line, which it automatically fixes up into the device tree. This is nice. Add support for that. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | drivers: add sound card driver supportAhmad Fatoum2021-02-081-0/+1
|/ | | | | | | | | | | | | | | | | | | Add driver core boilerplate for sound support in barebox. Using the provided API in <sound.h>, consumers can play beeps for a fixed duration of time. Playing beeps is not blocking and new beeps can be enqueued while one is already playing. They will be played in succession by a poller, which will also turn off the sound card when the beep tune is over. API is also available for blocking until all beeps are played and for cancelling an underway beep tune. The API could be later extended for arbitrary PCM audio, should the need arise. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* drivers: add reboot-mode infrastructureAhmad Fatoum2020-09-291-0/+1
| | | | | | | | | | | Reboot modes provide a well-defined way to exchange information between different stage of the boot process. When configured, users can type `reboot bootloader` in the OS and barebox can read it out a device parameter. Likewise barebox can write a reboot mode for the BootROM to evaluate and then reset to fall into a serial recovery mode for example. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* i2c: always walk down into i2c/busses MakefileLucas Stach2019-12-021-1/+1
| | | | | | | | Otherwise CONFIG_I2C_IMX_EARLY won't be built if !CONFIG_I2C even though it has no direct dependency on the i2c core. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mci: MCI_IMX_ESDHC_PBL has no dependency on MCILucas Stach2019-12-021-1/+1
| | | | | | | | While it is located in the MCI deirectory, it has no direct dependency on the MCI core, so it should not be under the MCI condition in Kconfig. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* port reduced version of remoteproc framework from linuxOleksij Rempel2019-09-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | I tested it on phytec imx7 board with remoteproc ELF image previously used on Linux. Linux would load this image, create appropriate resource (if defined in image) and boot it. The barebox version is only loading image and boot it. Currently barebox version do not extract resources defined by rproc ELF image. On this early stage it is hard to say, if it is needed. Previously there was an attempt to port bootaux command from u-boot. Porting of remoteproc framework is my attempt to lead this topic in to the (IMO) right direction. To start remoteproc image, firmwareload command should be used: firmwareload /mnt/tftp/rproc-imx-rproc-fw Since firmwareload already support multiple targets, it is possible to specify which exact cortex m4 CPU should be started (if multiple CPU are present). This example shows the list of available firmware targets: barebox@Phytec i.MX7 phyBOARD-Zeta:/ firmwareload -l firmware programming handlers: name: model: soc:imx7d-rp0@0.of Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ddr: fsl: Add Freescale ddr driverSascha Hauer2019-03-131-0/+1
| | | | | | | | | | | | | | | | | | | | This adds the Freescale ddr driver used on various PowerPC and Layerscape SoCs. This is based on U-Boot-2019.01 but with many adjustments: - PowerPC support has been removed - CPP #ifdeffery replaced with C - No more global variables/functions expected from the driver, configuration is passed by the board code which calls the driver We already have the driver in the tree in an older version forked from U-Boot-2013.04. This version lacks Layerscape support and many quirks in the driver are PowerPC specific. Since the existing driver should work on all known PowerPC and PowerPC is a dead end I decided not to improve the existing driver and instead add a new Layerscape specific driver. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* drivers: Import a very basic NVME implementation from LinuxAndrey Smirnov2019-02-181-0/+1
| | | | | | | | Import a very abridged NVME implementation from Linux kernel in order to be able to access NVME storage attached via PCIe. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* soc: imx: Add GPCv2 power gating driverAndrey Smirnov2019-01-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Port of a Linux commit 03aa12629fc4f73acf28e519c9ee9cb1f5dd3706 Add code allowing for control of various power domains managed by GPCv2 IP block found in i.MX7 series of SoCs. Power domains covered by this patch are: - PCIE PHY - MIPI PHY - USB HSIC PHY - USB OTG1/2 PHY Support for any other power domain controlled by GPC is not present, and can be added at some later point. Testing of this code was done against a PCIe driver. Cc: yurovsky@gmail.com Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Dong Aisheng <dongas86@gmail.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Linux commit 9e01e2d56db23485a75864b6aeee8e443f024ddb was squashed here as well: soc: imx: gpcv2: fix regulator deferred probe If a regulator requests a deferred probe, the power domain gets initialized twice. This leads to a list double add (without list debugging the kernel hangs due to the double add later): WARNING: CPU: 0 PID: 19 at lib/list_debug.c:31 __list_add_valid+0xbc/0xc4 list_add double add: new=c1229754, prev=c12383b4, next=c1229754. Initialize the power domain after we get the regulator. Also do not print an error in case the regulator defers probing. Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Fixes: 03aa12629fc4 ("soc: imx: Add GPCv2 power gating driver") Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com> Tested-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Linux commit 3637f12faf507b0a4b8ac1e7115fc99583ab1db3 was squashed here as well soc: imx: gpcv2: correct PGC offset Correct MIPI/PCIe/USB_HSIC's PGC offset based on design RTL, the values in the Reference Manual (Rev. 1, 01/2018 and the older ones) are incorrect. The correct offset values should be as below: 0x800 ~ 0x83F: PGC for core0 of A7 platform; 0x840 ~ 0x87F: PGC for core1 of A7 platform; 0x880 ~ 0x8BF: PGC for SCU of A7 platform; 0xA00 ~ 0xA3F: PGC for fastmix/megamix; 0xC00 ~ 0xC3F: PGC for MIPI PHY; 0xC40 ~ 0xC7F: PGC for PCIe_PHY; 0xC80 ~ 0xCBF: PGC for USB OTG1 PHY; 0xCC0 ~ 0xCFF: PGC for USB OTG2 PHY; 0xD00 ~ 0xD3F: PGC for USB HSIC PHY; Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Fixes: 03aa12629fc4 ("soc: imx: Add GPCv2 power gating driver") Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/tegra'Sascha Hauer2017-04-071-0/+1
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| * add driver for Tegra124 memory controllerLucas Stach2017-03-301-0/+1
| | | | | | | | | | | | | | | | This driver performs the required initialization to get the GPU into a functional state, so it can be used when the OS is running. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/nvmem'Sascha Hauer2017-04-071-0/+1
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| * | drivers: add nvmem framework from kernelSteffen Trumtrar2017-03-301-0/+1
| |/ | | | | | | | | | | | | | | | | | | Add the nvmem framework from Linux. Based on the v4.4-rc3 version. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* / drivers: add simple hw_random implementationSteffen Trumtrar2017-03-301-0/+1
|/ | | | | | | | | | | | Add a simple hw_random implementation based on code from Linux v4.5-rc5. All the entropypool initialization stuff is left out and the obsolete data_read/data_present calls are omitted. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* efi: move bus driver to driver/efiJean-Christophe PLAGNIOL-VILLARD2017-02-241-0/+1
| | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* efi: move block io driver to driver/blockJean-Christophe PLAGNIOL-VILLARD2017-02-241-0/+1
| | | | | | | so it can be reused on any ARCH Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* drivers: Introduce AIODEV subsystemSascha Hauer2016-05-181-0/+1
| | | | | | | | | | | AIODEV/Aiodevice is a analog I/O framework that can be thought of as a simplified hybrid between 'hwmon' and 'IIO' subsystems of Linux kernel This commit is very heavily based on 'iodevice' framework proposal written by Sascha Hauer. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* crypto: add i.MX6 CAAM supportSteffen Trumtrar2016-02-121-0/+1
| | | | | | | | | | | | | | | | Add the i.MX6 crypto core CAAM with support for the random number generator. The core itself works with jobrings in which descriptors can be queued/dequeued for processing. Depending on descriptor type the CAAM unit then either produces random numbers or decrypts/encrypts data. The code is based on the Linux v4.1 driver of the same name without all the crypto/hashing components. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* imx: hab: rename driver dir to hab/Sascha Hauer2016-02-021-1/+1
| | | | | | | There's not only HABv4 but also HABv3. No need to put the corresponding code in separate directories, so rename the habv4 directory to hab. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* habv4: add High Assurance Boot v4Marc Kleine-Budde2015-04-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | This patch adds the code to check the HAB ROM for failures during development. Add a cal to "habv4_get_status();" to your board file, to get the current system state from the ROM. _NOTE_: On i.MX6 this has to happen before barebox starts the MMU, because the HAB ROM vector table is placed at 0x94, which is not accessible after the MMU has setup the zero page. This patch contains code ported from u-boot patches [1][2] by Shaojun Wang [3] which were found in the "Mx28 Secure Boot" and "Mx6 HAB (High Assurance Boot)" thread on the freescale community forum [4][5]. [1] https://community.freescale.com/servlet/JiveServlet/download/370047-269174/0001-enable-mx28-u-boot-hab.patch.txt.zip [1] https://community.freescale.com/servlet/JiveServlet/download/96451-11-266175/0001-u-boot-enable-mx6-hab.patch.zip [2] https://community.freescale.com/people/ShaojunWang [3] https://community.freescale.com/thread/317254 [3] https://community.freescale.com/docs/DOC-96451 Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* add generic PHY frameworkLucas Stach2014-11-041-0/+1
| | | | | | | | | This brings in the generix PHY framework from Linux. I tried to strip it down as much as possible while keeping it useful. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Firmware: provide a handler to program Altera FPGAsJuergen Beisert2014-09-091-0/+1
| | | | | | | | | | This handler uses a regular SPI master and a few GPIOs to program an Altera FPGA in serial mode. Signed-off-by: Juergen Beisert <jbe@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Add a simple rtc frameworkAntony Pavlov2014-07-311-0/+1
| | | | | | | | This patch adds a simple rtc framework for reading and setting board's RTC time. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: initial commitAntony Pavlov2014-07-041-0/+1
| | | | | | | | used shorten version of linux-2.6.39 pci_ids.h Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* reset: add reset controller frameworkLucas Stach2014-05-151-0/+1
| | | | | | | | Add stripped sown version of the reset controller framework from the Linux kernel. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Add initial regulator supportSascha Hauer2014-04-291-0/+1
| | | | | | | | | Provide minimal regulator support. Only supported operations are enabling and disabling regulators. Association of devices with their regulators is limited to devicetree only. If regulator support is disabled the API expands to static inline stubs so consumers can still use the API. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* bus: Add imx-weim supportSascha Hauer2013-07-161-0/+1
| | | | | | | | Mostly taken from the kernel with support for other SoCs from Alexander Shiyan. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Cc: Alexander Shiyan <shc_work@mail.ru>
* Add initial pinctrl supportSascha Hauer2013-04-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a massively stripped down pinctrl support. The upper API consists of only of: int pinctrl_select_state(struct device_d *dev, const char *state); This is used to setup the pinmux for a device to a certain state. This function normally does not need to be called manually. The device core will setup the default state before probing a device. The pinctrl core has the job of handling the devicetree. It parses the pinctrl phandles for a device from devicetree, finds the correct pinctrl device and calls its set_state callback with the pinctrl setup device node. The simplicity of this pinctrl framework comes from the fact that we: - Limit usage to devicetree only for now. For non devicetree use the old legacy SoC specific APIs still can be used. - Do not parse the devicetree into internal data structures which are used by the drivers later. This adds the overhead that we may parse the devicetree multiple times for more dynamic setups, but on the other hand we do not need to parse devices from the devicetree we don't use in barebox - Do not detect resource conflicts. Since the framework mainly is a devicetree parser this would be hard to implement. It should be easy for board maintainers to avoid resource conflicts though. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* of: make OFDEVICE a user selectable optionSascha Hauer2013-03-061-1/+1
| | | | | | | | | | OFDEVICE decides whether or not we compile in support for probing devices from the devicetree. Let the user decide this explicitly. This makes the oftree, of_node and of_property commands independent of devicetree device support since being able to manipulate devicetrees has nothing to do with probing devices from the devicetree. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* nor flash: integrate into mtdSascha Hauer2013-02-141-1/+0
| | | | | | | | CFI Flash is currently handled outside the mtd layer which makes it a special case. Integrate it into mtd so that we get rid of this special status. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/bcm2835'Sascha Hauer2012-11-161-0/+1
|\ | | | | | | | | Conflicts: arch/arm/configs/versatilepb_defconfig
| * arm: add generic smp twd timerJean-Christophe PLAGNIOL-VILLARD2012-10-041-0/+1
| | | | | | | | | | | | | | | | | | on Cortex A9 and Cortex A5 we have a generic timer which we can use as clocksource Limit the timer frequency to < 25Mhz Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | add 1-wire supportJean-Christophe PLAGNIOL-VILLARD2012-10-291-0/+1
|/ | | | | | | | | | | | | | | export for each device via param the familly id (fid) the id the full reg_num so for simple 64bit memory rom(ds2401/ds2411/ds1990*) no need driver. Based on linux implementation, cleaned and re-implement the master/slave support to use the device/driver model correctly. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/amba'Sascha Hauer2012-10-031-0/+1
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| * Introduce ARM AMBA busJean-Christophe PLAGNIOL-VILLARD2012-09-111-0/+1
| | | | | | | | | | | | | | | | | | This will allow to detect the amba device and use the right driver for it at runtime. The code is base on linux 3.5. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | of: add devicetree probing supportSascha Hauer2012-09-141-0/+1
|/ | | | | | | This adds code to probe devices from a devicetree. Most helper functions are directly imported from Linux. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/jtag'Sascha Hauer2012-09-051-0/+1
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