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* PCI: imx6: Add code to request/control "pcie_aux" clock for i.MX8MQAndrey Smirnov2019-02-271-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | Port of a Linux commit 29d6b80bc36be62ae38ed8ac3f7a426975fe7dfa The PCIe IP block has an additional clock, "pcie_aux", that needs to be controlled by the driver. Add code to support it. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Leonard Crestez <leonard.crestez@nxp.com> Cc: "A.s. Dong" <aisheng.dong@nxp.com> Cc: Richard Zhu <hongxing.zhu@nxp.com> Cc: linux-imx@nxp.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-pci@vger.kernel.org Cc: Rob Herring <robh@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Add support for i.MX8MQAndrey Smirnov2019-02-111-8/+86
| | | | | | | | | | | | | | | | | | | | Port of a Linux commit 2d8ed461dbc9bc734185db92d2b9d1bb7b586b30 Add code needed to support i.MX8MQ variant. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Leonard Crestez <leonard.crestez@nxp.com> Cc: "A.s. Dong" <aisheng.dong@nxp.com> Cc: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Convert DIRECT_SPEED_CHANGE quirk code to use a flagAndrey Smirnov2019-02-111-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | Port of a Linux commit 4c458bb347ae016e75f6c61dab95ce530f4ff6fc Both i.MX7D and i.MX8MQ have the same behaviour when it comes to clearing DIRECT_SPEED_CHANGE bit when no speed change occurs, so to handle variants correctly add a flag instead of checking the IP block variant. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> [lorenzo.pieralisi@arm.com: updated log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Leonard Crestez <leonard.crestez@nxp.com> Cc: "A.s. Dong" <aisheng.dong@nxp.com> Cc: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Mark PHY functions as i.MX6 specificAndrey Smirnov2019-02-111-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Port of a Linux commit 2f532d07f0cce72f88a4a0532ae11be6a2745697 PCIe PHY IP block on i.MX7D differs from the one used on i.MX6 family, so none of the code in the current implementation of imx6_setup_phy_mpll() or imx6_pcie_reset_phy() is applicable. Introduce IMX6_PCIE_FLAG_IMX6_PHY and check for it in the aforementioned functions to make sure they are only executed on appropriate PCIe IP variants. Tested-by: Trent Piepho <tpiepho@impinj.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> [lorenzo.pieralisi@arm.com: updated log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Leonard Crestez <leonard.crestez@nxp.com> Cc: "A.s. Dong" <aisheng.dong@nxp.com> Cc: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Introduce drvdataAndrey Smirnov2019-02-111-14/+29
| | | | | | | | | | | | | | | | | | | | | | | Port of a Linux commit e8e4d4e95701a10691c53165c55789e5e50ba3f5 Introduce driver data struct. This will simplify handling of device specific differences. Signed-off-by: Stefan Agner <stefan@agner.ch> [andrew.smirnov@gmail.com reformatted drvdata, to simplify future diffs] Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Leonard Crestez <leonard.crestez@nxp.com> Cc: "A.s. Dong" <aisheng.dong@nxp.com> Cc: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Port imx6_pcie_ltssm_enable()Andrey Smirnov2019-01-181-9/+18
| | | | | | | Port imx6_pcie_ltssm_enable() from Linux kernel driver. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Drop unnecessary root_bus_nr settingAndrey Smirnov2019-01-181-1/+0
| | | | | | | | | | | | | | | | | | Port of a Linux commit 39f712e989c5e591c58b65b62981b85027ba3103 Function dw_pcie_host_init() already initializes the root_bus_nr field of 'struct pcie_port', so the -1 assignment prior to calling dw_pcie_host_init() in platform specific driver is not really needed. Drop it. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Cc: Richard Zhu <hongxing.zhu@nxp.com> Cc: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Fix spelling mistake: "contol" -> "control"Andrey Smirnov2019-01-181-2/+2
| | | | | | | | | | | | | Port of a Linux commit 7221547e55b7929e4d46983f6f3ca15f36ee4dac Trivial fix to spelling mistake in dev_err message Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Richard Zhu <hongxing.Zhu@nxp.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Do not switch speed if Gen2 is disabledAndrey Smirnov2019-01-181-27/+28
| | | | | | | | | | | | | | | | | | Port of a Linux commit 93b226f9c65a951a91617f87ba1f05f14e59f26f Save a bit of time and avoid going through link speed change procedure in configuration where link max speed is limited to Gen1 in DT. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Cc: yurovsky@gmail.com Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Dong Aisheng <dongas86@gmail.com> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Do not wait for speed change on i.MX7Andrey Smirnov2019-01-181-4/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Port of a Linux commit e6dcd87fff69a9d454104b65569074855cf95b1e As can be seen from [1]: "...the different behavior between iMX6Q PCIe and iMX7D PCIe maybe caused by the different controller version. Regarding to the DOC description, the DIRECT_SPEED_CHANGE should be cleared after the speed change from GEN1 to GEN2. Unfortunately, when GEN1 device is used, the behavior is not documented. So, IC design guys run the simulation and find out the following behaviors: 1. DIRECT_SPEED_CHANGE will be cleared in 7D after speed change from GEN1 to GEN2. This matches doc’s description 2. set MAX link speed(PCIE_CAP_TARGET_LINK_SPEED=0x01) as GEN1 and re-run the simulation, DIRECT_SPEED_CHANGE will not be cleared; remain as 1, this matches your result, but function test is passed, so this bit should not affect the normal PCIe function." imx6_pcie_wait_for_speed_change() will report false failures for Gen1 -> Gen1 speed transition, so avoid doing that check and just rely on imx6_pcie_wait_for_link() only. [1] https://community.nxp.com/message/867943 Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Cc: yurovsky@gmail.com Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Dong Aisheng <dongas86@gmail.com> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Allow probe deferral by reset GPIOAndrey Smirnov2019-01-181-8/+11
| | | | | | | | | | | | | | | | | | | | | Port of a Linux commit bde4a5a00e761f55be92f62378cf5024ced79ee3 Some designs implement reset GPIO via a GPIO expander connected to a peripheral bus. One such example would be i.MX7 Sabre board where said GPIO is provided by SPI shift register connected to a bitbanged SPI bus. To support such designs, allow reset GPIO request to defer probing of the driver. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Cc: yurovsky@gmail.com Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Dong Aisheng <dongas86@gmail.com> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Add code to support i.MX7DAndrey Smirnov2019-01-181-44/+122
| | | | | | | | | | | | | | | | | | | | | Port of a Linux commit 9b3fe6796d7c0e0c2b87243ce0c7f4744c54efad Add various bits of code needed to support i.MX7D variant of the IP. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Cc: yurovsky@gmail.com Cc: Mark Rutland <mark.rutland@arm.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Dong Aisheng <dongas86@gmail.com> Cc: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: dwc: Constify dw_pcie_host_ops structuresAndrey Smirnov2019-01-081-1/+1
| | | | | | | | | | | | | | | Port of a Linux commit 4ab2e7c0df6b8bbc6c8ea1617b737d33c2510012 The dw_pcie_host_ops structures are never modified. Constify these structures such that these can be write-protected. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Jingoo Han <jingoohan1@gmail.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: dwc: designware: Handle ->host_init() failuresAndrey Smirnov2019-01-081-1/+3
| | | | | | | | | | | | | | | | Port of a Linux commit 4a301766f5263dd94c1b95d1b1bbdf338afb1a37 In several dwc-based drivers, ->host_init() can fail, so make sure to propagate and handle this to avoid continuing operation of a driver or hardware in an invalid state. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Joao Pinto <jpinto@synopsys.com> Acked-by: Jingoo Han <jingoohan1@gmail.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: Add SPDX GPL-2.0 to replace GPL v2 boilerplateAndrey Smirnov2019-01-081-4/+1
| | | | | | | | | | | | | | | | | Port of a Linux commit 8cfab3cf63cfe5a53e2e566b3b86b30c187edf3a Add SPDX GPL-2.0 to all PCI files that specified the GPL version 2 license. Remove the boilerplate GPL version 2 language, relying on the assertion in b24413180f56 ("License cleanup: add SPDX GPL-2.0 license identifier to files with no license") that the SPDX identifier may be used instead of the full boilerplate text. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: dwc: all: Split struct pcie_port into host-only and core structuresAndrey Smirnov2019-01-081-49/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Port of a Linux commit 442ec4c04d1235f8c664a74004dae54a7a574d18 Keep only the host-specific members in struct pcie_port and move the common members (i.e common to both host and endpoint) to struct dw_pcie. This is in preparation for adding endpoint mode support to designware driver. While at that also fix checkpatch warnings. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: Jingoo Han <jingoohan1@gmail.com> CC: Richard Zhu <hongxing.zhu@nxp.com> CC: Lucas Stach <l.stach@pengutronix.de> CC: Murali Karicheri <m-karicheri2@ti.com> CC: Minghuan Lian <minghuan.Lian@freescale.com> CC: Mingkai Hu <mingkai.hu@freescale.com> CC: Roy Zang <tie-fei.zang@freescale.com> CC: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> CC: Niklas Cassel <niklas.cassel@axis.com> CC: Jesper Nilsson <jesper.nilsson@axis.com> CC: Joao Pinto <Joao.Pinto@synopsys.com> CC: Zhou Wang <wangzhou1@hisilicon.com> CC: Gabriele Paoloni <gabriele.paoloni@huawei.com> CC: Stanimir Varbanov <svarbanov@mm-sol.com> CC: Pratyush Anand <pratyush.anand@gmail.com> For convenience sake, commit c0464062bfea9cd2ef6643d93429eafe8f6c2a4a PCI: dwc: Fix crashes seen due to missing assignments Fix the following crash, seen in dwc/pci-imx6. Unable to handle kernel NULL pointer dereference at virtual address 00000070 pgd = c0004000 [00000070] *pgd=00000000 Internal error: Oops: 805 [#1] SMP ARM Modules linked in: CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.10.0-09686-g9e31489 #1 Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree) task: cb850000 task.stack: cb84e000 PC is at imx6_pcie_probe+0x2f4/0x414 ... While at it, fix the same problem in various drivers instead of waiting for individual crash reports. The change in the imx6 driver was tested with qemu. The changes in other drivers are based on code inspection and have been compile tested only. Fixes: 442ec4c04d12 ("PCI: dwc: all: Split struct pcie_port into host-only and core structures") Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> # designware-plat Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> was squashed into this one as well. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Remove LTSSM disable workaroundAndrey Smirnov2019-01-081-29/+28
| | | | | | | | | | | | | | | | | | | | | | Port of a Linux commit a71280722eeba8f1afa51ad6656028dcb96e110b This causes CPU hangs when the system is reset by the watchdog, as the GPRs aren't cleared, but the clocks are back to disabled state. If the bootloader uses PCIe, it must take care to bring it down into a safe state, before passing control to the Linux kernel. This is the only way to get a properly operating system at all times and circumstances. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> LTSSM disable workaround still needs to be performed before passing control to Linux. However, in order to avoid the hang described above, we move it to imx6_pcie_remove() and apply it without relying on values in GPR. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Remove redundant "Link never came up" messageAndrey Smirnov2019-01-081-3/+1
| | | | | | | | | | | | | | | | | | | Port of a Linux commit caf3f562e1161a86bd48a4c4c33af89d3693c658 When a PCI card is not connected, the following messages are seen on mx6: imx6q-pcie 1ffc000.pcie: phy link never came up imx6q-pcie 1ffc000.pcie: Link never came up The first one comes from the pcie-designware.c core file, so remove the redundant one from the imx6 driver. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Add DT property for link gen, default to Gen1Andrey Smirnov2019-01-081-7/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Port of a Linux commit a5fcec480f25eb5444c0b71ecdf9b18b09236b95 Freescale has stated [1] that the LVDS clock source of the IMX6 does not pass the PCI Gen2 clock jitter test, therefore unless an external Gen2 compliant external clock source is present and supplied back to the IMX6 PCIe core via LVDS CLK1/CLK2 you can not claim Gen2 compliance. Add a DT property to specify Gen1 vs Gen2 and check this before allowing a Gen2 link. We default to Gen1 if the property is not present because at this time there are no IMX6 boards in mainline that 'input' a clock on LVDS CLK1/CLK2. In order to be Gen2 compliant on IMX6 you need to: - Have a Gen2 compliant external clock generator and route that clock back to either LVDS CLK1 or LVDS CLK2 as an input (see IMX6SX-SabreSD reference design). - Specify this clock in the PCIe node in the DT (i.e., IMX6QDL_CLK_LVDS1_IN or IMX6QDL_CLK_LVDS2_IN instead of IMX6QDL_CLK_LVDS1_GATE which configures it as a CLK output). [1] https://community.freescale.com/message/453209 Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> CC: Fabio Estevam <fabio.estevam@freescale.com> CC: Zhu Richard <Richard.Zhu@freescale.com> CC: Akshay Bhat <akshay.bhat@timesys.com> CC: Rob Herring <robh+dt@kernel.org> CC: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Factor out ref clock enableAndrey Smirnov2019-01-081-14/+29
| | | | | | | | | | | | | Port of a Linux commit 4d1821e729b5d2060ef8c9825af1dacc2182da38 Factor out ref clock enable to make it cleaner to add imx6sx support. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Tested-by: Christoph Fritz <chf.fritz@googlemail.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Remove unused return valuesAndrey Smirnov2019-01-081-9/+4
| | | | | | | | | | | Port of a Linux commit 9ab021b6cf8b5bfc40ea9333c9b64b554fe01cd4 Remove unused return values. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Port error messages for imx6_pcie_deassert_core_reset()Andrey Smirnov2019-01-081-3/+10
| | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Reorder struct imx6_pcieAndrey Smirnov2019-01-081-1/+1
| | | | | | | | | | | | Port of a Linux commit 916bf1cc6528618197cdaf05ad42a9a82e9dea04 Reorder struct imx6_pcie to put generic fields first. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Use generic DesignWare accessorsAndrey Smirnov2019-01-081-66/+30
| | | | | | | | | | | | | Port of a Linux commit 2a6a85d5368e55e506abd7ca79f08131028bb0bc The dw_pcie_readl_rc() and dw_pcie_writel_rc() interfaces already add in pp->dbi_base, so use those instead of doing it ourselves in the imx6 driver. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Pass device-specific struct to internal functionsAndrey Smirnov2019-01-081-28/+25
| | | | | | | | | | | | | | | Port of a Linux commit e7d7705ace9494949863848ec77536d5a3287b0a Only interfaces used from outside the driver, e.g., those called by the DesignWare core, need to accept pointers to the generic struct pcie_port. Internal interfaces can accept pointers to the device-specific struct, which makes them more straightforward. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Pass struct imx6_pcie to PHY accessorsAndrey Smirnov2019-01-081-18/+23
| | | | | | | | | | | | Port of a Linux commit 8bad7f2fc3006d1752c426343ca77f1fbe61cf00 Pass the struct imx6_pcie pointer, not dbi_base address, to PHY accessors. This enables future simplifications. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Removed unused struct imx6_pcie.mem_baseAndrey Smirnov2019-01-081-1/+0
| | | | | | | | | | | | | | Port of a Linux commit 51c84709b8c4065fe83b84a487fe7822c2271e77 PCI: imx6: Removed unused struct imx6_pcie.mem_base Removed the unused struct imx6_pcie.mem_base member. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Add local struct device pointersAndrey Smirnov2019-01-081-7/+10
| | | | | | | | | | | | Port of a Linux commit 13957652f7242a8cb02ffb8c96f412f62c486ee1 Use a local "struct device *dev" for brevity and consistency with other drivers. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: dwc: designware: Move register defines to designware header fileAndrey Smirnov2019-01-081-1/+0
| | | | | | | | | | | | | | | | | Port of a Linux commmit b90dc392212d1153a12eea15cbc6eae352a3c989 No functional change. Move the register defines and other macros from pcie-designware.c to pcie-designware.h. This is in preparation to split the pcie-designware.c file into designware core file and host-specific file. While at that also fix a checkpatch warning. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-By: Joao Pinto <jpinto@synopsys.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: designware: Add generic dw_pcie_wait_for_link()Andrey Smirnov2019-01-081-29/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Port of Linux commit 886bc5ceb5cc3ad4b219502d72b277e3c3255a32 Several DesignWare-based drivers (dra7xx, exynos, imx6, keystone, qcom, and spear13xx) had similar loops waiting for the link to come up. Add a generic dw_pcie_wait_for_link() for use by all these drivers so the waiting is done consistently, e.g., always using usleep_range() rather than mdelay() and using similar timeouts and retry counts. Note that this changes the Keystone link training/wait for link strategy, so we initiate link training, then wait longer for the link to come up before re-initiating link training. [bhelgaas: changelog, split into its own patch, update pci-keystone.c, pcie-qcom.c] Signed-off-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Pratyush Anand <pratyush.anand@gmail.com> NOTE: For some reason, all of the changes to imx6_pcie_wait_for_link() made in 4d107d3b5a686b5834e533a00b73bf7b1cf59df7 are actually not present 886bc5ceb5cc3ad4b219502d72b277e3c3255a32. So there isn't really a kernel commit corresponding to removal of the large comment block or check for !(reg & PCIE_PHY_DEBUG_R1_XMLH_LINK_IN_TRAINING) Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Move link up check into imx6_pcie_wait_for_link()Andrey Smirnov2019-01-081-1/+19
| | | | | | | | | | | | | | | | | | | | | Port of a Linux commit 4d107d3b5a686b5834e533a00b73bf7b1cf59df7 imx6_pcie_link_up() previously used usleep_range() to wait for the link to come up. Since it may be called while holding the config spinlock, the sleep causes a "BUG: scheduling while atomic" error. Instead of waiting for the link to come up in imx6_pcie_link_up(), do the waiting in imx6_pcie_wait_for_link(), where we're not holding a lock and sleeping is allowed. [bhelgaas: changelog, references to bugzilla and f95d3ae77191] Link: https://bugzilla.kernel.org/show_bug.cgi?id=100031 Fixes: f95d3ae77191 ("PCI: imx6: Wait for retraining") Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* remove checks for xzalloc() returning NULLUwe Kleine-König2017-09-261-2/+0
| | | | | | | xzalloc() either returns memory or panics, so checking for NULL is useless. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Add DT bindings to configure PHY Tx driver settingsAndrey Smirnov2016-05-031-3/+31
| | | | | | | | | | | | | | | | | The settings in GPR8 are dependent upon the particular layout of the hardware platform. As such, they should be configurable via the device tree. Look up PHY Tx driver settings from the device tree. Fall back to the original hard-coded values if they are not specified in the device tree. [Andrey Smirnov: port to Barebox codebase] Signed-off-by: Justin Waters <justin.waters@timesys.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Remove broken Gen2 workaroundAndrey Smirnov2016-05-031-16/+1
| | | | | | | | | | | | | | | | Remove the remnants of the workaround for erratum ERR005184 which was never completely implemented. The checks alone don't carry any value as we don't act properly on the result. A workaround should be added to the lane speed change in establish_link later. [Andrey Smirnov: port to Barebox codebase] Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Move PHY reset into imx6_pcie_establish_link()Andrey Smirnov2016-05-031-13/+15
| | | | | | | | | | | | | | This adds the PHY reset into a common error path of imx6_pcie_establish_link(), deduplicating some of the debug prints. Also reduce the severity of the "no-link" message in the one place where it is expected to be hit when no peripheral is attached. [Andrey Smirnov: port to Barebox codebase] Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Move imx6_pcie_reset_phy() near other PHY handling functionsAndrey Smirnov2016-04-281-17/+17
| | | | | | | | | | | | | Move imx6_pcie_reset_phy() near the other PHY related functions in the file. This is a cosmetic change, but also allows to do the following changes without introducing needless forward declarations. [Andrey Smirnov: port to Barebox codebase] Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Simplify a trivial if-return sequenceFabio Estevam2016-04-281-10/+2
| | | | | | | | | | | | | Simplify a trivial if-return sequence by combining it with a preceding function call. The semantic patch that makes this change is available in scripts/coccinelle/misc/simple_return.cocci. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Rename imx6_pcie_start_link() to imx6_pcie_establish_link()Andrey Smirnov2016-04-281-2/+2
| | | | | | | | | | | | Rename imx6_pcie_start_link() to imx6_pcie_establish_link() to follow the convention of other DesignWare-based host drivers. No functional change. [Andrey Smirnov: port to BB codebase] Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Pratyush Anand <pratyush.anand@gmail.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Add proper i.MX6+ reset sequenceAndrey Smirnov2016-04-281-29/+65
| | | | | | | | | | | | | | | | | I.MX6+ version of the silicon exposed PCIe core's reset signal as a bit in one of the control registers. As a result using old, pre-i.MX6+, reset sequence on i.MX6+ leads to Barebox hanging during startup. Using exposed reset bit instead solves the problem. This commit is based on portions of commit c34068d48273e24d392d9a49a38be807954420ed in http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: Simplify imx6_pcie_remove()Andrey Smirnov2016-04-281-18/+1
| | | | | | | | | | Instead of manualy flipping the bits call imx6_pcie_assert_core_reset() to give the code, executing after BB, a clean slate. This also makes the function match similar code in Linux kernel driver. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* driver: replace dev_request_mem_region with dev_request_mem_resourceSascha Hauer2016-03-071-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dev_request_mem_region doesn't work properly one some SoCs on which PTR_ERR() values clash with valid return values from dev_request_mem_region. Replace them with dev_request_mem_resource where possible. This patch has been generated with the following semantic patch: // <smpl> @@ expression d; expression n; expression io; identifier func; @@ func(...) { +struct resource *iores; <+... -io = dev_request_mem_region(d, n); -if (IS_ERR(io)) { +iores = dev_request_mem_resource(d, n); +if (IS_ERR(iores)) { ... - return PTR_ERR(io); -} + return PTR_ERR(iores); +} +io = IOMEM(iores->start); ...+> } @@ expression d; expression n; expression io; identifier func; @@ func(...) { +struct resource *iores; <+... -io = dev_request_mem_region(d, n); -if (IS_ERR(io)) { +iores = dev_request_mem_resource(d, n); +if (IS_ERR(iores)) - return PTR_ERR(io); -} + return PTR_ERR(iores); +io = IOMEM(iores->start); ...+> } @@ expression d; expression n; expression io; identifier func; @@ func(...) { +struct resource *iores; <+... -io = dev_request_mem_region(d, n); -if (IS_ERR(io)) { - ret = PTR_ERR(io); +iores = dev_request_mem_resource(d, n); +if (IS_ERR(iores)) { + ret = PTR_ERR(iores); ... } +io = IOMEM(iores->start); ...+> } @@ expression d; expression n; expression io; identifier func; @@ func(...) { +struct resource *iores; <+... -io = dev_request_mem_region(d, n); +iores = dev_request_mem_resource(d, n); +if (IS_ERR(iores)) + return PTR_ERR(iores); +io = IOMEM(iores->start); ...+> } @@ identifier func; @@ func(...) { <+... struct resource *iores; -struct resource *iores; ...+> } // </smpl> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: imx6: properly shut down core when leaving bareboxLucas Stach2016-01-081-0/+27
| | | | | | | | | | | | As the i.MX6 PCIe core doesn't have a software reachable reset wired up, it's hard for any driver to get the core into a known good state. To make it easier for whatever software follows barebox, bring back the core into a safe state before leaving barebox. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* i.MX6: pci: Avoid aborts when asserting PCIe resetAndrey Smirnov2016-01-081-0/+4
| | | | | | | | | | | | | | | | | | | | When booting Barebox in the HW environment where PCIe core has been used but not properly shut down, writing to PCIE_PL_PFLR in imx6_pcie_assert_core_reset would cause data abort exception. The problem can be easily reproduced on a i.MX6 based board with PCIe slot populated with some device by doing: > bootm -f -e 0x1050 <your board's>.img Ignoring this exception seem to allow PCIe core to successfully initialize and enumerate devices properly. This is also how Linux Kernel version of the driver handles this situation -- it installs dummy no-op abort handler at the beginning of device's probing. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* i.MX6: pci: Reconcile imx6_pcie_start_link with the kernel codeAndrey Smirnov2016-01-081-16/+26
| | | | | | | | | | | Reconcile imx6_pcie_start_link with almost identical imx6_pcie_establish_link from analogous Linux kernel driver. This change is purely cosmetical, but refactoring the code this way simplifies implementation comparison. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* i.MX6: pci: Replace magic number with a named constantAndrey Smirnov2016-01-081-1/+3
| | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: Add i.MX6 pcie supportSascha Hauer2015-03-171-0/+612
Based on the corresponding kernel driver with changes to make it work on barebox. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
generated by cgit v1.2.3 (git 2.39.1) at 2024-05-01 10:24:18 +0000