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* efi: payload: rename CONFIG_EFI_BOOTUP to CONFIG_EFI_PAYLOADAhmad Fatoum2024-03-051-1/+1
| | | | | | | | | | The symbol is internal, so we don't break anything by renaming it. CONFIG_EFI_PAYLOAD is clearer in intent, as BOOTUP doesn't clearly indificate whether barebox would act as EFI payload or as EFI loader. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240304190038.3486881-9-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: implement function level resetSascha Hauer2024-01-021-0/+32
| | | | | | | | | This will be needed for upcoming LS1028a support. The code is taken from U-Boot which suffices for our usecase. The kernel code is much more elaborated here. Link: https://lore.barebox.org/20231219125630.3684-7-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: implement Enhanced Allocation supportSascha Hauer2024-01-021-0/+186
| | | | | | | | | | | | | | | Some PCI devices have their base addresses not defined in the BARs, but instead have them defined in Enhanced Allocation structures. Add support for these Enhanced Allocation structures, taken directly from the Linux Kernel. Motivation for adding this is the LS1028a SoC which uses Enhanced Allocation for the Ethernet Subsystem which comes as an integrated Endpoint Root Complex. Link: https://lore.barebox.org/20231219125630.3684-6-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: fix __pci_bus_find_cap_startSascha Hauer2024-01-021-2/+2
| | | | | | | | BIT(7) of dev->hdr_type has unrelated information. Mask out the upper bit so that the capabilities can properly be found. Link: https://lore.barebox.org/20231219125630.3684-5-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: layerscape: limit fixup to layerscape controllersSascha Hauer2024-01-021-0/+3
| | | | | | | | | | ls_pcie_fixup() assumes the fixed up device is attached to the layerscape PCI controller. This may not be true when there's another controller active in the system, so limit the execution of the fixup to the right controller only. Link: https://lore.barebox.org/20231219125630.3684-4-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: Do not register device tree disabled devicesSascha Hauer2024-01-021-0/+3
| | | | | | | | Some PCI devices have device nodes associated with them. Do not register these devices when they are disabled in the device tree. Link: https://lore.barebox.org/20231219125630.3684-3-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* treewide: switch regmap.h include to linux/regmap.hAhmad Fatoum2023-10-261-1/+1
| | | | | | | | | | | | | | | Now that there are no longer any users of regmap.h in headers, let's switch all users in the source files to linux/regmap.h. That way, the only users of regmap.h whether directly or indirectly will be out-of-tree code, which will fail with an error if they are dependent on the old semantics of regmap_bulk_read and regmap_bulk_write. After a transitory period, we can then drop regmap.h. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20231020071853.2826528-12-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: populate struct pci_device subsystem_device, subsystem_vendorAhmad Fatoum2023-08-231-0/+3
| | | | | | | | | | | | | | | | pci_device::subsystem_device and pci_device::subsystem_vendor have been there since the beginning, but they were never populated. This went unnoticed so far, because they are compared against PCI_ANY_ID everywhere, except for some NS16550-over-PCI quirks. We should either drop the members or populate them unconditionally. Let's do as Linux does and populate them for devices[1]. [1]: https://elixir.bootlin.com/linux/v6.5-rc7/source/drivers/pci/probe.c#L1915 Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230822074832.3905525-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* treewide: Print device nodes with %pOFSascha Hauer2023-07-031-2/+2
| | | | | | | We have the %pOF format specifier for printing device nodes. Use it where appropriate. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* gpio: have gpiod_ functions return and accept pointersAhmad Fatoum2023-06-231-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | The gpiod_ (GPIO descriptor) API used with Linux differs from barebox' normal GPIO API: - gpiod handles are opaque pointers and not an integer, which users have an expectation of stability for - gpiod API uses logic levels by default with separate raw API for physical level instead of physical level by default and separate API taking active level into account. The barebox gpiod_ API mimics the latter point, but still uses integers requiring ugly and arguably error prone conversions when porting kernel code. Let's improve upon that by just encoding the integer into a pointer variable for API compatibility. Later commits will switch barebox GPIO support to use actual GPIO descriptors without consulting the numeric indices, but we do this temporary switch here, so we can split up provider and consumer changes. Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230622072329.1339317-4-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: disable building CONFIG_PCI when CONFIG_COMPILE_TESTAhmad Fatoum2023-06-131-1/+1
| | | | | | | | | | Architectures enabling HW_HAS_PCI are expected to also define <asm/pci.h>. Giving HW_HAS_PCI a prompt can thus lead to build errors on architectures that don't really support PCI. Remove the prompt again. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230612130239.1087599-4-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* treewide: add MODULE_DEVICE_TABLE markersAhmad Fatoum2023-06-136-0/+6
| | | | | | | | | | | | | | | | Syncing device trees with Linux upstream can lead to breakage, when the device trees are switched to newer bindings, which are not yet supported in barebox. To make it easier to spot such issues, we want to start applying some heuristics to flag possibly problematic DT changes. One step towards being able to do that is to know what nodes barebox actually consumes. Most of the nodes have a compatible entry, which is matched by an array of of_device_id, so let's have MODULE_DEVICE_TABLE point at it for future extraction. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230612125908.1087340-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: designware: add rockchip supportSascha Hauer2023-05-233-0/+307
| | | | | | | Add support for the PCIe controller found on Rockchip RK3568 and RK3588 SoCs. Based on Linux-6.3-rc7. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: set upper word for 64bit base addressesSascha Hauer2023-05-231-2/+4
| | | | | | | Set the upper word correctly when the PCI address space is outside the 32bit range. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: add pci_select_bars() helperSascha Hauer2023-05-031-0/+16
| | | | | | pci_select_bars() will be needed later in the updated RTL8169 driver. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pcie-designware: Fix dev_get_resource_by_name error checkSascha Hauer2023-05-031-1/+1
| | | | | | | dev_get_resource_by_name() returns an error pointer, fix the check accordingly. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* treewide: fix includes missed by multiarch supportAhmad Fatoum2023-04-111-3/+3
| | | | | | | | | | | Found by manual inspection of the results of: rg '#include\s*<mach/[^/]+>' | rg -v 'arch/(powerpc|sandbox|mips|x86|kvx)' Fixes: 68b778c24314 ("ARM: Drop mach dir include path") Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230411071436.1630752-13-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: tegra: Move mach header files to include/mach/tegraSascha Hauer2023-03-061-1/+1
| | | | | | | | | | Currently arch specific headers can be included with longer possible as there won't be a single mach anymore. Move all tegra specific header files to include/mach/tegra/ to prepare for multi-arch support. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Rename struct driver_d to driverSascha Hauer2023-01-106-7/+7
| | | | | | | | | | | The '_d' suffix was originally meant to distinguish barebox struct names from Linux struct names. struct driver doesn't exist in Linux, so we can rename it and remove the meaningless suffix. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20221214123512.189688-4-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Rename struct device_d to deviceSascha Hauer2023-01-1011-31/+31
| | | | | | | | | | | | | The '_d' suffix was originally introduced in case we want to import Linux struct device as a separate struct into barebox. Over time it became clear that this won't happen, instead barebox struct device_d is basically the same as Linux struct device. Rename the struct name accordingly to make porting Linux code easier. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20221214123512.189688-3-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Rename device_d::device_node to device_d::of_nodeSascha Hauer2023-01-108-17/+17
| | | | | | | | | | | | | | | | | | | | Linux struct device has the member of_node for the device_node pointer. Rename this in barebox accordingly to minimize the necessary changes when porting Linux code. This was done with the semantic patch: @@ struct device_d E; @@ - E.device_node + E.of_node @@ struct device_d *E; @@ - E->device_node + E->of_node Plus some manual adjustments. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20221214123512.189688-2-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/misc'Sascha Hauer2021-12-1517-16/+232
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| * drivers: migrate "GPL-2.0" license identifiers to SPDX 2.0Roland Hieber2021-11-2217-17/+17
| | | | | | | | | | | | | | | | | | | | "GPL-2.0-only" was introduced in SPDX 2.0, and the old identifier "GPL-2.0" is now considered deprecated; see <https://spdx.org/licenses>. Fixes: 28f4a6a4df76f0f1581d (2021-10-30, "drivers: add missing SPDX-License-Identifier") Signed-off-by: Roland Hieber <rhi@pengutronix.de> Link: https://lore.barebox.org/20211117113851.2022669-2-rhi@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * pci: add ECAM generic controller supportAhmad Fatoum2021-11-173-0/+216
| | | | | | | | | | | | | | | | | | | | | | | | | | This has been tested with QEMU AArch64 Virt. The default (-M virt,highmem=on) will have two ranges specified in the device trees for memory bars. One 32-bit and the other 64-bit. As barebox can't yet handle 64-bit BARs, the driver will prefer the 32-bit memory region if available. If none is available, consider using -M virt,highmem=off or fixing 64-bit support. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Link: https://lore.barebox.org/20211115090432.147448-1-ahmad@a3f.at Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | efi: rename <efi/efi.h> to <efi/efi-payload.h>Ahmad Fatoum2021-11-251-1/+1
|/ | | | | | | | | | | The split between <efi.h> and <efi/efi.h> is confusing: The former contains universal definitions, while the latter contains barebox utilities on top. To make the distinction clear, rename <efi/efi.h> to <efi/efi-payload.h> as it's used for EFI payloads. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20211122084732.2597109-14-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/spdx'Sascha Hauer2021-11-155-0/+5
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| * drivers: add missing SPDX-License-IdentifierAhmad Fatoum2021-11-015-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the suitable SPDX-License-Identifier to all files in drivers/ that previously lacked one. To aid manual inspection, following heuristics can be used: * No changes outside of comments/whitespace: git show -U0 HEAD | rg -v '^(@@|diff|index)|[-+]([-+]|//|#|[\s/]\*)' * -or-later come in pairs: git show --inter-hunk-context=19 HEAD | \ perl -0777 -F'/^@/gm' -ne 'for (@F) { @m = /later/g; print if @m & 1 }' Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20211030175632.2276077-4-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | pci: efi: skip driver model fixup for non-EFI PCI bussesAhmad Fatoum2021-11-151-1/+8
|/ | | | | | | | | | The EFI driver registers a PCI fixup to associate PCI devices probed via EFI with their parent. Restrict the fixup to EFI PCI busses only, so other PCI drivers can be used in the same build. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20211115090023.4192546-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: mvebu: Fix wrong error checkSascha Hauer2021-05-181-2/+2
| | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210517185424.32145-8-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: add EFI PCI root bridge IO protocol driverAhmad Fatoum2021-05-034-0/+691
| | | | | | | | | | | | | | | | | | | | | | | | | | | | UEFI specifies two protocols for abstracting both the PCI host bus controller and for PCI devices. The protocol for PCI devices provides function pointers for accessing IO Port, Memory and PCI configuration space, among others. The protocol for bus controllers provides the ability to read the root bridge's PCI configuration space and to query resources. In barebox, we would want to reuse existing PCI drivers unmodified, so we utilize the root bridge protocol, unlike most other EFI payloads. We still utilize the PCI (device) IO protocol, but not for core functionality: EFI has already enumerated the bus for us and allocated the EFI handles. It thus makes sense to have the new pci device have the EFI handle as parent and the controller as grand parent instead of being sibling with the EFI handles. This is done with an early PCI fixup that patches the device's parent pointer after consulting the PCI IO GetLocation. Driver is written from scratch and hasn't seen heavy usage yet, so it should be used with care. It was written while consulting the UEFI 2.1D specification. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Link: https://lore.barebox.org/20210416062436.332665-4-ahmad@a3f.at Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: support PCI BIOS preassigned busesAhmad Fatoum2021-05-031-37/+69
| | | | | | | | | | | | | | | | | | | | | When running under UEFI, barebox should no redo PCI enumeration, because the UEFI implementation will likely already have drivers that won't cope with e.g. BAR addresses changing. The user-visible effect of this is that likely the framebuffer will stop working because the UEFI driver won't be able to access it any longer. Support this configuration by changing the PCI code to consult the new pcibios_assign_all_busses(). When it's true, there is no change to previous behavior. When it's false, reconfiguration is omitted and instead current configuration is read back from the bus. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Link: https://lore.barebox.org/20210416062436.332665-3-ahmad@a3f.at Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: port Linux pci_find_capabilityAhmad Fatoum2021-03-041-0/+90
| | | | | | | Incomding Linux virtio_pci code uses these functions, so port them over. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* magicvar: Replace BAREBOX_MAGICVAR_NAMED with BAREBOX_MAGICVARSascha Hauer2020-10-021-3/+2
| | | | | | | | BAREBOX_MAGICVAR now generates a unique identifier automatically, so we can convert users of BAREBOX_MAGICVAR_NAMED to the simpler BAREBOX_MAGICVAR macro. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* treewide: make use of PTR_ERR_OR_ZEROUwe Kleine-König2020-06-261-4/+1
| | | | | | | | | | | PTR_ERR_OR_ZERO is designed to replace boiler plate like: if (IS_ERR(x)) return PTR_ERR(x); return 0; Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/kbuild'Sascha Hauer2020-05-141-2/+0
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| * kbuild: support ccflags-y, asflags-y, cppflags-y, and ldflags-yMasahiro Yamada2020-04-271-2/+0
| | | | | | | | | | | | | | | | | | | | Some Makefiles use ccflags-y, but it is not actually supported. Support ccflags-y, asflags-y, cppflags-y, and ldflags-y like Linux. Remove the workaround in drivers/pci/Makefile. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | drivers: add COMPILE_TEST prompts for some off-by-default optionsAhmad Fatoum2020-05-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | Some Kconfig options we have are promptless and off-by-default and instead can only be enabled by being selected from platform options. For some of those that aren't compile testable, add a new COMPILE_TEST-only prompt. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | drivers: mark first batch of compilable drivers for COMPILE_TESTAhmad Fatoum2020-05-081-1/+1
|/ | | | | | | | | All of these drivers have a runtime dependency on SoC peripherals, but can nevertheless be compile-tested. Add COMPILE_TEST as an alternate dependency. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: layerscape: be less noisy when no iommu node is foundSascha Hauer2020-03-241-2/+2
| | | | | | | The upstream device tree files do not have the iommu nodes and properties, so do not complain too loudly when they are not found. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: layerscape: Allow to share stream_ids per host controllerSascha Hauer2020-01-201-41/+89
| | | | | | | | | | | | | | | | | | Normally every device gets its own stream_id. The stream_ids are communicated to the kernel in the device tree and are also configured in the controllers LUT table. This only works when all PCI devices are known in the bootloader which may not always be the case. For example, when a PCI device is a FPGA and its firmware is only loaded under Linux, then the device is not known to barebox and thus not assigned a stream_id. With global.layerscape_pcie.share_stream_ids set to true all devices on a host controller get the same stream_id assigned. This setup is completely device agnostic and thus also works when not all devices are known to barebox. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: layerscape: Fixup iommu-map propertiesSascha Hauer2020-01-141-1/+38
| | | | | | The iommu-map properties are needed for proper PCI support under Linux. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: layerscape: rename variableSascha Hauer2020-01-141-8/+8
| | | | | | | Rename 'arr' to 'msi_map' which is a better name when we add another array in the next patch. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: copy over some Linux PCI helpersAhmad Fatoum2019-12-091-0/+26
| | | | | | | | Linux PCI drivers, like the incoming 8250_pci, make use of these helpers. Port them over from Linux v5.4. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: Add layerscape PCIe driverSascha Hauer2019-11-273-0/+492
| | | | | | | | This adds support for the designware based PCIe controller found on Layerscape SoCs. The driver is based on Linux-5.4. The device tree fixups have been taken from U-Boot 2019.10. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: dwc: Return directly when num-lanes is not foundSascha Hauer2019-11-271-2/+4
| | | | | | | | | | | | | | | | | Port of Linux commit 66de33f09fd97201847de7e1e2ec8a117242e1d6 The num-lanes is optional since it is not needed on some platforms that bring up the link in firmware. The link programming is based on the num-lanes properties (which is optional); if it is not present code must return instead of fiddling with the lanes value to print an error message. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: dwc: Sync register definitions with Linux-5.4Sascha Hauer2019-11-271-34/+51
| | | | | | | Update the dwc register definitions with Linux-5.4 to make further syncinf with the Linux driver easier. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: dwc: rename readl/writel_dbi ops to read/write_dbiSascha Hauer2019-11-272-12/+12
| | | | | | | | struct dw_pcie_ops read/writel_dbi functions can read values of any size, so with readl/writel they are misnamed. Rename them to read/write which also matches the kernel driver. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: dwc: Cleanup DBI,ATU read and write APIsSascha Hauer2019-11-272-17/+43
| | | | | | | | | | | | | | | | | | | | Port of Linux commit 7bc082d7e97009f252bd432de5d476b0bcf3b266 Cleanup DBI read and write APIs by removing leading "__" (underscore) from their names as there is no reason to have leading underscores in the first place in the function definition. Remove dbi/dbi2 base address parameters as the same behaviour can be obtained through read and write APIs. Since dw_pcie_{readl/writel}_dbi() APIs can't be used for ATU read/write as ATU base address could be different from DBI base address, implement ATU read/write APIs using ATU base address without using dw_pcie_{readl/writel}_dbi() APIs. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Jingoo Han <jingoohan1@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: dwc: imx6: Share PHY debug register definitionsSascha Hauer2019-11-273-9/+14
| | | | | | | | | | | | | | | | | | | | | Port of Linux commit 60ef4b072ba089440531287f72740d94ed1e8dd1 Both pcie-designware.c and pci-imx6.c contain custom definitions for PHY debug registers R0/R1 and on top of that there's already a definition for R0 in pcie-designware.h. Move all of the definitions to pcie-designware.h. No functional change intended. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: linux-kernel@vger.kernel.org Cc: linux-pci@vger.kernel.org Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: dwc: Fix ATU identification for designware version >= 4.80Sascha Hauer2019-11-272-6/+9
| | | | | | | | | | | | | | | | | | | | | Port of Linux commit 2aadcb0cd39198833fabe1c45084f78686e71a6c Synopsys designware version >= 4.80 uses a separate register space for programming ATU. The current code identifies if there exists a separate register space by accessing the register address of ATUs in designware version < 4.80. Accessing this address results in abort in the case of K2G. Fix it here by adding "version" member to struct dw_pcie. This should be set by platform specific drivers and designware core will use it to identify if the platform has a separate ATU space. For platforms which have not populated the version member, the old method of identification will still be used. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-27 20:52:03 +0000