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* clk: zynqmp: do not enable already enabled clocksMichael Tretter2021-06-251-0/+3
| | | | | | | | | | | | | | | | The pmu fw manages the permissions who can enable/disable the clocks. There are a few clocks (TOPSW_LSBUS and LSBUS) which are exposed to Barebox and Barebox assumes that is has to enable the clocks. However, the pmu fw considers the clocks under its control and returns a permission denied for the clock enable request. Assume that clocks that are already enabled don't need to be enable by Barebox to avoid the permission denied errors. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Link: https://lore.barebox.org/20210624150054.1205422-3-m.tretter@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* watchdog: dw_wdt: fix resource reservation error checkAhmad Fatoum2021-06-211-2/+3
| | | | | | | | | dev_request_mem_resource returns a possible error pointer. If it succeeds mem->start will always be valid. Rectify the confusion. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20210621064719.19246-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* nvmem: regmap: fix use of uninitialized space with nvmem_regmap_registerAhmad Fatoum2021-06-211-1/+1
| | | | | | | | | | Looking through all instances of struct nvmem_config in the tree shows that only the new nvmem_regmap_register failed to initialize all members, e.g. config::read_only was uninitialized. Fix this up. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20210619033212.3391-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/wdt'Sascha Hauer2021-06-161-4/+11
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| * watchdog: dw_wdt: denote message to debug levelSascha Hauer2021-06-111-1/+1
| | | | | | | | | | | | | | | | | | | | dw_wdt may be unstoppable once started when no reset line is available. This behaviour is quite common for different watchdogs, it is not worth issuing a warning. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210610130613.27983-4-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * watchdog: dw_wdt: set maximum timeoutSascha Hauer2021-06-111-4/+5
| | | | | | | | | | | | | | | | Communicate the maximum possible timeout to the watchdog core. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210610130613.27983-3-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * watchdog: dw_wdt: Detect if running initiallySascha Hauer2021-06-111-0/+3
| | | | | | | | | | | | | | | | Let the watchdog core know if the watchdog is currently running or not. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210610130613.27983-2-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * watchdog: dw_wdt: Write counter restart registerSascha Hauer2021-06-111-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | At least some variants of the dwc watchdog controllers need the value 0x76 written to the counter restart register to actually take the value written to the Timeout range register. Happened on Rockchip RK3568, without this the watchdog immediately resets the system. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210610130613.27983-1-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/pinctrl'Sascha Hauer2021-06-161-24/+766
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| * | pinctrl: Rockchip: Move to core_initcall levelSascha Hauer2021-06-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Unlike Linux, barebox doesn't propagate pinctrl probe deferrment from the probe of other drivers. This driver here is registered at console_initcall level, which may be too late to apply pin config for console drivers. Move the driver to core_initcall level. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | pinctrl: Rockchip: Add RK3568 supportSascha Hauer2021-06-111-7/+358
| | | | | | | | | | | | | | | | | | | | | | | | This adds support for the RK3568 SoC to the Rockchip pinctrl driver. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210608140545.30696-6-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | pinctrl: Rockchip: implement drive strength settingSascha Hauer2021-06-111-1/+125
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Newer SoCs support a drive strength setting per pin. This patch adds support for it. Currently a no-op as no currently supported SoC in the driver has support for this. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210608140545.30696-5-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | pinctrl: Rockchip: Update from LinuxSascha Hauer2021-06-111-8/+275
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Linux Rockchip pinctrl driver is more flexible when it comes to register offsets which are different between SoCs. This patch updates different pieces of the driver to prepare merging support for newer SoCs. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210608140545.30696-4-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | pinctrl: Rockchip: print resource_size_t with %paSascha Hauer2021-06-091-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | resource_size_t is correctly printed with %pa. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210608140545.30696-3-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | pinctrl: Rockchip: rename mux_offset to grf_mux_offsetSascha Hauer2021-06-091-6/+6
| |/ | | | | | | | | | | | | | | Rename variable to match with Linux Kernel. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210608140545.30696-2-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/overlapping-memory-banks'Sascha Hauer2021-06-162-15/+30
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| * | of: warn about of_add_memory_bank errorsAhmad Fatoum2021-06-022-8/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that errors from of_probe are propagated to the respective initcalls registering the device tree, propagate of_add_memory_bank errors as well. This ensures that clashes of device-tree added regions with previous ones don't go unnoticed. This can e.g. be the case if a device tree happens to have both /memory@X { }; and /memory { }; nodes. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20210531071239.30653-5-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | of: propagate errors inside barebox_register_{of, fdt} into initcallsAhmad Fatoum2021-06-021-7/+9
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | Errors during device tree registration, while uncommon, are really annoying, because the system may limp along and it's not clear where the misbehavior originates from. Failing the initcall of the device tree would improve user experience in that error case. There is intentionally no early exit on error cases to give barebox a chance to probe the serial driver to actually report errors when DEBUG_LL is disabled. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20210531071239.30653-4-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/net'Sascha Hauer2021-06-166-9/+381
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| * | net: eqos: Rockchip supportSascha Hauer2021-06-093-0/+324
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A variant of the designware eqos core is used on Rockchip SoCs. Add support for it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210608093635.5749-5-s.hauer@pengutronix.de Link: https://lore.barebox.org/20210609085512.3865-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | net: designware: eqos: set mdio bus device nodeSascha Hauer2021-06-091-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the device node of the ethernet device has a mdio subnode then attach it to the registered mdio bus. This allows the mdio driver to handle the reset-gpios propertie in the phy nodes. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210608093635.5749-4-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | net: designware: eqos: reset phySascha Hauer2021-06-092-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The designware eqos DT binding has support for specifying reset GPIOs. Add support for them. This binding is deprecated for new boards, but there are still some upstream dts files using it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210608093635.5749-3-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | gpio: allow -gpio suffix for gpio property namesSascha Hauer2021-06-091-9/+21
| |/ | | | | | | | | | | | | | | | | GPIO properties in the device tree can have a -gpios suffix or a -gpio suffix. The latter was not handled, this patch changes that. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210608093635.5749-2-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/mmc'Sascha Hauer2021-06-1615-440/+1097
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| * | mci: arasan: wait for XFER_COMPLETE for busy responseMichael Tretter2021-06-161-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I observed errors on the ZynqMP during reading the EXT_CSD registers using CMD8. The Zynq UltraScale+ Device TRM UG1085 (v2.2) p. 777 states that the driver shall wait 2 ms after sending CMD6 for setting a EXT_CSD register. The JEDEC Standard No. 84-A43 p. 35 does not specify the delay but states that CMD6 expects an R1b response and that the host has to wait until the busy signal is de-asserted. This is signaled via the SDHCI_INT_XFER_COMPLETE interrupt. Wait for the XFER_COMPLETE interrupt after sending a command that expects an R1b response. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Link: https://lore.barebox.org/20210616073957.1872965-5-m.tretter@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | mci: arasan: remove duplicate stop clockMichael Tretter2021-06-161-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | The clock is already stopped in sdhci_set_clock(). Stopping the clock in the arasan driver is not necessary. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Link: https://lore.barebox.org/20210616073957.1872965-4-m.tretter@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | mci: arasan: fix most checkpatch warningsMichael Tretter2021-06-161-19/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | checkpatch reports many warnings for the arasan driver. Fix most of the warnings. I didn't fix the long lines in the wait_on_timeout() calls, because trying to fix them actually makes things worse by introducing either unreadable code or multiple additional helper functions, which I don't consider worth it. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Link: https://lore.barebox.org/20210616073957.1872965-3-m.tretter@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | mci: mci-core: respect disable-wp propertyMichael Tretter2021-06-161-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Systems without write-protect pin should ignore the write protect logic and assume that an SD card is always read-write. This is expressed by the disable-wp dt property. Respect the disable-wp property and don't call the write protection check in these cases. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Link: https://lore.barebox.org/20210616073957.1872965-2-m.tretter@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | mci: dw_mmc: set dma mask to work correctly on 64bit platformsSascha Hauer2021-06-111-22/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The variant we support currently can only do 32bit DMA. Adjust dma mask accordingly. Also use dma_map_single() rather than dma_sync_single() to actually get errors when the mapping fails. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210610131032.6645-1-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | mci: imx-esdhc: Use common DMA helpersSascha Hauer2021-06-111-64/+24
| | | | | | | | | | | | | | | | | | | | | | | | Convert the driver to use the new common SDHCI DMA helpers. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210610144720.25620-4-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | mci: Add support for Rockchip variant of the dwcmshcSascha Hauer2021-06-113-0/+385
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for a Rockchip derivation of the DWCMSHC controller which itself is a SDHCI controller found on some Rockchip SoCs like the RK3568. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210607104411.23071-13-s.hauer@pengutronix.de Link: https://lore.barebox.org/20210610144720.25620-3-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | mci: sdhci: Add DMA transfer helpersSascha Hauer2021-06-116-6/+130
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SDHCI helpers only use PIO mode so far. This patch implements SDMA mode helpers. The helpers with _pio suffix explicitly do PIO while the DMA helpers have a _dma suffix and first try to do DMA, but fall back to PIO when DMA is not possible. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210610144720.25620-2-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | mci: sdhci: Get rid of many register opsSascha Hauer2021-06-118-167/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most SDHCI drivers use standard readl/writel to access registers. Implement these in the common register accessor functions so that drivers only to overwrite them when they want to do something different. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210607104411.23071-12-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | mci: sdhci: arasan: Use sdhci_set_clock()Sascha Hauer2021-06-101-38/+2
| | | | | | | | | | | | | | | | | | | | | | | | We now have a function to calculate the clock divider. Use it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210607104411.23071-11-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | mci: sdhci: arasan: Use sdhci_set_bus_width()Sascha Hauer2021-06-101-11/+3
| | | | | | | | | | | | | | | | | | | | | | | | Use common code rather than duplicating it in the driver. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210607104411.23071-9-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | mci: sdhci: arasan: Use sdhci_setup_host()Sascha Hauer2021-06-101-27/+5
| | | | | | | | | | | | | | | | | | | | | | | | Use common code instead of duplicating it in the driver. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210607104411.23071-8-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | mci: sdhci: imx: Use sdhci_setup_host()Sascha Hauer2021-06-101-13/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | sdhci_setup_host() handles reading the caps. Call it instead of doing it in the driver. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210607104411.23071-6-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | mci: sdhci: port over some common functions from LinuxSascha Hauer2021-06-102-0/+333
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds some functions useful for SDHCI drivers from Linux: sdhci_calc_clk() sdhci_set_clock() sdhci_enable_clk() sdhci_read_caps() sdhci_set_bus_width() These functions can be used to further unify our different SDHCI drivers. All the new functions assume the also newly introduced sdhci_setup_host() has been called before using them. The functions are moslty the same as their Linux pendants, only sdhci_calc_clk() takes an addional clock rate argument where Linux uses host->max_clk. This is not suitable for the upcoming Rockchip driver which needs to adjust the input clock using clk_set_rate(), so fixed host->max_clk is not accurate for this driver. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210607104411.23071-5-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | mci: sdhci: Use Linux defines for SDHCI_CLOCK_CONTROL registerSascha Hauer2021-06-104-15/+18
| | | | | | | | | | | | | | | | | | | | | | | | Convert another register to use the Linux defines. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210607104411.23071-10-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | mci: sdhci: Use Linux defines for SDHCI_HOST_CONTROL registerSascha Hauer2021-06-104-23/+30
| | | | | | | | | | | | | | | | | | | | | | | | To ease porting and comparing of Linux code. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210607104411.23071-7-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | mci: sdhci: Use SDHCI_MAX_DIV_SPEC_200 defineSascha Hauer2021-06-083-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Linux uses SDHCI_MAX_DIV_SPEC_200 for what we have SDHCI_SPEC_200_MAX_CLK_DIVIDER. Also we have SDHCI_MAX_DIV_SPEC_300 defined in the arasan driver. Use the Linux defines and add them both to the header file. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210607104411.23071-4-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | mci: sdhci: Add and use SDHCI_CAPABILITIES_1 definesSascha Hauer2021-06-082-5/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | Linux has defines for the SDHCI_CAPABILITIES_1 register at offset 0x44. Add these and convert the only user so far to use the defines. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210607104411.23071-3-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | mci: sdhci: straighten capabilities registerSascha Hauer2021-06-076-35/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | So far we read the host capabilites register as two 16bit registers SDHCI_CAPABILITIES (0x40) and SDHCI_CAPABILITIES_1 (0x42). Read them as one 32bit register like Linux does. While at it switch to the register defines Linux uses. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210607104411.23071-2-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | mci: arasan: configure data transfer only if we actually have dataMichael Tretter2021-05-251-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If we don't have any data to transfer, we must not set the block size and block count. If data is NULL, accessing data to get the block size and block count is a NULL pointer dereference. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Link: https://lore.barebox.org/20210519073855.2748231-2-m.tretter@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | mci: arasan: wait for data available only on readMichael Tretter2021-05-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only READ data transfers actually send a data available interrupt. Therefore, check if the transfer is a read and wait for the data only in this case. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Link: https://lore.barebox.org/20210519073855.2748231-1-m.tretter@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/misc'Sascha Hauer2021-06-1621-237/+96
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| * | | drivers: base: Check all compatible strings for modalias matchTrent Piepho2021-06-161-18/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When attempting a modalias match in device_match_of_modalias(), only the first string in the compatible property, which is a list of strings, was used. A modalias (which is a bit of a misnomer in Barebox) match is used when a driver does not have an of_compatible match table, e.g. the at24 driver. The compatible string after the comma is matched against the driver's id table. Extend modalias match to try all strings in from the OF node's compatible property. This will cause a compatible like "rohm,br24g04-3", "atmel,24c04" to match against the "24c04" ID in the at24 driver. Or "isil,isl12057", "dallas,ds1337" will match the ds1307 driver's table, which doesn't know about isl12057 in Barebox. Signed-off-by: Trent Piepho <tpiepho@gmail.com> Link: https://lore.barebox.org/20210531145414.1210207-1-tpiepho@gmail.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | drivers: drop unused usb_gadget_{map,unmap}_request()Antony Pavlov2021-06-151-55/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no code that is dependent on usb_gadget_{map,unmap}_request(). Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Link: https://lore.barebox.org/20210614142833.86544-1-antonynpavlov@gmail.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | regulator: discard unused struct regulator_init_data handlingAhmad Fatoum2021-06-111-148/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | struct regulator_init_data and the contained regulation_constraints are populated from device tree, but unused anywhere. They are not required for the stpmic driver to operate, so they can just be dropped. No functional change. Tested-by: Enrico Jorns <ejo@pengutronix.de> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20210609084027.13591-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | watchdog: add option to provide fall-back restart handlerAhmad Fatoum2021-06-091-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some barebox ports may have a watchdog, but no restart handler, e.g. reset happens via PMIC, which has no driver yet, but watchdog controls reset line going to PMIC. Accommodate such setups by allowing registration of watchdog as fall back restart handler. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20210531071319.32459-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-28 03:03:43 +0000