| Commit message (Collapse) | Author | Age | Files | Lines |
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As the i.MX6 PCIe core doesn't have a software reachable reset
wired up, it's hard for any driver to get the core into a known
good state.
To make it easier for whatever software follows barebox, bring
back the core into a safe state before leaving barebox.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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When booting Barebox in the HW environment where PCIe core has been
used but not properly shut down, writing to PCIE_PL_PFLR in
imx6_pcie_assert_core_reset would cause data abort exception.
The problem can be easily reproduced on a i.MX6 based board with PCIe
slot populated with some device by doing:
> bootm -f -e 0x1050 <your board's>.img
Ignoring this exception seem to allow PCIe core to successfully
initialize and enumerate devices properly. This is also how Linux
Kernel version of the driver handles this situation -- it installs
dummy no-op abort handler at the beginning of device's probing.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Reconcile imx6_pcie_start_link with almost identical
imx6_pcie_establish_link from analogous Linux kernel driver. This
change is purely cosmetical, but refactoring the code this way
simplifies implementation comparison.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Originally it was intended to further extend the multi string property
device-path further with more elements, like for example a filename. It
turned out though that this is too complex and instead of further
extending the property we should instead create additional properties,
so this mechanism is removed with this patch to make the code simpler.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Current barebox,environment node only allows specifying a raw device or
partition to load an environment from. Some boards, like OMAP and
SoCFPGA, instead want to use a file located in a FAT filesystem.
Extend the device tree bindings with a new property 'file-path' that
will trigger this behavior.
This allows any board using this driver to get the env from a file or
from a raw device, instead of each machine type being either raw
device only or file only.
Signed-off-by: Trent Piepho <tpiepho@kymetacorp.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The gpio-keys driver often generates multiple events on a single buttong
press. Implement debouncing. The default debouncing time is 20ms and can
be configured with the "debounce-interval" device tree property.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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In commit 75b682795eafb2385556a9642f09e0af96a1264a using a path that
has a partition description broke.
Fix this and simpfy the code some.
There is no need to loop over each string in the path property: it's
defined to have at most one parition description, no extant dts has
more than one, and how it would handle more than one didn't make sense
anyway.
Once not looping, __of_find_path() just needs the partition
description text, not both the original node and property name to look
it up from.
When using a partition description, don't lookup the cdev of the node
just to replace it with the partition's cdev.
Signed-off-by: Trent Piepho <tpiepho@kymetacorp.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This fixes a regression, where boards specifying the environment
path using the form device-path = &phandle, "partname:part" would
be unable to find their env.
This is due to of_find_path() switching to cdev_by_device_node()
internally, which expects the device_node member of the main
area cdev to be initialized.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Explicitly loading environment is not required as it will be loaded if
available during device probing
Signed-off-by: Enrico Jorns <ejo@pengutronix.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Wihtout this patch, when using more than one state device an alias is
mandatory, otherwise the there will be two state devices with the name state.
This patch fixes the limitation by using the device node's name if no alias is
defined.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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device is not available
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This patch adds the function of_find_path_by_node(), which is similar to
of_find_path(), but it translates a device tree node into a barebox device path
directly.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This patch factors out the device detection logic into separate function, so
that it can be used from another function.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This boolean parameter tells you if the FPGA is programmed or not. It
can be accessed from the shell as "$fpga.programmed". One could use
this to not program the FPGA if it's already programmed.
There is an annoying limitation of the way barebox puts parameters
into the shell env: it requires they have no periods in the device
name. It uses the first period to divide the variable name into a
device and parameter name, which doesn't work correctly if the device
name has a period in it.
Since the names of any devices created from the OF device tree have a
period in them, this is a problem.
So what I did here was create a new device. Its parent will be the OF
device for the fpgamgr and it will in turn be the parent of the
firmware cdev. Previously the cdev's parent was the OF device. This
device won't have period in the name and the parameter is attached to
it. Even without the period limitation, doing this gives a nicer name
"fpga.programmed" instead of "ff706000.fpgamgr.programmed".
The fpgamgr code had a pointer to the OF device in its private state.
I changed this to be a struct for the new "fpga" device, which is then
used in all the places the former pointer was (nothing but dev_dbg,
etc. calls).
Signed-off-by: Trent Piepho <tpiepho@kymetacorp.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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If a device has the reset-gpios property we can support this through
the reset controller API, so drivers do not have to open code the
support for this property each time themselves as done a few dozen times
in the kernel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Treat NULL as a dummy reset line which is returned by the reset core
when there is no reset line connected to a device (that is, no
reset is described in the device tree). With this consumers can
just use the reset functions without having to check for existence.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add support for OMAP Watchdog driver.
Based on omap_wdt Linux driver (v4.3-rc1).
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Here is the warning message:
drivers/net/usb/asix.c:427:5: warning: no previous prototype for 'asix_rx_fixup_internal' [-Wmissing-prototypes]
int asix_rx_fixup_internal(struct usbnet *dev, void *buf, int len,
^
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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ax_skb receive buffer unalignment leads to consequent
unalignment data access in network stack routines,
especially in net_checksum().
By-turn unalignment data accesses lead to performance penalty.
Moreover on classic MIPS CPUs without hardware unalignment access
support this leads to undesirable exceptions.
At the moment barebox on MIPS can't parry these unalignment access
exceptions, so the Asix USB Ethernet chips, that need receive
fixup workaround, are completely unusable on MIPS without this patch.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Implement device tree property phy-reset-duration to adjust length of
phy reset.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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According to the device tree bindings in dts/Bindings/net/fsl-fec.txt
the default phy-reset time is 1ms.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Don't assume a 1:1 virt to phys mapping, but use the real physical
address returned by the dma alloc function.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The dw MAC requires that all clock domains to be running for it to
finish a MAC reset. This include the clock provided by the PHY.
If the PHY is powered down, bit BMCR_PDOWN set, then it won't be
generating a clock. And so the MAC never comes out of reset. On
shutdown, Linux will put the PHY in powerdown mode, so it can easily
be the case that the PHY is powered down on boot.
See Linux kernel commit 2d871aa07136fe6e576bde63072cf33e2c664e95.
Currently the MAC reset is done before the phy is probed. We can't
power up the phy until it's probed, so the resets must be in the
opposite order. The MAC reset is in device init but the PHY probe is
in device open. Device init is done first, always, while open is done
later, and only if the device is used.
Rather than move the phy probe to init, this moves the MAC reset to
open. It seems better to speed up boots that doesn't use ethernet by
skipping MAC reset than to slow them down by adding PHY probe.
Signed-off-by: Trent Piepho <tpiepho@kymetacorp.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This adds optimized timings for Samsung K9K8G08U 1Gb NAND flash.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Marvell PXA3xx and Armada 370/XP share the same NAND controller IP
with some minor differences. With support for controller IP v2, now
allow to build the driver on Armada 370/XP.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Newer versions of PXA3xx NAND controller support a 4th Command Buffer
register. Add the required HWFLAGS and additional write to NDCB0.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add support for HW BCH ECC for those HW versions that support it.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add support for 8bit HW ECC modes supported by later IP versions.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add support for 4bit HW ECC modes supported by later IP versions.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Marvell PXA3xx NAND flash controller IP has been reused in later SoCs
with additional HW features. Add HW BCH ECC as the first known HW
difference.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Newer versions of Marvell PXA3xx NFC also support BCH and therefore
higher ECC strengths than 1. Prepare for different ECC strength by
factoring out ECC init into separate functions by strength. Also,
add a new host variable that indicates BCH ECC.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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With DT helpers for ECC step size and strength, now use them on
Marvell NAND driver.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The "num-cs" property does not encode flashes CS line but number
of available CS signals. Fix wrong property parsing to ->cs by
adding proper ->num_cs variable to host struct.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Parsing DT nodes if CONFIG_OFTREE isn't enabled is pointless, also
we should prefer potential platform_data passed earlier.
Protect mrvl_nand_probe_dt by bailing out early if either
CONFIG_OFTREE is not enabled or dev's platform_data is non-NULL.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Marvell NAND controller allows to enable an Auto Read Status feature
that will automatically monitor NAND status during Erase and Program
operations. Ready bit in status register will be set after the
controller is sure the NAND device has finished the operation and
saves us from guessing the real timeout values.
Using the Auto Read Status feature prevents timeout issues on the
two operations with none or wrong timing register setup.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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If OOB data is not required on page program, we have to clear
the corresponding data with 0xff instead of 0x00.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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With PXA3xx now providing a common clock for the NAND clock, use it
and get rid of the mach/clock.h. This will allow Marvell Armada 370/XP
to reuse the same driver.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Kconfig prompt for Marvell Orion SoCs is missing a "Marvell"
prefix, add it to the prompt.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This imports DT helpers for MTD ECC step size and strength from
Linux kernel.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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