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| author | Shaokun Zhang <zhangshaokun@hisilicon.com> | 2017-10-19 19:05:19 +0800 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2017-10-19 17:06:35 +0100 |
| commit | 2bab3cf9104c5ab80a1b9c706d81d997548401e4 (patch) | |
| tree | a06bcc3b3f431ff9cbbfa016648c455c5bdac8c8 /include/linux/cpuhotplug.h | |
| parent | 2940bc4333707a05e69b3ffd737bda0dc0c3004f (diff) | |
| download | linux-0-day-2bab3cf9104c5ab80a1b9c706d81d997548401e4.tar.gz linux-0-day-2bab3cf9104c5ab80a1b9c706d81d997548401e4.tar.xz | |
perf: hisi: Add support for HiSilicon SoC HHA PMU driver
L3 cache coherence is maintained by Hydra Home Agent (HHA) in HiSilicon
SoC. This patch adds support for HHA PMU driver, Each HHA has own
control, counter and interrupt registers and is an separate PMU. For
each HHA PMU, it has 16-programable counters and each counter is
free-running. Interrupt is supported to handle counter (48-bits)
overflow.
Acked-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
Signed-off-by: Anurup M <anurup.m@huawei.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'include/linux/cpuhotplug.h')
| -rw-r--r-- | include/linux/cpuhotplug.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/cpuhotplug.h b/include/linux/cpuhotplug.h index 9621efdbb3bd7..cd63c52e7d933 100644 --- a/include/linux/cpuhotplug.h +++ b/include/linux/cpuhotplug.h @@ -153,6 +153,7 @@ enum cpuhp_state { CPUHP_AP_PERF_S390_SF_ONLINE, CPUHP_AP_PERF_ARM_CCI_ONLINE, CPUHP_AP_PERF_ARM_CCN_ONLINE, + CPUHP_AP_PERF_ARM_HISI_HHA_ONLINE, CPUHP_AP_PERF_ARM_HISI_L3_ONLINE, CPUHP_AP_PERF_ARM_L2X0_ONLINE, CPUHP_AP_PERF_ARM_QCOM_L2_ONLINE, |