Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | drm/bridge: samsung-dsim: fix PLL calculation | Lucas Stach | 2021-07-21 | 1 | -6/+6 |
* | drm/exynos: Add basic i.MX8MM support code | Marek Vasut | 2021-07-21 | 1 | -1/+8 |
* | drm/bridge: samsung-dsim: add bridge timings in driver data | Lucas Stach | 2021-07-21 | 1 | -0/+1 |
* | drm/bridge: samsung-dsim: add mode_fixup host op | Lucas Stach | 2021-07-21 | 1 | -0/+14 |
* | drm/bridge: samsung-dsim: fix horizontal blanking | Lucas Stach | 2021-07-21 | 1 | -5/+12 |
* | drm/bridge: samsung-dsim: fix HFP/HBP/HSA disable modes | Lucas Stach | 2021-07-21 | 1 | -3/+3 |
* | drm/exynos: Scale the DSIM PHY HFP/HBP/HSA to lanes and bpp | Marek Vasut | 2021-07-21 | 1 | -3/+6 |
* | drm/exynos: Init the DSIM PHY in samsung_dsim_enable() | Marek Vasut | 2021-07-21 | 1 | -0/+7 |
* | drm/exynos: move bridge driver to bridges | Michael Tretter | 2021-07-21 | 1 | -0/+1790 |