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author | Sascha Hauer <s.hauer@pengutronix.de> | 2016-06-13 07:29:57 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2016-06-13 07:29:57 +0200 |
commit | a4f4bc65b33164eb8c19bcff9834cc87bcc845bb (patch) | |
tree | ef97762be5b614f160e9affddd1bbbec43c007dc /dts/Bindings/arm/marvell/mvebu-cpu-config.txt | |
parent | 83e61900b02965d01f0885e2db2077df35be7f56 (diff) | |
download | barebox-a4f4bc65b33164eb8c19bcff9834cc87bcc845bb.tar.gz barebox-a4f4bc65b33164eb8c19bcff9834cc87bcc845bb.tar.xz |
dts: update to v4.6-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/arm/marvell/mvebu-cpu-config.txt')
-rw-r--r-- | dts/Bindings/arm/marvell/mvebu-cpu-config.txt | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/dts/Bindings/arm/marvell/mvebu-cpu-config.txt b/dts/Bindings/arm/marvell/mvebu-cpu-config.txt new file mode 100644 index 0000000000..2cdcd716da --- /dev/null +++ b/dts/Bindings/arm/marvell/mvebu-cpu-config.txt @@ -0,0 +1,20 @@ +MVEBU CPU Config registers +-------------------------- + +MVEBU (Marvell SOCs: Armada 370/XP) + +Required properties: + +- compatible: one of: + - "marvell,armada-370-cpu-config" + - "marvell,armada-xp-cpu-config" + +- reg: Should contain CPU config registers location and length, in + their per-CPU variant + +Example: + + cpu-config@21000 { + compatible = "marvell,armada-xp-cpu-config"; + reg = <0x21000 0x8>; + }; |