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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2016-09-29 14:38:07 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2016-09-29 14:38:07 +0200 |
| commit | d9a15385467936649b6c2cfeb7ab377002ddce0f (patch) | |
| tree | 39175107fc884a29fbba83f47d104f493833fe19 /dts/Bindings/arm/pmu.txt | |
| parent | bfe946c9593513b0ad1b440bcd997b263487b945 (diff) | |
| download | barebox-d9a15385467936649b6c2cfeb7ab377002ddce0f.tar.gz barebox-d9a15385467936649b6c2cfeb7ab377002ddce0f.tar.xz | |
dts: update to v4.8-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/arm/pmu.txt')
| -rw-r--r-- | dts/Bindings/arm/pmu.txt | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/dts/Bindings/arm/pmu.txt b/dts/Bindings/arm/pmu.txt index 74d5417d04..61c8b46204 100644 --- a/dts/Bindings/arm/pmu.txt +++ b/dts/Bindings/arm/pmu.txt @@ -39,7 +39,9 @@ Optional properties: When using a PPI, specifies a list of phandles to CPU nodes corresponding to the set of CPUs which have a PMU of this type signalling the PPI listed in the - interrupts property. + interrupts property, unless this is already specified + by the PPI interrupt specifier itself (in which case + the interrupt-affinity property shouldn't be present). This property should be present when there is more than a single SPI. |