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author | Sascha Hauer <s.hauer@pengutronix.de> | 2018-06-21 13:44:30 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-06-22 08:16:13 +0200 |
commit | e4067b75fb6ca83a58b2c342a0b3ee12e1223c4e (patch) | |
tree | be013bf46292f4696ac776bc91c1cf35b7adab24 /dts/Bindings/net/stm32-dwmac.txt | |
parent | fe040e0977fab29216f5039e8f9b04e6dbec859a (diff) | |
download | barebox-e4067b75fb6ca83a58b2c342a0b3ee12e1223c4e.tar.gz barebox-e4067b75fb6ca83a58b2c342a0b3ee12e1223c4e.tar.xz |
dts: update to v4.18-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/net/stm32-dwmac.txt')
-rw-r--r-- | dts/Bindings/net/stm32-dwmac.txt | 18 |
1 files changed, 16 insertions, 2 deletions
diff --git a/dts/Bindings/net/stm32-dwmac.txt b/dts/Bindings/net/stm32-dwmac.txt index 489dbcb66c..1341012722 100644 --- a/dts/Bindings/net/stm32-dwmac.txt +++ b/dts/Bindings/net/stm32-dwmac.txt @@ -6,14 +6,28 @@ Please see stmmac.txt for the other unchanged properties. The device node has following properties. Required properties: -- compatible: Should be "st,stm32-dwmac" to select glue, and +- compatible: For MCU family should be "st,stm32-dwmac" to select glue, and "snps,dwmac-3.50a" to select IP version. + For MPU family should be "st,stm32mp1-dwmac" to select + glue, and "snps,dwmac-4.20a" to select IP version. - clocks: Must contain a phandle for each entry in clock-names. - clock-names: Should be "stmmaceth" for the host clock. Should be "mac-clk-tx" for the MAC TX clock. Should be "mac-clk-rx" for the MAC RX clock. + For MPU family need to add also "ethstp" for power mode clock and, + "syscfg-clk" for SYSCFG clock. +- interrupt-names: Should contain a list of interrupt names corresponding to + the interrupts in the interrupts property, if available. + Should be "macirq" for the main MAC IRQ + Should be "eth_wake_irq" for the IT which wake up system - st,syscon : Should be phandle/offset pair. The phandle to the syscon node which - encompases the glue register, and the offset of the control register. + encompases the glue register, and the offset of the control register. + +Optional properties: +- clock-names: For MPU family "mac-clk-ck" for PHY without quartz +- st,int-phyclk (boolean) : valid only where PHY do not have quartz and need to be clock + by RCC + Example: ethernet@40028000 { |