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authorSascha Hauer <s.hauer@pengutronix.de>2018-09-11 08:26:30 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2018-09-11 17:23:13 +0200
commit35f607bc7da71b302fd6bf3d6d48d7ea66df1195 (patch)
treedd2cf14c56430d21079c794fa6e03d7f5d91070e /dts/Bindings/thermal/exynos-thermal.txt
parent625eea2765d94aee016cf25d9cabecde8eae0775 (diff)
downloadbarebox-35f607bc7da71b302fd6bf3d6d48d7ea66df1195.tar.gz
dts: update to v4.19-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/thermal/exynos-thermal.txt')
-rw-r--r--dts/Bindings/thermal/exynos-thermal.txt1
1 files changed, 0 insertions, 1 deletions
diff --git a/dts/Bindings/thermal/exynos-thermal.txt b/dts/Bindings/thermal/exynos-thermal.txt
index ad648d9..33004ce 100644
--- a/dts/Bindings/thermal/exynos-thermal.txt
+++ b/dts/Bindings/thermal/exynos-thermal.txt
@@ -13,7 +13,6 @@
Exynos5420 (Must pass triminfo base and triminfo clock)
"samsung,exynos5433-tmu"
"samsung,exynos7-tmu"
-- interrupt-parent : The phandle for the interrupt controller
- reg : Address range of the thermal registers. For soc's which has multiple
instances of TMU and some registers are shared across all TMU's like
interrupt related then 2 set of register has to supplied. First set