diff options
Diffstat (limited to 'cpu')
54 files changed, 0 insertions, 895 deletions
diff --git a/cpu/74xx_7xx/traps.c b/cpu/74xx_7xx/traps.c index 50c5eeb483..d7e317d088 100644 --- a/cpu/74xx_7xx/traps.c +++ b/cpu/74xx_7xx/traps.c @@ -232,24 +232,5 @@ UnknownException(struct pt_regs *regs) int addr_probe(uint *addr) { -#if 0 - int retval; - - __asm__ __volatile__( \ - "1: lwz %0,0(%1)\n" \ - " eieio\n" \ - " li %0,0\n" \ - "2:\n" \ - ".section .fixup,\"ax\"\n" \ - "3: li %0,-1\n" \ - " b 2b\n" \ - ".section __ex_table,\"a\"\n" \ - " .align 2\n" \ - " .long 1b,3b\n" \ - ".text" \ - : "=r" (retval) : "r"(addr)); - - return (retval); -#endif return 0; } diff --git a/cpu/arm920t/at91rm9200/i2c.c b/cpu/arm920t/at91rm9200/i2c.c index 826cea8e26..7e2d67ca53 100644 --- a/cpu/arm920t/at91rm9200/i2c.c +++ b/cpu/arm920t/at91rm9200/i2c.c @@ -126,9 +126,6 @@ i2c_read (unsigned char chip, unsigned int addr, int alen, return 1; /* XXX assume an ATMEL AT24C16 */ if (alen == 1) { -#if 0 /* EEPROM code already sets this correctly */ - chip |= (addr >> 8) & 0xff; -#endif addr = addr & 0xff; } #endif @@ -151,9 +148,6 @@ i2c_write(unsigned char chip, unsigned int addr, int alen, buf = buffer; /* do single byte writes */ for (i = 0; i < len; i++) { -#if 0 /* EEPROM code already sets this correctly */ - chip |= (addr >> 8) & 0xff; -#endif addr = addr & 0xff; if (at91_xfer(chip, addr, alen, buf++, 1, 0)) return 1; diff --git a/cpu/arm920t/at91rm9200/usb_ohci.c b/cpu/arm920t/at91rm9200/usb_ohci.c index 5b2c56cffc..72982a8e70 100644 --- a/cpu/arm920t/at91rm9200/usb_ohci.c +++ b/cpu/arm920t/at91rm9200/usb_ohci.c @@ -1279,10 +1279,6 @@ int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer, /* abuse timeout */ timeout = rh_check_port_status(&gohci); if (timeout >= 0) { -#if 0 /* this does nothing useful, but leave it here in case that changes */ - /* the called routine adds 1 to the passed value */ - usb_hub_port_connect_change(gohci.rh.dev, timeout - 1); -#endif /* * XXX * This is potentially dangerous because it assumes diff --git a/cpu/arm920t/s3c24x0/i2c.c b/cpu/arm920t/s3c24x0/i2c.c index 374b683137..7d02cdc161 100644 --- a/cpu/arm920t/s3c24x0/i2c.c +++ b/cpu/arm920t/s3c24x0/i2c.c @@ -71,12 +71,6 @@ static int GetI2CSDA(void) #endif } -#if 0 -static void SetI2CSDA(int x) -{ - rGPEDAT = (rGPEDAT & ~0x8000) | (x&1) << 15; -} -#endif static void SetI2CSCL(int x) { diff --git a/cpu/arm920t/s3c24x0/usb_ohci.c b/cpu/arm920t/s3c24x0/usb_ohci.c index 869ca79d03..8f5f86f376 100644 --- a/cpu/arm920t/s3c24x0/usb_ohci.c +++ b/cpu/arm920t/s3c24x0/usb_ohci.c @@ -1302,29 +1302,6 @@ int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer, } } -#if 0 - /* we got an Root Hub Status Change interrupt */ - if (got_rhsc) { -#ifdef DEBUG - ohci_dump_roothub (&gohci, 1); -#endif - got_rhsc = 0; - /* abuse timeout */ - timeout = rh_check_port_status(&gohci); - if (timeout >= 0) { -#if 0 /* this does nothing useful, but leave it here in case that changes */ - /* the called routine adds 1 to the passed value */ - usb_hub_port_connect_change(gohci.rh.dev, timeout - 1); -#endif - /* - * XXX - * This is potentially dangerous because it assumes - * that only one device is ever plugged in! - */ - devgone = dev; - } - } -#endif dev->status = stat; dev->act_len = transfer_len; diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S index 346f0d09ea..116265cf1a 100644 --- a/cpu/arm920t/start.S +++ b/cpu/arm920t/start.S @@ -199,26 +199,6 @@ clbss_l:str r2, [r0] /* clear loop... */ cmp r0, r1 ble clbss_l -#if 0 - /* try doing this stuff after the relocation */ - ldr r0, =pWTCON - mov r1, #0x0 - str r1, [r0] - - /* - * mask all IRQs by setting all bits in the INTMR - default - */ - mov r1, #0xffffffff - ldr r0, =INTMR - str r1, [r0] - - /* FCLK:HCLK:PCLK = 1:2:4 */ - /* default FCLK is 120 MHz ! */ - ldr r0, =CLKDIVN - mov r1, #3 - str r1, [r0] - /* END stuff after relocation */ -#endif ldr pc, _start_armboot diff --git a/cpu/i386/sc520.c b/cpu/i386/sc520.c index d0a7341882..8b4476aa7d 100644 --- a/cpu/i386/sc520.c +++ b/cpu/i386/sc520.c @@ -236,9 +236,6 @@ unsigned long init_sc520_dram(void) } -#if 0 - printf("Configured %d bytes of dram\n", dram_present); -#endif gd->ram_size = dram_present; return dram_present; @@ -284,9 +281,7 @@ int pci_sc520_set_irq(int pci_pin, int irq) { int i; -# if 1 printf("set_irq(): map INT%c to IRQ%d\n", pci_pin + 'A', irq); -#endif if (irq < 0 || irq > 15) { return -1; /* illegal irq */ } @@ -426,10 +421,6 @@ void udelay(unsigned long usec) read_mmcr_word(SC520_SWTMRMILLI); read_mmcr_word(SC520_SWTMRMICRO); -#if 0 - /* do not enable this line, udelay is used in the serial driver -> recursion */ - printf("udelay: %ld m.u %d.%d tm.tu %d.%d\n", usec, m, u, tm, tu); -#endif while (1) { m += read_mmcr_word(SC520_SWTMRMILLI); diff --git a/cpu/i386/timer.c b/cpu/i386/timer.c index 486d927a5a..dbd588ec83 100644 --- a/cpu/i386/timer.c +++ b/cpu/i386/timer.c @@ -136,76 +136,4 @@ void udelay (unsigned long usec) } -#if 0 -/* this is a version with debug output */ -void _udelay (unsigned long usec) -{ - int counter; - int wraps; - - int usec1, usec2, usec3; - int wraps1, wraps2, wraps3, wraps4; - int ctr1, ctr2, ctr3, nct1, nct2; - int i; - usec1=usec; - if (!timer_init_done) { - return; - } - counter = read_pit(); - ctr1 = counter; - wraps = usec/1000; - usec = usec%1000; - - usec2 = usec; - wraps1 = wraps; - - usec*=1194; - usec/=1000; - usec+=counter; - if (usec > 1194) { - usec-=1194; - wraps++; - } - - usec3 = usec; - wraps2 = wraps; - - ctr2 = wraps3 = nct1 = 4711; - ctr3 = wraps4 = nct2 = 4711; - i=0; - while (1) { - int new_count = read_pit(); - i++; - if ((new_count < usec && !wraps) || wraps < 0) { - break; - } - - if (new_count > counter) { - wraps--; - } - if (ctr2==4711) { - ctr2 = counter; - wraps3 = wraps; - nct1 = new_count; - } else { - ctr3 = counter; - wraps4 = wraps; - nct2 = new_count; - } - - counter = new_count; - } - - printf("udelay(%d)\n", usec1); - printf("counter %d\n", ctr1); - printf("1: wraps %d, usec %d\n", wraps1, usec2); - printf("2: wraps %d, usec %d\n", wraps2, usec3); - printf("new_count[0] %d counter %d wraps %d\n", nct1, ctr2, wraps3); - printf("new_count[%d] %d counter %d wraps %d\n", i, nct2, ctr3, wraps4); - - printf("%d %d %d %d %d\n", - read_pit(), read_pit(), read_pit(), - read_pit(), read_pit()); -} -#endif #endif diff --git a/cpu/ixp/npe/IxEthDBAPISupport.c b/cpu/ixp/npe/IxEthDBAPISupport.c index 25633a3d56..86d5573045 100644 --- a/cpu/ixp/npe/IxEthDBAPISupport.c +++ b/cpu/ixp/npe/IxEthDBAPISupport.c @@ -240,18 +240,6 @@ IxEthDBStatus ixEthDBPortEnable(IxEthDBPortId portID) ixEthDBFirewallInvalidAddressFilterEnable(portID, ixEthDBPortState[portID].srcAddressFilterEnabled); } -#if 0 /* test-only */ - if ((portInfo->featureCapability & IX_ETH_DB_VLAN_QOS) != 0) - { - ixEthDBAcceptableFrameTypeSet(portID, ixEthDBPortState[portID].frameFilter); - ixEthDBIngressVlanTaggingEnabledSet(portID, ixEthDBPortState[portID].taggingAction); - - ixEthDBEgressVlanTaggingEnabledSet(portID, ixEthDBPortState[portID].transmitTaggingInfo); - ixEthDBPortVlanMembershipSet(portID, ixEthDBPortState[portID].vlanMembership); - - ixEthDBPriorityMappingTableSet(portID, ixEthDBPortState[portID].priorityTable); - } -#endif if ((portInfo->featureCapability & IX_ETH_DB_SPANNING_TREE_PROTOCOL) != 0) { @@ -290,9 +278,6 @@ IxEthDBStatus ixEthDBPortDisable(IxEthDBPortId portID) BOOL result; PortInfo *portInfo; IxEthDBFeature learningEnabled; -#if 0 /* test-only */ - IxEthDBPriorityTable classZeroTable; -#endif IX_ETH_DB_CHECK_PORT_EXISTS(portID); @@ -325,19 +310,6 @@ IxEthDBStatus ixEthDBPortDisable(IxEthDBPortId portID) /* now turn off all EthDB filtering features on the port */ -#if 0 /* test-only */ - /* VLAN & QoS */ - if ((portInfo->featureCapability & IX_ETH_DB_VLAN_QOS) != 0) - { - ixEthDBPortVlanMembershipRangeAdd((IxEthDBPortId) portID, 0, IX_ETH_DB_802_1Q_MAX_VLAN_ID); - ixEthDBEgressVlanRangeTaggingEnabledSet((IxEthDBPortId) portID, 0, IX_ETH_DB_802_1Q_MAX_VLAN_ID, FALSE); - ixEthDBAcceptableFrameTypeSet((IxEthDBPortId) portID, IX_ETH_DB_ACCEPT_ALL_FRAMES); - ixEthDBIngressVlanTaggingEnabledSet((IxEthDBPortId) portID, IX_ETH_DB_PASS_THROUGH); - - memset(classZeroTable, 0, sizeof (classZeroTable)); - ixEthDBPriorityMappingTableSet((IxEthDBPortId) portID, classZeroTable); - } -#endif /* STP */ if ((portInfo->featureCapability & IX_ETH_DB_SPANNING_TREE_PROTOCOL) != 0) diff --git a/cpu/ixp/npe/IxOsalOsServices.c b/cpu/ixp/npe/IxOsalOsServices.c index e18c6c4c1e..a4bc5a0ee5 100644 --- a/cpu/ixp/npe/IxOsalOsServices.c +++ b/cpu/ixp/npe/IxOsalOsServices.c @@ -135,15 +135,9 @@ ixOsalLog (IxOsalLogLevel level, if (level <= ixOsalCurrLogLevel && level != IX_OSAL_LOG_LVL_NONE) { -#if 0 /* sr: U-Boots printf or debug doesn't return a length */ - int headerByteCount = (level == IX_OSAL_LOG_LVL_USER) ? 0 : diag_printf(traceHeaders[level - 1]); - - return headerByteCount + diag_printf (format, arg1, arg2, arg3, arg4, arg5, arg6); -#else int headerByteCount = (level == IX_OSAL_LOG_LVL_USER) ? 0 : strlen(traceHeaders[level - 1]); return headerByteCount + strlen(format); -#endif } else { @@ -191,7 +185,6 @@ PUBLIC void ixOsalSleep (UINT32 milliseconds) { if (milliseconds != 0) { -#if 1 /* * sr: We poll while we wait because interrupts are off in U-Boot * and CSR expects messages, etc to be dispatched while sleeping. @@ -208,7 +201,6 @@ ixOsalSleep (UINT32 milliseconds) udelay(1000); } -#endif } } diff --git a/cpu/ixp/npe/include/IxEthAccDataPlane_p.h b/cpu/ixp/npe/include/IxEthAccDataPlane_p.h index 8b8e6b256c..b909386c26 100644 --- a/cpu/ixp/npe/include/IxEthAccDataPlane_p.h +++ b/cpu/ixp/npe/include/IxEthAccDataPlane_p.h @@ -119,7 +119,6 @@ void ixEthAccDataPlaneShow(void); #define IX_ETHACC_NE_SHARED(mBufPtr) \ ((IxEthAccNe *)&((mBufPtr)->ix_ne)) -#if 1 #define IX_ETHACC_NE_NEXT(mBufPtr) (mBufPtr)->ix_ne.reserved[0] @@ -128,17 +127,6 @@ void ixEthAccDataPlaneShow(void); #define IX_ETHACC_NE_DATA(mBufPtr)(mBufPtr)->ix_ne.reserved[2] -#else - -#define IX_ETHACC_NE_NEXT(mBufPtr) \ - IX_ETHACC_NE_SHARED(mBufPtr)->ixReserved_next - -#define IX_ETHACC_NE_LEN(mBufPtr) \ - IX_ETHACC_NE_SHARED(mBufPtr)->ixReserved_lengths - -#define IX_ETHACC_NE_DATA(mBufPtr) \ - IX_ETHACC_NE_SHARED(mBufPtr)->ixReserved_data -#endif /* * Use MBUF next pointer field to chain data. diff --git a/cpu/ixp/npe/include/IxOsalMemAccess.h b/cpu/ixp/npe/include/IxOsalMemAccess.h index 2ad0ccfbb2..13565e44d8 100644 --- a/cpu/ixp/npe/include/IxOsalMemAccess.h +++ b/cpu/ixp/npe/include/IxOsalMemAccess.h @@ -252,26 +252,13 @@ ixOsalWinCEReadLCookie (volatile UINT32 * lCookie) static __inline__ UINT16 ixOsalWinCEReadWCookie (volatile UINT16 * wCookie) { -#if 0 - UINT32 auxVal = *((volatile UINT32 *) wCookie); - if ((unsigned) wCookie & 3) - return (UINT16) (auxVal >> 16); - else - return (UINT16) (auxVal & 0xffff); -#else return *wCookie; -#endif } static __inline__ UINT8 ixOsalWinCEReadBCookie (volatile UINT8 * bCookie) { -#if 0 - UINT32 auxVal = *((volatile UINT32 *) bCookie); - return (UINT8) ((auxVal >> (3 - (((unsigned) bCookie & 3) << 3)) & 0xff)); -#else return *bCookie; -#endif } static __inline__ void @@ -283,35 +270,13 @@ ixOsalWinCEWriteLCookie (volatile UINT32 * lCookie, UINT32 lVal) static __inline__ void ixOsalWinCEWriteWCookie (volatile UINT16 * wCookie, UINT16 wVal) { -#if 0 - volatile UINT32 *auxCookie = - (volatile UINT32 *) ((unsigned) wCookie & ~3); - if ((unsigned) wCookie & 3) - { - *auxCookie &= 0xffff; - *auxCookie |= (UINT32) wVal << 16; - } - else - { - *auxCookie &= ~0xffff; - *auxCookie |= (UINT32) wVal & 0xffff; - } -#else *wCookie = wVal; -#endif } static __inline__ void ixOsalWinCEWriteBCookie (volatile UINT8 * bCookie, UINT8 bVal) { -#if 0 - volatile UINT32 *auxCookie = - (volatile UINT32 *) ((unsigned) bCookie & ~3); - *auxCookie &= 0xff << (3 - (((unsigned) bCookie & 3) << 3)); - *auxCookie |= (UINT32) bVal << (3 - (((unsigned) bCookie & 3) << 3)); -#else *bCookie = bVal; -#endif } diff --git a/cpu/ixp/npe/include/IxOsalOsBufferMgt.h b/cpu/ixp/npe/include/IxOsalOsBufferMgt.h index 8e46586ea0..745fd8c443 100644 --- a/cpu/ixp/npe/include/IxOsalOsBufferMgt.h +++ b/cpu/ixp/npe/include/IxOsalOsBufferMgt.h @@ -55,42 +55,5 @@ #include "IxOsalBufferMgtDefault.h" -#if 0 /* FIXME */ -/* Define os-specific buffer macros for subfields */ -#define IX_OSAL_OSBUF_MDATA(osBufPtr) IX_OSAL_MBUF_MDATA(osBufPtr) - ( ((M_BLK *) osBufPtr)->m_data ) - -#define IX_OSAL_OSBUF_MLEN(osBufPtr) \ - ( ((M_BLK *) osBufPtr)->m_len ) - -#define IX_OSAL_OSBUF_PKT_LEN(osBufPtr) \ - ( ((M_BLK *) osBufPtr)->m_pkthdr.len ) - -#define IX_OSAL_OS_CONVERT_OSBUF_TO_IXPBUF( osBufPtr, ixpBufPtr) \ - { \ - IX_OSAL_MBUF_OSBUF_PTR( (IX_OSAL_MBUF *) ixpBufPtr) = (void *) osBufPtr; \ - IX_OSAL_MBUF_MDATA((IX_OSAL_MBUF *) ixpBufPtr) = IX_OSAL_OSBUF_MDATA(osBufPtr); \ - IX_OSAL_MBUF_PKT_LEN((IX_OSAL_MBUF *) ixpBufPtr) = IX_OSAL_OSBUF_PKT_LEN(osBufPtr); \ - IX_OSAL_MBUF_MLEN((IX_OSAL_MBUF *) ixpBufPtr) = IX_OSAL_OSBUF_MLEN(osBufPtr); \ - } - -#define IX_OSAL_OS_CONVERT_IXPBUF_TO_OSBUF( ixpBufPtr, osBufPtr) \ - { \ - if (ixpBufPtr == NULL) \ - { /* Do nothing */ } \ - else \ - { \ - (M_BLK *) osBufPtr = (M_BLK *) IX_OSAL_MBUF_OSBUF_PTR((IX_OSAL_MBUF *) ixpBufPtr); \ - if (osBufPtr == NULL) \ - { /* Do nothing */ } \ - else \ - { \ - IX_OSAL_OSBUF_MLEN(osBufPtr) =IX_OSAL_MBUF_MLEN((IX_OSAL_MBUF *) ixpBufPtr); \ - IX_OSAL_OSBUF_PKT_LEN(osBufPtr) =IX_OSAL_MBUF_PKT_LEN((IX_OSAL_MBUF *) ixpBufPtr); \ - } \ - } \ - } - -#endif /* FIXME */ #endif /* #define IX_OSAL_OS_BUFFER_MGT_H */ diff --git a/cpu/ixp/npe/include/IxOsalOsTypes.h b/cpu/ixp/npe/include/IxOsalOsTypes.h index 272eef185e..6e652411f5 100644 --- a/cpu/ixp/npe/include/IxOsalOsTypes.h +++ b/cpu/ixp/npe/include/IxOsalOsTypes.h @@ -17,21 +17,6 @@ typedef u16 USHORT; typedef u8 UCHAR; typedef u32 BOOL; -#if 0 /* FIXME */ - -/* Default stack limit is 10 KB */ -#define IX_OSAL_OS_THREAD_DEFAULT_STACK_SIZE (10240) - -/* Maximum stack limit is 32 MB */ -#define IX_OSAL_OS_THREAD_MAX_STACK_SIZE (33554432) /* 32 MBytes */ - -/* Default thread priority */ -#define IX_OSAL_OS_DEFAULT_THREAD_PRIORITY (90) - -/* Thread maximum priority (0 - 255). 0 - highest priority */ -#define IX_OSAL_OS_MAX_THREAD_PRIORITY (255) - -#endif /* FIXME */ #define IX_OSAL_OS_WAIT_FOREVER (-1L) #define IX_OSAL_OS_WAIT_NONE 0 diff --git a/cpu/ixp/npe/npe.c b/cpu/ixp/npe/npe.c index ab7ca8bef0..e29b47d8c8 100644 --- a/cpu/ixp/npe/npe.c +++ b/cpu/ixp/npe/npe.c @@ -21,9 +21,6 @@ * MA 02111-1307 USA */ -#if 0 -#define DEBUG /* define for debug output */ -#endif #include <config.h> #include <common.h> @@ -429,28 +426,6 @@ static int npe_init(struct eth_device *dev, bd_t * bis) return 1; } -#if 0 /* test-only: probably have to deal with it when booting linux (for a clean state) */ -/* Uninitialize CSR library. */ -static void npe_csr_unload(void) -{ - ixEthAccUnload(); - ixEthDBUnload(); - ixNpeMhUnload(); - ixQMgrUnload(); -} - -/* callback which is used by ethAcc to recover RX buffers when stopping */ -static void npe_rx_stop_callback(u32 cbTag, IX_OSAL_MBUF *m, IxEthAccPortId portid) -{ - debug("%s\n", __FUNCTION__); -} - -/* callback which is used by ethAcc to recover TX buffers when stopping */ -static void npe_tx_stop_callback(u32 cbTag, IX_OSAL_MBUF *m) -{ - debug("%s\n", __FUNCTION__); -} -#endif static void npe_halt(struct eth_device *dev) { @@ -465,40 +440,6 @@ static void npe_halt(struct eth_device *dev) udelay(100); } -#if 0 /* test-only: probably have to deal with it when booting linux (for a clean state) */ - if (ixEthAccPortRxCallbackRegister(p_npe->eth_id, npe_rx_stop_callback, - (u32)p_npe) != IX_ETH_ACC_SUCCESS) { - debug("Error registering rx callback!\n"); - } - - if (ixEthAccPortTxDoneCallbackRegister(p_npe->eth_id, npe_tx_stop_callback, - (u32)p_npe) != IX_ETH_ACC_SUCCESS) { - debug("Error registering tx callback!\n"); - } - - if (ixEthAccPortDisable(p_npe->eth_id) != IX_ETH_ACC_SUCCESS) { - debug("npe_stop: Error disabling NPEB!\n"); - } - - /* Delay to give time for recovery of mbufs */ - for (i = 0; i < 100; i++) { - npe_poll(p_npe->eth_id); - udelay(10000); - } - - /* - * For U-Boot only, we are probably launching Linux or other OS that - * needs a clean slate for its NPE library. - */ -#if 0 /* test-only */ - for (i = 0; i < IX_ETH_ACC_NUMBER_OF_PORTS; i++) { - if (npe_used[i] && npe_exists[i]) - if (ixNpeDlNpeStopAndReset(__eth_to_npe(i)) != IX_SUCCESS) - printf("Failed to stop and reset NPE B.\n"); - } -#endif - -#endif p_npe->active = 0; } diff --git a/cpu/ixp/start.S b/cpu/ixp/start.S index 757cfaa2d5..a37b307880 100644 --- a/cpu/ixp/start.S +++ b/cpu/ixp/start.S @@ -159,12 +159,6 @@ reset: str r1, [r2] /* make sure flash is visible at 0 */ -#if 0 - ldr r2, =IXP425_EXP_CFG0 - ldr r1, [r2] - orr r1, r1, #0x80000000 - str r1, [r2] -#endif mov r1, #CFG_SDR_CONFIG ldr r2, =IXP425_SDR_CONFIG str r1, [r2] diff --git a/cpu/mcf52x2/fec.c b/cpu/mcf52x2/fec.c index b6540b55af..fed57139f8 100644 --- a/cpu/mcf52x2/fec.c +++ b/cpu/mcf52x2/fec.c @@ -324,14 +324,9 @@ int eth_init (bd_t * bd) /* Enable MII mode */ -#if 0 /* Full duplex mode */ - fecp->fec_r_cntrl = FEC_RCNTRL_MII_MODE; - fecp->fec_x_cntrl = FEC_TCNTRL_FDEN; -#else /* Half duplex mode */ fecp->fec_r_cntrl = (PKT_MAXBUF_SIZE << 16); /* set max frame length */ fecp->fec_r_cntrl |= FEC_RCNTRL_MII_MODE | FEC_RCNTRL_DRT; fecp->fec_x_cntrl = 0; -#endif /* Set MII speed */ fecp->fec_mii_speed = (((CFG_CLK / 2) / (2500000 / 10)) + 5) / 10; fecp->fec_mii_speed *= 2; diff --git a/cpu/mcf52x2/start.S b/cpu/mcf52x2/start.S index 7c9a7d2d2b..e62880d7d0 100644 --- a/cpu/mcf52x2/start.S +++ b/cpu/mcf52x2/start.S @@ -193,14 +193,6 @@ _copy_flash: _after_flash_copy: #endif -#if 0 - /* invalidate and disable cache */ - move.l #0x01000000, %d0 /* Invalidate cache cmd */ - movec %d0, %CACR /* Invalidate cache */ - move.l #0, %d0 - movec %d0, %ACR0 - movec %d0, %ACR1 -#endif /* set stackpointer to end of internal ram to get some stackspace for the first c-code */ move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_SP_OFFSET), %sp diff --git a/cpu/mips/au1x00_usb_ohci.c b/cpu/mips/au1x00_usb_ohci.c index dbf72dc6f8..95170e6176 100644 --- a/cpu/mips/au1x00_usb_ohci.c +++ b/cpu/mips/au1x00_usb_ohci.c @@ -1284,10 +1284,6 @@ int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer, /* abuse timeout */ timeout = rh_check_port_status(&gohci); if (timeout >= 0) { -#if 0 /* this does nothing useful, but leave it here in case that changes */ - /* the called routine adds 1 to the passed value */ - usb_hub_port_connect_change(gohci.rh.dev, timeout - 1); -#endif /* * XXX * This is potentially dangerous because it assumes diff --git a/cpu/mpc5xx/interrupts.c b/cpu/mpc5xx/interrupts.c index 7f6e1363e7..5ee6703a62 100644 --- a/cpu/mpc5xx/interrupts.c +++ b/cpu/mpc5xx/interrupts.c @@ -140,20 +140,12 @@ void irq_install_handler (int vec, interrupt_handler_t * handler, irq_vecs[vec].handler = handler; irq_vecs[vec].arg = arg; immr->im_siu_conf.sc_simask |= 1 << (31 - vec); -#if 0 - printf ("Install SIU interrupt for vector %d ==> %p\n", - vec, handler); -#endif } void irq_free_handler (int vec) { volatile immap_t *immr = (immap_t *) CFG_IMMR; /* SIU interrupt */ -#if 0 - printf ("Free CPM interrupt for vector %d\n", - vec); -#endif immr->im_siu_conf.sc_simask &= ~(1 << (31 - vec)); irq_vecs[vec].handler = NULL; irq_vecs[vec].arg = NULL; @@ -167,9 +159,6 @@ void timer_interrupt_cpu (struct pt_regs *regs) { volatile immap_t *immr = (immap_t *) CFG_IMMR; -#if 0 - printf ("*** Timer Interrupt *** "); -#endif /* Reset Timer Status Bit and Timers Interrupt Status */ immr->im_clkrstk.cark_plprcrk = KAPWR_KEY; __asm__ ("nop"); diff --git a/cpu/mpc5xxx/i2c.c b/cpu/mpc5xxx/i2c.c index 0f02e78a3b..9e22281fec 100644 --- a/cpu/mpc5xxx/i2c.c +++ b/cpu/mpc5xxx/i2c.c @@ -86,14 +86,12 @@ static int wait_for_bb(void) status = mpc_reg_in(®s->msr); while (timeout-- && (status & I2C_BB)) { -#if 1 volatile int temp; mpc_reg_out(®s->mcr, I2C_STA, I2C_STA); temp = mpc_reg_in(®s->mdr); mpc_reg_out(®s->mcr, 0, I2C_STA); mpc_reg_out(®s->mcr, 0, 0); mpc_reg_out(®s->mcr, I2C_EN, 0); -#endif udelay(1000); status = mpc_reg_in(®s->msr); } diff --git a/cpu/mpc5xxx/traps.c b/cpu/mpc5xxx/traps.c index 2ee782b9c8..865a742fce 100644 --- a/cpu/mpc5xxx/traps.c +++ b/cpu/mpc5xxx/traps.c @@ -225,24 +225,5 @@ DebugException(struct pt_regs *regs) int addr_probe(uint *addr) { -#if 0 - int retval; - - __asm__ __volatile__( \ - "1: lwz %0,0(%1)\n" \ - " eieio\n" \ - " li %0,0\n" \ - "2:\n" \ - ".section .fixup,\"ax\"\n" \ - "3: li %0,-1\n" \ - " b 2b\n" \ - ".section __ex_table,\"a\"\n" \ - " .align 2\n" \ - " .long 1b,3b\n" \ - ".text" \ - : "=r" (retval) : "r"(addr)); - - return (retval); -#endif return 0; } diff --git a/cpu/mpc5xxx/usb_ohci.c b/cpu/mpc5xxx/usb_ohci.c index c774da36d1..73f54fb6eb 100644 --- a/cpu/mpc5xxx/usb_ohci.c +++ b/cpu/mpc5xxx/usb_ohci.c @@ -1289,29 +1289,6 @@ int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer, break; } } -#if 0 - /* we got an Root Hub Status Change interrupt */ - if (got_rhsc) { -#ifdef DEBUG - ohci_dump_roothub (&gohci, 1); -#endif - got_rhsc = 0; - /* abuse timeout */ - timeout = rh_check_port_status(&gohci); - if (timeout >= 0) { -#if 0 /* this does nothing useful, but leave it here in case that changes */ - /* the called routine adds 1 to the passed value */ - usb_hub_port_connect_change(gohci.rh.dev, timeout - 1); -#endif - /* - * XXX - * This is potentially dangerous because it assumes - * that only one device is ever plugged in! - */ - devgone = dev; - } - } -#endif dev->status = stat; dev->act_len = transfer_len; diff --git a/cpu/mpc8220/fec.c b/cpu/mpc8220/fec.c index 1201e794df..2ba87cd003 100644 --- a/cpu/mpc8220/fec.c +++ b/cpu/mpc8220/fec.c @@ -348,14 +348,12 @@ static int mpc8220_fec_init (struct eth_device *dev, bd_t * bis) */ fec->eth->xmit_fsm = 0x03000000; -#if 1 /*#if defined(CONFIG_MPC5200)*/ /* * Turn off COMM bus prefetch in the MGT5200 BestComm. It doesn't * work w/ the current receive task. */ dma->PtdCntrl |= 0x00000001; -#endif /* * Set priority of different initiators @@ -777,16 +775,6 @@ static int mpc8220_fec_recv (struct eth_device *dev) frame = (NBUF *) pRbd->dataPointer; frame_length = pRbd->dataLength - 4; -#if (0) - { - int i; - - printf ("recv data hdr:"); - for (i = 0; i < 14; i++) - printf ("%x ", *(frame->head + i)); - printf ("\n"); - } -#endif /* * Fill the buffer and pass it to upper layers */ diff --git a/cpu/mpc8220/i2c.c b/cpu/mpc8220/i2c.c index d67936dc31..2c6a55d891 100644 --- a/cpu/mpc8220/i2c.c +++ b/cpu/mpc8220/i2c.c @@ -105,7 +105,6 @@ static int wait_for_bb (void) status = mpc_reg_in (®s->sr); while (timeout-- && (status & I2C_BB)) { -#if 1 volatile int temp; mpc_reg_out (®s->cr, I2C_STA, I2C_STA); @@ -113,7 +112,6 @@ static int wait_for_bb (void) mpc_reg_out (®s->cr, 0, I2C_STA); mpc_reg_out (®s->cr, 0, 0); mpc_reg_out (®s->cr, I2C_EN, 0); -#endif udelay (1000); status = mpc_reg_in (®s->sr); } diff --git a/cpu/mpc8220/i2cCore.c b/cpu/mpc8220/i2cCore.c index accf43c102..4e690bc823 100644 --- a/cpu/mpc8220/i2cCore.c +++ b/cpu/mpc8220/i2cCore.c @@ -191,9 +191,7 @@ STATUS i2c_start (PSI2C pi2c, PI2CSET pi2cSet) #else UINT8 ByteOffset = pi2cSet->str_adr; #endif -#if 1 UINT8 tmp = 0; -#endif UINT8 Addr = pi2cSet->slv_adr; pi2c->cr |= I2C_CTL_STA; /* Generate start signal */ @@ -207,13 +205,6 @@ STATUS i2c_start (PSI2C pi2c, PI2CSET pi2cSet) return ERROR; } #ifdef TWOBYTES -# if 0 - /* Issue the offset to start */ - if (i2c_write2byte (pi2c, &ByteOffset) != OK) { - i2c_stop (pi2c); /* Disable I2c */ - return ERROR; - } -#endif tmp = (ByteOffset >> 8) & 0xff; if (i2c_writebyte (pi2c, &tmp) != OK) { i2c_stop (pi2c); /* Disable I2c */ diff --git a/cpu/mpc8220/traps.c b/cpu/mpc8220/traps.c index cdee2be78b..f6bd1bbcf2 100644 --- a/cpu/mpc8220/traps.c +++ b/cpu/mpc8220/traps.c @@ -218,22 +218,5 @@ void DebugException (struct pt_regs *regs) */ int addr_probe (uint * addr) { -#if 0 - int retval; - - __asm__ __volatile__ ("1: lwz %0,0(%1)\n" - " eieio\n" - " li %0,0\n" - "2:\n" - ".section .fixup,\"ax\"\n" - "3: li %0,-1\n" - " b 2b\n" - ".section __ex_table,\"a\"\n" - " .align 2\n" - " .long 1b,3b\n" - ".text":"=r" (retval):"r" (addr)); - - return (retval); -#endif return 0; } diff --git a/cpu/mpc824x/cpu_init.c b/cpu/mpc824x/cpu_init.c index 7871031b97..64c7af5311 100644 --- a/cpu/mpc824x/cpu_init.c +++ b/cpu/mpc824x/cpu_init.c @@ -106,35 +106,6 @@ cpu_init_f (void) CONFIG_READ_BYTE(AMBOR,val); CONFIG_WRITE_BYTE(AMBOR,val|0x1); -#if 0 - /* - * The following bug only affects older (XPC8245) processors. - * DMA transfers initiated by external devices get corrupted due - * to a hardware scheduling problem. - * - * The effect is: - * when transferring X words, the first 32 words are transferred - * OK, the next 3 x 32 words are 'old' data (from previous DMA) - * while the rest of the X words is xferred fine. - * - * Disabling 3 of the 4 32 word hardware buffers solves the problem - * with no significant performance loss. - */ - - CONFIG_READ_BYTE(PCMBCR,val); - /* in order not to corrupt data which is being read over the PCI bus - * with the PPC as slave, we need to reduce the number of PCMRBs to 1, - * 4.11 in the processor user manual - * */ - -#if 1 - CONFIG_WRITE_BYTE(PCMBCR,(val|0xC0)); /* 1 PCMRB */ -#else - CONFIG_WRITE_BYTE(PCMBCR,(val|0x80)); /* 2 PCMRBs */ - CONFIG_WRITE_BYTE(PCMBCR,(val|0x40)); /* 3 PCMRBs */ - /* default, 4 PCMRBs are used */ -#endif -#endif #endif CONFIG_READ_WORD(PICR1, val); diff --git a/cpu/mpc824x/start.S b/cpu/mpc824x/start.S index 9ff052c3b0..9a4f94b918 100644 --- a/cpu/mpc824x/start.S +++ b/cpu/mpc824x/start.S @@ -306,28 +306,12 @@ transfer_to_handler: SAVE_4GPRS(8, r21) SAVE_8GPRS(12, r21) SAVE_8GPRS(24, r21) -#if 0 - andi. r23,r23,MSR_PR - mfspr r23,SPRG3 /* if from user, fix up tss.regs */ - beq 2f - addi r24,r1,STACK_FRAME_OVERHEAD - stw r24,PT_REGS(r23) -2: addi r2,r23,-TSS /* set r2 to current */ - tovirt(r2,r2,r23) -#endif mflr r23 andi. r24,r23,0x3f00 /* get vector offset */ stw r24,TRAP(r21) li r22,0 stw r22,RESULT(r21) mtspr SPRG2,r22 /* r1 is now kernel sp */ -#if 0 - addi r24,r2,TASK_STRUCT_SIZE /* check for kernel stack overflow */ - cmplw 0,r1,r2 - cmplw 1,r1,r24 - crand 1,1,4 - bgt stack_ovf /* if r2 < r1 < r2+TASK_STRUCT_SIZE */ -#endif lwz r24,0(r23) /* virtual address of handler */ lwz r23,4(r23) /* where to go when done */ mtspr SRR0,r24 diff --git a/cpu/mpc824x/traps.c b/cpu/mpc824x/traps.c index 071d003f8c..b03f82d0f2 100644 --- a/cpu/mpc824x/traps.c +++ b/cpu/mpc824x/traps.c @@ -196,24 +196,5 @@ DebugException(struct pt_regs *regs) int addr_probe(uint *addr) { -#if 0 - int retval; - - __asm__ __volatile__( \ - "1: lwz %0,0(%1)\n" \ - " eieio\n" \ - " li %0,0\n" \ - "2:\n" \ - ".section .fixup,\"ax\"\n" \ - "3: li %0,-1\n" \ - " b 2b\n" \ - ".section __ex_table,\"a\"\n" \ - " .align 2\n" \ - " .long 1b,3b\n" \ - ".text" \ - : "=r" (retval) : "r"(addr)); - - return (retval); -#endif return 0; } diff --git a/cpu/mpc8260/ether_fcc.c b/cpu/mpc8260/ether_fcc.c index 584c40f17a..941dbfa655 100644 --- a/cpu/mpc8260/ether_fcc.c +++ b/cpu/mpc8260/ether_fcc.c @@ -230,9 +230,6 @@ static int fec_init(struct eth_device* dev, bd_t *bis) fcc_enet_t *pram_ptr; unsigned long mem_addr; -#if 0 - mii_discover_phy(); -#endif /* 28.9 - (1-2): ioports have been set up already */ @@ -328,12 +325,6 @@ static int fec_init(struct eth_device* dev, bd_t *bis) pram_ptr->fen_maxd2 = PKT_MAXDMA_SIZE; /* maximum DMA2 length */ pram_ptr->fen_rfthr = 1; pram_ptr->fen_rfcnt = 1; -#if 0 - printf("pram_ptr->fen_genfcc.fcc_rbase %08lx\n", - pram_ptr->fen_genfcc.fcc_rbase); - printf("pram_ptr->fen_genfcc.fcc_tbase %08lx\n", - pram_ptr->fen_genfcc.fcc_tbase); -#endif /* 28.9 - (8): clear out events in FCCE */ immr->im_fcc[info->ether_index].fcc_fcce = ~0x0; @@ -560,7 +551,6 @@ static uint __inline__ nbs (uint value, uint nbits) { uint cnt = 0; -#if 1 uint pos = sizeof (uint) * 8; __asm__ __volatile__ ("\ @@ -573,15 +563,6 @@ nbs (uint value, uint nbits) : "=r"(cnt) : "r"(value), "r"(nbits), "r"(cnt), "r"(pos) : "ctr", "cc" ); -#else - uint mask = 1; - - do { - if (value & mask) - cnt++; - mask <<= 1; - } while (--nbits); -#endif return (cnt); } diff --git a/cpu/mpc8260/ether_scc.c b/cpu/mpc8260/ether_scc.c index a733b45c01..d22e8b216c 100644 --- a/cpu/mpc8260/ether_scc.c +++ b/cpu/mpc8260/ether_scc.c @@ -344,13 +344,5 @@ void eth_halt(void) SCC_GSMRL_ENT); } -#if 0 -void restart(void) -{ - volatile immap_t *immr = (immap_t *)CFG_IMMR; - immr->im_cpm.cp_scc[CONFIG_ETHER_INDEX-1].scc_gsmrl |= (SCC_GSMRL_ENR | - SCC_GSMRL_ENT); -} -#endif #endif /* CONFIG_ETHER_ON_SCC && CFG_CMD_NET */ diff --git a/cpu/mpc8260/pci.c b/cpu/mpc8260/pci.c index 1edd6fb8dd..fe3e8cbd1a 100644 --- a/cpu/mpc8260/pci.c +++ b/cpu/mpc8260/pci.c @@ -275,22 +275,7 @@ void pci_mpc8250_init (struct pci_controller *hose) | SIUMCR_BCTLC00 | SIUMCR_MMR11; #elif defined(CONFIG_TQM8272) -#if 0 - immap->im_siu_conf.sc_siumcr = (immap->im_siu_conf.sc_siumcr & - ~SIUMCR_LBPC11 & - ~SIUMCR_CS10PC11 & - ~SIUMCR_LBPC11) | - SIUMCR_LBPC01 | - SIUMCR_CS10PC01 | - SIUMCR_APPC10; -#else -#if 0 - immap->im_siu_conf.sc_siumcr = (immap->im_siu_conf.sc_siumcr | - SIUMCR_APPC10); -#else immap->im_siu_conf.sc_siumcr = 0x88000000; -#endif -#endif #else /* * Setting required to enable IRQ1-IRQ7 (SIUMCR [DPPC]), diff --git a/cpu/mpc8260/speed.c b/cpu/mpc8260/speed.c index 38cd0d9a70..c234a28d0d 100644 --- a/cpu/mpc8260/speed.c +++ b/cpu/mpc8260/speed.c @@ -144,12 +144,6 @@ int get_clocks (void) plldf = (scmr & SCMR_PLLDF) ? 1 : 0; gd->vco_out = (clkin * 2 * (pllmf + 1)) / (plldf + 1); } -#if 0 - if (gd->vco_out / (busdf + 1) != clkin) { - /* aaarrrggghhh!!! */ - return (1); - } -#endif gd->cpm_clk = gd->vco_out / 2; gd->bus_clk = clkin; diff --git a/cpu/mpc8260/traps.c b/cpu/mpc8260/traps.c index 0c39e434ed..4f07531f93 100644 --- a/cpu/mpc8260/traps.c +++ b/cpu/mpc8260/traps.c @@ -253,24 +253,5 @@ DebugException(struct pt_regs *regs) int addr_probe(uint *addr) { -#if 0 - int retval; - - __asm__ __volatile__( \ - "1: lwz %0,0(%1)\n" \ - " eieio\n" \ - " li %0,0\n" \ - "2:\n" \ - ".section .fixup,\"ax\"\n" \ - "3: li %0,-1\n" \ - " b 2b\n" \ - ".section __ex_table,\"a\"\n" \ - " .align 2\n" \ - " .long 1b,3b\n" \ - ".text" \ - : "=r" (retval) : "r"(addr)); - - return (retval); -#endif return 0; } diff --git a/cpu/mpc83xx/start.S b/cpu/mpc83xx/start.S index 0f27bb61f8..3431adad41 100644 --- a/cpu/mpc83xx/start.S +++ b/cpu/mpc83xx/start.S @@ -174,9 +174,7 @@ boot_warm: /* time t 5 */ mtlr r5 blr in_flash: -#if 1 /* Remapping flash with LAW0. */ bl remap_flash_by_law0 -#endif #endif /* CFG_RAMBOOT */ /* setup the bats */ diff --git a/cpu/mpc83xx/traps.c b/cpu/mpc83xx/traps.c index 152fa73561..ccca28718f 100644 --- a/cpu/mpc83xx/traps.c +++ b/cpu/mpc83xx/traps.c @@ -123,17 +123,6 @@ MachineCheckException(struct pt_regs *regs) * the PCI exception handler. */ #ifdef CONFIG_PCI -#if 0 - volatile immap_t *immap = (immap_t *)CFG_IMMR; -#ifdef DEBUG - dump_pci(); -#endif - /* clear the error in the error status register */ - if(immap->im_pci.pci_esr & cpu_to_le32(PCI_ERROR_PCI_NO_RSP)) { - immap->im_pci.pci_esr = cpu_to_le32(PCI_ERROR_PCI_NO_RSP); - return; - } -#endif #endif /* CONFIG_PCI */ if ((fixup = search_exception_table(regs->nip)) != 0) { regs->nip = fixup; @@ -242,24 +231,5 @@ DebugException(struct pt_regs *regs) int addr_probe(uint *addr) { -#if 0 - int retval; - - __asm__ __volatile__( \ - "1: lwz %0,0(%1)\n" \ - " eieio\n" \ - " li %0,0\n" \ - "2:\n" \ - ".section .fixup,\"ax\"\n" \ - "3: li %0,-1\n" \ - " b 2b\n" \ - ".section __ex_table,\"a\"\n" \ - " .align 2\n" \ - " .long 1b,3b\n" \ - ".text" \ - : "=r" (retval) : "r"(addr)); - - return (retval); -#endif return 0; } diff --git a/cpu/mpc85xx/ether_fcc.c b/cpu/mpc85xx/ether_fcc.c index d15d242492..128fc3173b 100644 --- a/cpu/mpc85xx/ether_fcc.c +++ b/cpu/mpc85xx/ether_fcc.c @@ -235,9 +235,6 @@ static int fec_init(struct eth_device* dev, bd_t *bis) fcc_enet_t *pram_ptr; unsigned long mem_addr; -#if 0 - mii_discover_phy(); -#endif /* 28.9 - (1-2): ioports have been set up already */ diff --git a/cpu/mpc85xx/spd_sdram.c b/cpu/mpc85xx/spd_sdram.c index 6da5367a70..4326bb7576 100644 --- a/cpu/mpc85xx/spd_sdram.c +++ b/cpu/mpc85xx/spd_sdram.c @@ -290,12 +290,6 @@ spd_sdram(void) odt_wr_cfg = 0; /* Never assert ODT */ if (spd.mem_type == SPD_MEMTYPE_DDR2) { odt_wr_cfg = 1; /* Assert ODT on writes to CS0 */ -#if 0 - /* FIXME: How to determine the number of dimm modules? */ - if (n_dimm_modules == 2) { - odt_rd_cfg = 1; /* Assert ODT on reads to CS0 */ - } -#endif } ddr->cs0_config = ( 1 << 31 @@ -483,21 +477,9 @@ spd_sdram(void) | ((taxpd_clk & 0xf) << 8) /* ODT_PD_EXIT */ | ((tmrd_clk & 0xf) << 0) /* MRS_CYC */ ); -#if 0 - ddr->timing_cfg_0 |= 0xaa000000; /* extra cycles */ -#endif debug("DDR: timing_cfg_0 = 0x%08x\n", ddr->timing_cfg_0); } else { -#if 0 - /* - * Force extra cycles with 0xaa bits. - * Incidentally supply the dreamt-up backwards compat value! - */ - ddr->timing_cfg_0 = 0x00110105; /* backwards compat value */ - ddr->timing_cfg_0 |= 0xaa000000; /* extra cycles */ - debug("DDR: HACK timing_cfg_0 = 0x%08x\n", ddr->timing_cfg_0); -#endif } diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S index f96a4c3f8b..e66da9ab99 100644 --- a/cpu/mpc85xx/start.S +++ b/cpu/mpc85xx/start.S @@ -446,10 +446,6 @@ in_flash: .globl _start_of_vectors _start_of_vectors: -#if 0 -/* Critical input. */ - CRIT_EXCEPTION(0x0100, CritcalInput, CritcalInputException) -#endif /* Machine check --FIXME-- Should be MACH_EXCEPTION */ CRIT_EXCEPTION(0x0200, MachineCheck, MachineCheckException) diff --git a/cpu/mpc86xx/start.S b/cpu/mpc86xx/start.S index 7406fe2248..b1d5fd4f48 100644 --- a/cpu/mpc86xx/start.S +++ b/cpu/mpc86xx/start.S @@ -279,7 +279,6 @@ in_flash: stw r4, 0(r3) sync #endif -#if 1 /* make sure timer enabled in guts register too */ lis r3, CFG_CCSRBAR@h oris r3,r3, 0xE @@ -289,7 +288,6 @@ in_flash: ori r5,r5,0x5FFF and r4,r4,r5 stw r4,0(r3) -#endif /* * Cache must be enabled here for stack-in-cache trick. * This means we need to enable the BATS. @@ -306,9 +304,7 @@ in_flash: bl dcache_enable sync -#if 1 bl icache_enable -#endif #ifdef CFG_INIT_RAM_LOCK bl lock_ram_in_cache @@ -1096,7 +1092,6 @@ lock_ram_in_cache: dcbz r0, r3 addi r3, r3, 32 bdnz 1b -#if 1 /* Lock the data cache */ mfspr r0, HID0 ori r0, r0, 0x1000 @@ -1104,20 +1099,6 @@ lock_ram_in_cache: mtspr HID0, r0 sync blr -#endif -#if 0 - /* Lock the first way of the data cache */ - mfspr r0, LDSTCR - ori r0, r0, 0x0080 -#if defined(CONFIG_ALTIVEC) - dssall -#endif - sync - mtspr LDSTCR, r0 - sync - isync - blr -#endif .globl unlock_ram_in_cache unlock_ram_in_cache: @@ -1132,7 +1113,6 @@ unlock_ram_in_cache: bdnz 1b sync /* Wait for all icbi to complete on bus */ isync -#if 1 /* Unlock the data cache and invalidate it */ mfspr r0, HID0 li r3,0x1000 @@ -1144,26 +1124,6 @@ unlock_ram_in_cache: sync blr #endif -#if 0 - /* Unlock the first way of the data cache */ - mfspr r0, LDSTCR - li r3,0x0080 - andc r0,r0,r3 -#ifdef CONFIG_ALTIVEC - dssall -#endif - sync - mtspr LDSTCR, r0 - sync - isync - li r3,0x0400 - or r0,r0,r3 - sync - mtspr HID0, r0 - sync - blr -#endif -#endif /* If this is a multi-cpu system then we need to handle the * 2nd cpu. The assumption is that the 2nd cpu is being diff --git a/cpu/mpc8xx/fec.c b/cpu/mpc8xx/fec.c index 6d2755e830..18464ba80f 100644 --- a/cpu/mpc8xx/fec.c +++ b/cpu/mpc8xx/fec.c @@ -674,13 +674,8 @@ static int fec_init (struct eth_device *dev, bd_t * bd) /* Enable MII mode */ -#if 0 /* Full duplex mode */ - fecp->fec_r_cntrl = FEC_RCNTRL_MII_MODE; - fecp->fec_x_cntrl = FEC_TCNTRL_FDEN; -#else /* Half duplex mode */ fecp->fec_r_cntrl = FEC_RCNTRL_MII_MODE | FEC_RCNTRL_DRT; fecp->fec_x_cntrl = 0; -#endif /* Enable big endian and don't care about SDMA FC. */ @@ -846,10 +841,6 @@ mii_send(uint mii_cmd) } mii_reply = ep->fec_mii_data; /* result from phy */ ep->fec_ievent = FEC_ENET_MII; /* clear MII complete */ -#if 0 - printf("%s[%d] %s: sent=0x%8.8x, reply=0x%8.8x\n", - __FILE__,__LINE__,__FUNCTION__,mii_cmd,mii_reply); -#endif return (mii_reply & 0xffff); /* data read from phy */ } #endif /* CFG_DISCOVER_PHY || (CONFIG_COMMANDS & CFG_CMD_MII) */ diff --git a/cpu/mpc8xx/interrupts.c b/cpu/mpc8xx/interrupts.c index 20e7012c37..6a25425a5e 100644 --- a/cpu/mpc8xx/interrupts.c +++ b/cpu/mpc8xx/interrupts.c @@ -178,10 +178,6 @@ void irq_install_handler (int vec, interrupt_handler_t * handler, cpm_vecs[vec].handler = handler; cpm_vecs[vec].arg = arg; immr->im_cpic.cpic_cimr |= (1 << vec); -#if 0 - printf ("Install CPM interrupt for vector %d ==> %p\n", - vec, handler); -#endif } else { /* SIU interrupt */ if (irq_vecs[vec].handler != NULL) { @@ -193,10 +189,6 @@ void irq_install_handler (int vec, interrupt_handler_t * handler, irq_vecs[vec].handler = handler; irq_vecs[vec].arg = arg; immr->im_siu_conf.sc_simask |= 1 << (31 - vec); -#if 0 - printf ("Install SIU interrupt for vector %d ==> %p\n", - vec, handler); -#endif } } @@ -207,19 +199,11 @@ void irq_free_handler (int vec) if ((vec & CPMVEC_OFFSET) != 0) { /* CPM interrupt */ vec &= 0xffff; -#if 0 - printf ("Free CPM interrupt for vector %d ==> %p\n", - vec, cpm_vecs[vec].handler); -#endif immr->im_cpic.cpic_cimr &= ~(1 << vec); cpm_vecs[vec].handler = NULL; cpm_vecs[vec].arg = NULL; } else { /* SIU interrupt */ -#if 0 - printf ("Free CPM interrupt for vector %d ==> %p\n", - vec, cpm_vecs[vec].handler); -#endif immr->im_siu_conf.sc_simask &= ~(1 << (31 - vec)); irq_vecs[vec].handler = NULL; irq_vecs[vec].arg = NULL; @@ -268,9 +252,6 @@ void timer_interrupt_cpu (struct pt_regs *regs) { volatile immap_t *immr = (immap_t *) CFG_IMMR; -#if 0 - printf ("*** Timer Interrupt *** "); -#endif /* Reset Timer Expired and Timers Interrupt Status */ immr->im_clkrstk.cark_plprcrk = KAPWR_KEY; __asm__ ("nop"); diff --git a/cpu/mpc8xx/lcd.c b/cpu/mpc8xx/lcd.c index 3c64a9ba4e..4d47961305 100644 --- a/cpu/mpc8xx/lcd.c +++ b/cpu/mpc8xx/lcd.c @@ -337,10 +337,6 @@ void lcd_ctrl_init (void *lcdbase) LCDBIT (LCCR_CLOR_BIT, panel_info.vl_clor) | LCDBIT (LCCR_TFT_BIT, panel_info.vl_tft); -#if 0 - lccrtmp |= ((SIU_LEVEL5 / 2) << 12); - lccrtmp |= LCCR_EIEN; -#endif lcdp->lcd_lccr = lccrtmp; lcdp->lcd_lcsr = 0xFF; /* Clear pending interrupts */ diff --git a/cpu/mpc8xx/scc.c b/cpu/mpc8xx/scc.c index 6b9110f130..e1c3525f1c 100644 --- a/cpu/mpc8xx/scc.c +++ b/cpu/mpc8xx/scc.c @@ -93,32 +93,10 @@ int scc_initialize(bd_t *bis) static int scc_send(struct eth_device* dev, volatile void *packet, int length) { int i, j=0; -#if 0 - volatile char *in, *out; -#endif /* section 16.9.23.3 * Wait for ready */ -#if 0 - while (rtx->txbd[txIdx].cbd_sc & BD_ENET_TX_READY); - out = (char *)(rtx->txbd[txIdx].cbd_bufaddr); - in = packet; - for(i = 0; i < length; i++) { - *out++ = *in++; - } - rtx->txbd[txIdx].cbd_datlen = length; - rtx->txbd[txIdx].cbd_sc |= (BD_ENET_TX_READY | BD_ENET_TX_LAST); - while (rtx->txbd[txIdx].cbd_sc & BD_ENET_TX_READY) j++; - -#ifdef ET_DEBUG - printf("cycles: %d status: %x\n", j, rtx->txbd[txIdx].cbd_sc); -#endif - i = (rtx->txbd[txIdx++].cbd_sc & BD_ENET_TX_STATS) /* return only status bits */; - - /* wrap around buffer index when necessary */ - if (txIdx >= TX_BUF_CNT) txIdx = 0; -#endif while ((rtx->txbd[txIdx].cbd_sc & BD_ENET_TX_READY) && (j<TOUT_LOOP)) { udelay (1); /* will also trigger Wd if needed */ @@ -558,13 +536,4 @@ static void scc_halt (struct eth_device *dev) immr->im_ioport.iop_pcso &= ~(PC_ENET_CLSN | PC_ENET_RENA); } -#if 0 -void restart (void) -{ - volatile immap_t *immr = (immap_t *) CFG_IMMR; - - immr->im_cpm.cp_scc[SCC_ENET].scc_gsmrl |= - (SCC_GSMRL_ENR | SCC_GSMRL_ENT); -} -#endif #endif /* CFG_CMD_NET, SCC_ENET */ diff --git a/cpu/mpc8xx/start.S b/cpu/mpc8xx/start.S index 33a3f6c88e..ccd3c01aa6 100644 --- a/cpu/mpc8xx/start.S +++ b/cpu/mpc8xx/start.S @@ -384,20 +384,11 @@ icache_status: .globl dcache_enable dcache_enable: -#if 0 - SYNC -#endif -#if 1 lis r3, 0x0400 /* Set cache mode with MMU off */ mtspr MD_CTR, r3 -#endif lis r3, IDC_INVALL@h mtspr DC_CST, r3 -#if 0 - lis r3, DC_SFWT@h - mtspr DC_CST, r3 -#endif lis r3, IDC_ENABLE@h mtspr DC_CST, r3 blr diff --git a/cpu/mpc8xx/traps.c b/cpu/mpc8xx/traps.c index 67b75cce2f..249e1837bf 100644 --- a/cpu/mpc8xx/traps.c +++ b/cpu/mpc8xx/traps.c @@ -221,24 +221,5 @@ DebugException(struct pt_regs *regs) int addr_probe(uint *addr) { -#if 0 - int retval; - - __asm__ __volatile__( \ - "1: lwz %0,0(%1)\n" \ - " eieio\n" \ - " li %0,0\n" \ - "2:\n" \ - ".section .fixup,\"ax\"\n" \ - "3: li %0,-1\n" \ - " b 2b\n" \ - ".section __ex_table,\"a\"\n" \ - " .align 2\n" \ - " .long 1b,3b\n" \ - ".text" \ - : "=r" (retval) : "r"(addr)); - - return (retval); -#endif return 0; } diff --git a/cpu/mpc8xx/video.c b/cpu/mpc8xx/video.c index 918de67943..bbc2ae767a 100644 --- a/cpu/mpc8xx/video.c +++ b/cpu/mpc8xx/video.c @@ -45,24 +45,14 @@ DECLARE_GLOBAL_DATA_PTR; /* ** DEBUG SETTINGS */ /************************************************************************/ -#if 0 -#define VIDEO_DEBUG_COLORBARS /* Force colorbars output */ -#endif /************************************************************************/ /* ** VIDEO MODE SETTINGS */ /************************************************************************/ -#if 0 -#define VIDEO_MODE_EXTENDED /* Allow screen size bigger than visible area */ -#define VIDEO_MODE_NTSC -#endif #define VIDEO_MODE_PAL -#if 0 -#define VIDEO_BLINK /* This enables cursor blinking (under construction) */ -#endif #define VIDEO_INFO /* Show U-Boot information */ #define VIDEO_INFO_X VIDEO_LOGO_WIDTH+8 diff --git a/cpu/ppc4xx/4xx_enet.c b/cpu/ppc4xx/4xx_enet.c index 427ea94626..5183eeaf5e 100644 --- a/cpu/ppc4xx/4xx_enet.c +++ b/cpu/ppc4xx/4xx_enet.c @@ -776,10 +776,6 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis) if ((NUM_TX_BUFF - 1) == i) hw_p->tx[i].ctrl |= MAL_TX_CTRL_WRAP; hw_p->tx_run[i] = -1; -#if 0 - printf ("TX_BUFF %d @ 0x%08lx\n", i, - (ulong) hw_p->tx[i].data_ptr); -#endif } for (i = 0; i < NUM_RX_BUFF; i++) { @@ -791,9 +787,6 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis) hw_p->rx[i].ctrl |= MAL_RX_CTRL_WRAP; hw_p->rx[i].ctrl |= MAL_RX_CTRL_EMPTY | MAL_RX_CTRL_INTR; hw_p->rx_ready[i] = -1; -#if 0 - printf ("RX_BUFF %d @ 0x%08lx\n", i, (ulong) hw_p->rx[i].data_ptr); -#endif } reg = 0x00000000; diff --git a/cpu/ppc4xx/interrupts.c b/cpu/ppc4xx/interrupts.c index c5a9f02566..d169df2250 100644 --- a/cpu/ppc4xx/interrupts.c +++ b/cpu/ppc4xx/interrupts.c @@ -567,9 +567,6 @@ void irq_install_handler (int vec, interrupt_handler_t * handler, void *arg) else #endif mtdcr (uicer, mfdcr (uicer) | (0x80000000 >> i)); -#if 0 - printf ("Install interrupt for vector %d ==> %p\n", vec, handler); -#endif } void irq_free_handler (int vec) @@ -594,10 +591,6 @@ void irq_free_handler (int vec) } #endif -#if 0 - printf ("Free interrupt for vector %d ==> %p\n", - vec, irq_vecs[vec].handler); -#endif #if defined(CONFIG_440) #if defined(CONFIG_440GX) || defined(CONFIG_440SPE) || \ diff --git a/cpu/ppc4xx/spd_sdram.c b/cpu/ppc4xx/spd_sdram.c index c24456bea8..eac751d184 100644 --- a/cpu/ppc4xx/spd_sdram.c +++ b/cpu/ppc4xx/spd_sdram.c @@ -859,14 +859,8 @@ void get_spd_info(unsigned long* dimm_populated, if ((num_of_bytes != 0) && (total_size != 0)) { dimm_populated[dimm_num] = TRUE; dimm_found = TRUE; -#if 0 - printf("DIMM slot %lu: populated\n", dimm_num); -#endif } else { dimm_populated[dimm_num] = FALSE; -#if 0 - printf("DIMM slot %lu: Not populated\n", dimm_num); -#endif } } @@ -888,9 +882,6 @@ void check_mem_type(unsigned long* dimm_populated, dimm_type = spd_read(iic0_dimm_addr[dimm_num], 2); switch (dimm_type) { case 7: -#if 0 - printf("DIMM slot %lu: DDR SDRAM detected\n", dimm_num); -#endif break; default: printf("ERROR: Unsupported DIMM detected in slot %lu.\n", @@ -920,9 +911,6 @@ void check_volt_type(unsigned long* dimm_populated, dimm_num); hang(); } else { -#if 0 - printf("DIMM %lu voltage level supported.\n", dimm_num); -#endif } break; } @@ -1380,9 +1368,6 @@ void program_tr0 (unsigned long* dimm_populated, break; } -#if 0 - printf("tr0: %x\n", tr0); -#endif mtsdram(mem_tr0, tr0); } @@ -1597,9 +1582,6 @@ void program_tr1 (void) } tr1 |= SDRAM_TR1_RDCT_ENCODE(rdclt_average); -#if 0 - printf("tr1: %x\n", tr1); -#endif /* * program SDRAM Timing Register 1 TR1 */ diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index 8e000d3092..25acd006ca 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -902,11 +902,6 @@ _start: .globl _start_of_vectors _start_of_vectors: -#if 0 -/*TODO Fixup _start above so we can do this*/ -/* Critical input. */ - CRIT_EXCEPTION(0x100, CritcalInput, CritcalInputException) -#endif /* Machine check */ CRIT_EXCEPTION(0x200, MachineCheck, MachineCheckException) @@ -1014,28 +1009,12 @@ transfer_to_handler: SAVE_4GPRS(8, r21) SAVE_8GPRS(12, r21) SAVE_8GPRS(24, r21) -#if 0 - andi. r23,r23,MSR_PR - mfspr r23,SPRG3 /* if from user, fix up tss.regs */ - beq 2f - addi r24,r1,STACK_FRAME_OVERHEAD - stw r24,PT_REGS(r23) -2: addi r2,r23,-TSS /* set r2 to current */ - tovirt(r2,r2,r23) -#endif mflr r23 andi. r24,r23,0x3f00 /* get vector offset */ stw r24,TRAP(r21) li r22,0 stw r22,RESULT(r21) mtspr SPRG2,r22 /* r1 is now kernel sp */ -#if 0 - addi r24,r2,TASK_STRUCT_SIZE /* check for kernel stack overflow */ - cmplw 0,r1,r2 - cmplw 1,r1,r24 - crand 1,1,4 - bgt stack_ovf /* if r2 < r1 < r2+TASK_STRUCT_SIZE */ -#endif lwz r24,0(r23) /* virtual address of handler */ lwz r23,4(r23) /* where to go when done */ mtspr SRR0,r24 diff --git a/cpu/ppc4xx/traps.c b/cpu/ppc4xx/traps.c index 6aecca2db9..c7eaa52ebf 100644 --- a/cpu/ppc4xx/traps.c +++ b/cpu/ppc4xx/traps.c @@ -267,24 +267,5 @@ DebugException(struct pt_regs *regs) int addr_probe(uint *addr) { -#if 0 - int retval; - - __asm__ __volatile__( \ - "1: lwz %0,0(%1)\n" \ - " eieio\n" \ - " li %0,0\n" \ - "2:\n" \ - ".section .fixup,\"ax\"\n" \ - "3: li %0,-1\n" \ - " b 2b\n" \ - ".section __ex_table,\"a\"\n" \ - " .align 2\n" \ - " .long 1b,3b\n" \ - ".text" \ - : "=r" (retval) : "r"(addr)); - - return (retval); -#endif return 0; } diff --git a/cpu/ppc4xx/usb_ohci.c b/cpu/ppc4xx/usb_ohci.c index ab852c525c..80cb8ca861 100644 --- a/cpu/ppc4xx/usb_ohci.c +++ b/cpu/ppc4xx/usb_ohci.c @@ -1289,29 +1289,6 @@ int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer, break; } } -#if 0 - /* we got an Root Hub Status Change interrupt */ - if (got_rhsc) { -#ifdef DEBUG - ohci_dump_roothub (&gohci, 1); -#endif - got_rhsc = 0; - /* abuse timeout */ - timeout = rh_check_port_status(&gohci); - if (timeout >= 0) { -#if 0 /* this does nothing useful, but leave it here in case that changes */ - /* the called routine adds 1 to the passed value */ - usb_hub_port_connect_change(gohci.rh.dev, timeout - 1); -#endif - /* - * XXX - * This is potentially dangerous because it assumes - * that only one device is ever plugged in! - */ - devgone = dev; - } - } -#endif dev->status = stat; dev->act_len = transfer_len; |