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| * | ARM: i.MX8MM: set SION bits for i2c2, i2c3, i2c4 mux optionsBastian Krause2024-03-131-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i2c data lines are bidirectional, so the SION bit should be set. For i2c1, this is already the case. Apply the same to the remaining i2c mux options. Suggested-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Bastian Krause <bst@pengutronix.de> Link: https://lore.barebox.org/20240308142052.2683407-1-bst@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX: ele: remove unnecessary argumentSascha Hauer2024-03-132-20/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | The get_response argument to imx9_s3mua_call() is always set to true by the callers. It must be like that because in the ELE API Reference Guide every call into the ELE has a response. Drop the unnecessary argument. Link: https://lore.barebox.org/20240301111915.2439646-1-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX: sabresd: Add support for i.MX6DL board variantStefano Manni2024-03-136-3/+169
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SabreSD comes with different SoC variants. This patch adds support for the i.MX6DL based board. the DCD data has been taken from U-Boot 2023.04 Signed-off-by: Stefano Manni <stefano.manni@gmail.com> Link: https://lore.barebox.org/4b448318f71f2677bc28c2241c5bf0c081073564.camel@gmail.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | env: export getenv_ullx() helperAhmad Fatoum2024-03-132-2/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | getenv_ull() will parse values according to prefix: - If it starts with 0x, it's hexadecimal - If it's just 0, it's octal - otherwise, it's decimal Some variables like i.MX8M soc0.soc_uid are hexadecimal without leading 0x. Therefore add a getenv_ullx helper, so code that used to do: uid = imx8m_uid(); can be replaced with getenv_ullx("soc0.soc_uid", &uid); Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240228175128.2734265-2-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX8M: drop function prototype for removed imx8m_uidAhmad Fatoum2024-03-131-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i.MX8M UID and some other SoC-related info is now available over soc0.soc_uid and imx8m_uid's function definition was removed. Therefore remove the prototype as well. Fixes: d392a0aea330 ("ARM: i.MX8M: convert the machine init to the soc driver") Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240228175128.2734265-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | arm: mach-imx: tzasc: convert to cpu_is_mx8xyz macrosStefan Kerkmann2024-03-134-31/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of passing in configuration parameters at runtime we can utilize the `cpu_is_mx8xyz` macro family to determine which bits should be set. As the tzasc driver is imx specific, all functions are prefixed with `imx8m_` as well. Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de> Link: https://lore.barebox.org/20240228-v2024-02-0-topic-imx8m-n-p-tzac-v2-3-ee1ae48dc399@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | arm: mach-imx: set cpu type in pblStefan Kerkmann2024-03-133-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to use the `cpu_is_imxxyz` macro family in the pbl, `__imx_cpu_type` has to be defined and initialized. As we don't have access to the devicetree at this point, we resort to manual assignment. Note: It is safe to build the same imx.o object file for both barebox pbl and proper as the `imx_init` function is discarded during linking as the whole `init_call` section is not linked into the final binary. Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de> Link: https://lore.barebox.org/20240228-v2024-02-0-topic-imx8m-n-p-tzac-v2-2-ee1ae48dc399@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | arm: mach-imx: tzasc: lock id_swap_bypass bitStefan Kerkmann2024-03-131-10/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit ports U-Boot commit 1289ff7bd7e4 ("imx8m: lock id_swap_bypass bit in tzc380 enable") to barebox. This is the original commit message: > According to TRM for i.MX8M Nano and Plus, GPR10 register contains lock > bit for TZASC_ID_SWAP_BYPASS bit. This bit is required to be set in > order to avoid AXI bus errors when GPU is enabled on the platform. > TZASC_ID_SWAP_BYPASS bit is alread set for all imx8m applicable > derivatives, but is missing a lock settings to be applied. > > Set the TZASC_ID_SWAP_BYPASS_LOCK bit for those derivatives which have > it implemented. > > Since we're here, provide also names to bits from TRM instead of using > BIT() macro in the code. Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Reviewed-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de> Link: https://lore.barebox.org/20240228-v2024-02-0-topic-imx8m-n-p-tzac-v2-1-ee1ae48dc399@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX93: add bootsource detectionSascha Hauer2024-03-133-0/+69
| | | | | | | | | | | | | | | | | | | | | | | | On i.MX93 the ROM API can be used to detect the bootsource. Implement support for this. Link: https://lore.barebox.org/20240220114508.3685478-1-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX6ul: TQMa6ul: install barebox on eMMC boot partitionsSascha Hauer2024-03-132-6/+1
| | | | | | | | | | | | | | | | | | | | | | | | Install barebox on the eMMC boot partitions which offer enough space for bigger barebox images and which also provides a failsafe update. Link: https://lore.barebox.org/20240226141458.620463-2-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX6ul: TQMa6ul: fix mmc aliasesSascha Hauer2024-03-133-4/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The TQMa6ul upstream device trees contain aliases which swap the order of the mmc nodes, so what used to be mmc0 has now become mmc1 and vice versa. With this mmc0 now is the eMMC and mmc1 is the SD card. Introduce a imx6ul.dtsi which adds barebox,bootsource-mmcx aliases so that bootsource_get_instance() matches our mmc numbering again. Also register the eMMC BBU handler on /dev/mmc0 and the SD BBU handler on /dev/mmc1. Fixes: 5a23f05267 ("ARM: tqma6ul: use upstream device trees") Link: https://lore.barebox.org/20240226141458.620463-1-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX6: TQMa6ulx: add OP-TEE supportSascha Hauer2024-03-136-11/+102
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds OP-TEE support for the TQMa6ulx board. The OP-TEE binary is loaded from PBL. Later on in barebox proper the OP-TEE provided overlay node is applied to the barebox live tree for barebox to probe OP-TEE and also to reserve the memory used by OP-TEE. The overlay is also registered as a fixup to be applied on the Linux device tree. Link: https://lore.barebox.org/20240223125922.2865359-1-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX8MM: innocomm-wb15: switch to upstream DTAhmad Fatoum2024-03-133-629/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The same DTs we have in barebox have made it upstream with very minor differences, so drop the copies inside barebox. No functional change intended. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240220123215.3758465-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX: phytec-som-imx6: use strdup instead of basprintfAhmad Fatoum2024-03-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using basprintf to duplicate a string violates memory safety if default_environment_path were to contain a format specifier. clangd warns about this, so fix this by using strdup instead. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240220122004.3725540-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: tqma6ul: use upstream device treesSascha Hauer2024-03-1313-641/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The tqma6ul has several upstream device trees depending on the exact board type. This removes the downstream device tree in favour for the upstream device trees. The board type can be determined from an EEPROM on the board. This patch also adds support for reading the EEPROM and picking the right device tree for the board found. The EEPROM has the board described as strings. I do not know the correct strings for the boards I don't have, so right now only the device tree for the "TQMa6UL2L-AB.0202" board is picked. A warning is printed when an unknown board type is found, so this can be added as new board type when found. Link: https://lore.barebox.org/20240221150323.2715164-9-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | net: phy: fix miibus parent device of_node not matching phy nodeSascha Hauer2024-03-132-8/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The device node of a miibus parent device usually points to the ethernet device node whereas the parent device node of a phy device usually points to the mdio {} subnode between the ethernet node and the phy node, so both can't match. Ethernet drivers usually provide a pointer to the mdio {} subnode in miibus::dev.of_node, so use that to match against the phy nodes parent. This occured on a TQMa6UL where two FECs are registered, but both phys are connected to the FEC2. Link: https://lore.barebox.org/20240221150323.2715164-8-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: tqma6ul: enable enet_ref_125m clkSascha Hauer2024-03-131-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | The TQMa6ul needs the enet_ref_125m clk as phy clock. This is currently not enabled, so ethernet on fec2 is not working. As there's no good place to enable it currently do this in the board code. Link: https://lore.barebox.org/20240221150323.2715164-7-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: tqma6ul: add pr_fmt stringSascha Hauer2024-03-132-0/+2
| | | | | | | | | | | | | | | Link: https://lore.barebox.org/20240221150323.2715164-6-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX6: add i2c4 base addressSascha Hauer2024-03-131-0/+1
| | | | | | | | | | | | | | | | | | | | | Add a define for the I2C4 base address. Link: https://lore.barebox.org/20240221150323.2715164-5-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | board: tq: add support for 16bit eepromSascha Hauer2024-03-133-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Some I2C EEPROMs must be addressed with two bytes. Add the address argument to pbl_tq_read_eeprom(). The actual EEPROM address will be 0x0 always, but we can use the address to pass I2C_ADDR_16_BIT through it. Link: https://lore.barebox.org/20240221150323.2715164-4-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | board: tq: fix format specifierSascha Hauer2024-03-131-1/+1
| | | | | | | | | | | | | | | | | | | | | The correct format specifier for a size_t type is %zu. Use it. Link: https://lore.barebox.org/20240221150323.2715164-3-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | board: tq: add missing selectSascha Hauer2024-03-131-0/+1
| | | | | | | | | | | | | | | | | | | | | The TQ board code needs CRC_ITU_T. Select it. Link: https://lore.barebox.org/20240221150323.2715164-2-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/hwrng'Sascha Hauer2024-03-1517-21/+1610
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| * | | hw_random: add OMAP RNG driverAhmad Fatoum2024-03-156-0/+484
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To enable proper hardening with stack protector, add support for the OMAP RNG driver. This has been tested on a Beagle Bone Black. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240313105631.686778-13-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | hw_random: add timeriomem_rng driverAhmad Fatoum2024-03-153-0/+153
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To enable proper hardening with stack protector, add support for the RNGs with the interface of a single memory mapped 32-bit register. This can possibly come in handy for the web demo. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240313105631.686778-12-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | hw_random: add Rockchip RNG supportAhmad Fatoum2024-03-154-0/+275
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To enable proper hardening with stack protector, add support for the Rockchip RNG. This has been tested on the RK3568. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240313105631.686778-11-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | hw_random: add IPROC RNG200 driver for BCM2711Ahmad Fatoum2024-03-153-0/+228
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To enable proper hardening with stack protector, add support for the IPROC RNG200. This has been tested on a Raspberry Pi 4. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240313105631.686778-10-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | hw_random: add BCM2835 RNG driverAhmad Fatoum2024-03-154-0/+212
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To enable proper hardening with stack protector, add support for the BCM2835 RNG. This has been tested on a Raspberry Pi 3B. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240313105631.686778-9-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | hw_random: add Atmel RNG driverAhmad Fatoum2024-03-153-0/+173
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To enable proper hardening with stack protector, add support for the Atmel RNG. This has been tested on a SAMA5D2. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240313105631.686778-8-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | hw_random: remove reference to undefined CONFIG_HW_RANDOMAhmad Fatoum2024-03-151-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_HW_RANDOM is called CONFIG_HWRNG in barebox, so remove references to the former. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240313105631.686778-7-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | hw_random: remove confusing left-overs from kernel help textsAhmad Fatoum2024-03-151-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mentioning Linux in the help text for barebox drivers can be confusing as there's indeed barebox drivers that prepare stuff for Linux to use. hw_random drivers don't though and they for use inside barebox, so adjust the help text accordingly. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240313105631.686778-6-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | hw_random: add struct hwrng::priv memberAhmad Fatoum2024-03-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A number of Linux hw_random drivers use container_of to arrive at the driver private data, but some others use the priv member of struct hwrng. A unsigned long worth of extra malloc space doesn't hurt, so add the same member to barebox too. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240313105631.686778-5-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | driver: implement dev_platform_get_and_ioremap_resourceAhmad Fatoum2024-03-152-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To simplify porting of Linux drivers that make use of this function, add an implementation to barebox. This was so far not done, because AT91 has I/O memory regions that conflict with the error pointers. Therefore, we emit a warning if we run into such a conflict. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240313105631.686778-4-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: io: read 32 bits at once for aligned I/O memcpy/memsetAhmad Fatoum2024-03-151-13/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The barebox arm32 implementation for I/O memcpy/memset uses single byte accesses exclusively. This is different from the barebox arm64 implementation, which accesses 64 bits at once if the buffer is aligned and the Linux arm32 implementation, which is the optimized assembly version that doesn't use single byte accesses for aligned buffers either. The current implementation is slower than need be and breaks code ported from Linux. e.g. the OMAP RNG driver uses memcpy_fromio and expects it to perform 32-bit accesses as any smaller access leads to a data abort on the hardware. In Linux this works, but in barebox it crashes. Avoid these issues by using 32-bit accesses if possible. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240313105631.686778-3-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | hw_random: support ctrlc()Ahmad Fatoum2024-03-151-4/+4
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It's valid for HWRNG drivers to return 0 bytes read, thereby instructing the caller to try again. We do that for the cdev_read operation, but in case the driver never returns a non-zero value, barebox will keep waiting indefinitely. Check ctrlc() in that case and return a short read if the user interrupts the operation. We don't need ctrlc() in the general case, as the caller is free to check for ctrlc() between reads to the device. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240313105631.686778-2-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/dts'Sascha Hauer2024-03-1579-203/+127
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| * | | dts: update to v6.8Sascha Hauer2024-03-1313-68/+24
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | dts: update to v6.8-rc6Sascha Hauer2024-02-2866-135/+103
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | Merge branch 'for-next/bus-probe'Sascha Hauer2024-03-158-37/+55
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| * | | | usb: print number of skipped OTG controllers when scanningAhmad Fatoum2024-02-293-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I often get confused by running usb and wondering why devices behind unconfigured OTG controllers are not enumerated. Improve the user experience by printing a message when doing a USB scan while some OTG controllers are not yet configured (i.e. the otg.mode device parameter hasn't been set to "peripheral" or "host"). Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240228160518.1589193-6-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | usb: otg: turn global otg device into device aliasAhmad Fatoum2024-02-291-13/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | barebox supports manual switching of USB OTG ports to either peripheral or host via the otgX.mode={host,peripheral} device parameter. When support for configuring multiple OTG ports was added, the old singleton otg device was kept, as not to break existing scripts. Since then, barebox has gained support for device aliases, which are a light weight mechanism to resolve device names and point at a different device. This is exactly what's required here, so make use of it. Cc: Jules Maselbas <jmaselbas@zdiv.net> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240228160518.1589193-5-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | usb: otg: maintain list of USB OTG controllersAhmad Fatoum2024-02-292-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We register devices for OTG controllers only to associate a .mode device parameter with them. Follow-up commits will need to refer to previously registered OTG controllers, so let's register a bus type for them and use it to maintain a list of controllers. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240228160518.1589193-4-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | treewide: remove bus probe functions that just call driver probeAhmad Fatoum2024-02-294-24/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that the driver core will call the driver probe function if there is no bus probe function, remove all bus probe functions that do what the core can do instead. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240228160518.1589193-3-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | driver: make struct bus_type::probe optionalAhmad Fatoum2024-02-291-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Newly introduce soc_bus_type doesn't define .probe, which would crash once a driver is registered on that bus. Do as Linux does and defer to the driver probe function if there's no bus probe function and treat non-existence of either as a successful probe. This has the added benefit that it will allow us to drop very simple bus probe functions that just call the driver probe and do nothing else. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240228160518.1589193-2-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | driver: make struct bus_type::match optionalAhmad Fatoum2024-02-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Newly introduce soc_bus_type doesn't define .match, which would crash once a driver is registered on that bus. Do as Linux does and treat a non-existent match callback as meaning that all drivers should be matched and that the probe function should indicate via -ENODEV/-ENXIO whether a device is indeed suitable. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240228160518.1589193-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | | Merge branch 'for-next/at91'Sascha Hauer2024-03-1518-174/+220
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| * | | | | ARM: AT91: skov-arm9cpu: support environment on SD-CardAhmad Fatoum2024-02-232-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | barebox is meant to boot from SD-Card on this platform, so support a barebox environment in this case for easier handling. Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240220093100.1539120-15-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | ARM: at91: skov-arm9cpu: configure more appropriate hostnameAhmad Fatoum2024-02-231-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The default logic would set the hostname to arm9-cpu, which isn't very descriptive. Set our own hostname that contains the vendor name. Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240220093100.1539120-14-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | ARM: at91: skov-arm9cpu: configure SMC for NOR flash useAhmad Fatoum2024-02-231-21/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Deployed ARM9CPU's boots from NOR, not NAND. Replace the EBI NAND configuration taken from the EK with one appropriate for the NOR chip we have. As this needs to happen earlier than the cfi-flash driver probe, we also move the board code to coredevice initlevel. Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240220093100.1539120-13-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | ARM: at91: skov-arm9cpu: Add SD-Card xload supportSam Ravnborg2024-02-234-106/+116
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This updates skov-arm9cpu with xload support, and we can now use barebox as a replacement for at91bootstrap Only boot via SD card is supported. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240220093100.1539120-12-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-28 00:34:45 +0000