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* | ARM: mmu: Share code for dma_sync_single_for_cpu()Andrey Smirnov2019-01-213-14/+8
| | | | | | | | | | | | | | | | | | Both ARM and ARM64 have identical code for dma_sync_single_for_cpu(). Move it to mmu-common.c so it can be shared. Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: mmu: Share code for dma_alloc_coherent()Andrey Smirnov2019-01-216-39/+34
| | | | | | | | | | | | | | | | | | | | Both ARM and ARM64 implement almost identical algorithms in dma_alloc_coherent(). Move the code to mmu-common.c, so it can be shared. Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM64: mmu: Invalidate memory before remapping as DMA coherentAndrey Smirnov2019-01-211-0/+10
| | | | | | | | | | | | | | | | | | | | | | Although there are known problems caused by this, it seems prudent to invalidate the region of memory we are about remap as uncached. Additionaliy this matches how dma_alloc_coherent() is implemented on ARM. Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: mmu: Share code for dma_free_coherent()Andrey Smirnov2019-01-213-16/+8
| | | | | | | | | | | | | | | | | | | | Now that AArch64 version is calling arch_remap_range() it is identical to ARM version in mmu.c. Move the definition to mmu-common.c to avoid duplication. Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM64: mmu: Merge create_sections() and map_region() togetherAndrey Smirnov2019-01-211-8/+4
| | | | | | | | | | | | | | | | | | | | Since map_region() is never called without being followed by tlb_invalidate(), merge it with create_sections() to simplify the code. Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM64: mmu: Use arch_remap_range() internallyAndrey Smirnov2019-01-211-4/+2
| | | | | | | | | | | | | | | | | | | | Instead of calling map_region() explicitly, call arch_regmap_range() instead to simplify the code. This also ensures that tlb_invalidate() gets called when dma_free_coherent() is invoked. Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: mmu: Share code for dma_(un)map_single()Andrey Smirnov2019-01-214-33/+26
| | | | | | | | | | | | | | | | | | | | Both ARM and ARM64 define DMA mapping/unmapping functions that are exactly the same. Introduce mmu-common.c and move the code there so it can be shared. Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: mmu: Simplify the use of dma_inv_range()Andrey Smirnov2019-01-211-3/+6
| | | | | | | | | | | | | | | | | | | | | | Simplify the use of dma_inv_range() by changing its signature to accept pointer to start of the data and data size. This change allows us to avoid a whole bunch of repetitive arithmetic currently done by all of the callers. Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: mmu: Drop custom virt_to_phys/phys_to_virtAndrey Smirnov2019-01-212-20/+0
|/ | | | | | | | | | Neither ARM nor ARM64 define any address mapping functions that differ from default provided for no-MMU configuration. Drop all the extra code and just rely on functions provided in asm/io.h Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: Add missing prototypesSascha Hauer2018-12-141-0/+4
| | | | | | | include entry.h to get the prototype for barebox_single_pbl_start. Also add prototype for pbl_start. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: fix setup_c when runtime offset is != 0Sascha Hauer2018-12-141-4/+4
| | | | | | | | | | | | | | | | | The runtime offset has to be added to the memcpy source address and substracted from the return address. This should have been changed in a43e2bbc46 which changed from returning the negative runtime offset into changing the positive runtime offset. Instead a43e2bbc46 only changed a zero substraction ("subs r4, r0, #0") into a zero addition ("adds r4, r0, #0") which was used as a equal to zero test and changed nothing. This part is reverted here. Fixes wrong copy / return locations when setup_c is called with different runtime and link addresses. fixes: a43e2bbc46 ("ARM: return positive offset in get_runtime_offset()") Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/missing-prototypes'Sascha Hauer2018-12-077-1/+35
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| * ARM: interrupts64: add missing prototypesLucas Stach2018-12-031-0/+10
| | | | | | | | | | Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: mmu64: include dma.hLucas Stach2018-12-031-0/+1
| | | | | | | | | | | | | | | | dma.h provides the prototypes for the different dma_alloc_* functions, so we should include it to make sure the prototypes are consistent. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: start: Add missing prototypeSascha Hauer2018-11-191-0/+2
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: start: Add missing prototypeSascha Hauer2018-11-121-0/+2
| | | | | | | | | | | | | | start() has no prototype, add it. Since it is not called from anywhere in the barebox binary just add the prototype to the C file. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: start: Add missing includeSascha Hauer2018-11-122-0/+4
| | | | | | | | | | | | entry.h provides prototypes for some functions, so include it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: sm: Make locally used function staticSascha Hauer2018-11-121-1/+1
| | | | | | | | | | | | To avoid missing prototype warning. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: psci: Avoid missing prototypes warningSascha Hauer2018-11-121-0/+7
| | | | | | | | | | | | | | | | Avoid missing prototypes warning by adding prototypes. Since these functions are called from assembly add the prototypes to the C file directly. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: interrupts: Avoid missing prototypes warningSascha Hauer2018-11-121-0/+8
| | | | | | | | | | | | | | Add prototypes for various functions. Since these are called from assembly add the prototype in the C file itself. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: images: use piggydataSascha Hauer2018-12-032-12/+7
|/ | | | | | | | | | | | | | | | | | | | | | | | | | The way we assemble the multi images on ARM is rather complicated and error prone. We currently cat the compressed barebox image behind the PBL executable and need some magic to obtain the size of the payload and also have to do tricks to reliably get a pointer to the compressed image. This patch switches over to compile the compressed payload into the PBL image itself which has proven to work for the single PBL case and for the ARM Linux Kernel aswell. The goal is to unify the single PBL and the multi PBL cases together in the future to get an easier startup path for ARM. This patch has been tested on the i.MX53 QSB, i.MX53 Vincell, Beaglebone black (both MLO and 2nd stage) and a Phytec phyFLEX i.MX6 board. SoCFPGA Arria10 has also be changed slightly with this patch. We used to generate a single image (barebox-socfpga-achilles.img) which was used as xload image and full image. We now instead generate two images: barebox-socfpga-achilles-xload.img and barebox-socfpga-achilles.img, the former loaded by the ROM and the latter loaded by the xload image. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/rpi3'Sascha Hauer2018-11-098-14/+163
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| * ARM: install HYP vectors at PBL and Barebox entryLucas Stach2018-11-054-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the CPU was already in HYP mode when entering the PBL, install a simple trap handler to allow to get back from SVC to HYP before switching to HYP mode. As the vectors are part of the currently running binary, we need to do the same setup when starting the real Barebox binary, as the PBL setup vectors might get overwritten. To do this we trap into HYP mode just before jumping to Barebox and then re-do the vector setup and SVC switch as the first thing in Barebox proper. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Tested-by: Roland Hieber <r.hieber@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: default to starting kernel in HYP mode when entered in HYPLucas Stach2018-11-051-0/+3
| | | | | | | | | | | | | | | | | | | | When Barebox has been entered in HYP mode, there is a high chance that the kernel is intended to be started in HYP mode also. Get this default into place. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Tested-by: Roland Hieber <r.hieber@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: don't try to install secure monitor when entered in HYP modeLucas Stach2018-11-051-0/+3
| | | | | | | | | | | | | | | | | | | | When Barebox has been entered in HYP mode, the CPU is already switched to the non-secure world and it's not possible for Barebox to install it's own secure monitor. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Tested-by: Roland Hieber <r.hieber@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: add file for HYP mode related setupLucas Stach2018-11-053-11/+119
| | | | | | | | | | | | | | | | | | This adds routines to add hyp mode vectors and switch back to HYP mode from SVC. This is needed in both the PBL and Barebox proper. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Tested-by: Roland Hieber <r.hieber@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: allow secure monitor code to be built without PSCILucas Stach2018-11-021-0/+4
| | | | | | | | | | | | | | | | | | The hyp mode handling added in the secure monitor code is also useful when Barebox doesn't have PSCI control. Allow to build without PSCI. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Tested-by: Roland Hieber <r.hieber@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: safely switch from HYP to SVC mode if requiredLucas Stach2018-11-021-3/+15
| | | | | | | | | | | | | | | | | | This is a port of the Linux safe_svcmode_maskall macro to the Barebox lowlevel init. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Tested-by: Roland Hieber <r.hieber@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: pass architecture flag for SMCC also to PBL compilation unitLucas Stach2018-11-021-0/+1
| | | | | | | | | | Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: cache: include mmu.hSascha Hauer2018-10-231-0/+6
| | | | | | | | | | | | | | mmu.h provides the prototypes for __mmu_cache_* functions, so include it from the file that implements these functions. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: mmu: include dma.hSascha Hauer2018-10-191-0/+1
| | | | | | | | | | | | | | dma.h provides the prototypes for the different dma_alloc_* functions, so we should include it to make sure the prototypes are consistent. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: mmu: rename dma_allocSascha Hauer2018-10-181-3/+3
|/ | | | | | | a function named dma_alloc is already declared in include/dma.h, so when we want to include that file we must rename the function. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: Multi PBL: Fix image calculation for certain toolchainsSascha Hauer2018-09-172-4/+3
| | | | | | | | | | | | | The current way to calculate the compressed image position works with the OSELAS toolchains, but not with the Debian/Ubuntu toolchains. For these toolchains &image_end_marker already returns the correct address, adding global_variable_offset() to it is wrong. The solution seems to be to put the image_end_marker into a different object file so that the compiler cannot play any tricks to resolve the address internally in the object file. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: mmu64: Don't flush freshly invalidated regionAndrey Smirnov2018-08-241-1/+2
| | | | | | | | | | | | | | | | | | | | | | | Current code for dma_sync_single_for_device(), when called with dir set to DMA_FROM_DEVICE, will first invalidate given region of memory as a first step and then clean+invalidate it as a second. While the second step should be harmless it seems to be an unnecessary no-op that could probably be avoided. Analogous code in Linux kernel (4.18) in arch/arm64/mm/cache.S: ENTRY(__dma_map_area) cmp w2, #DMA_FROM_DEVICE b.eq __dma_inv_area b __dma_clean_area ENDPIPROC(__dma_map_area) is written to only perform either invalidate or clean, depending on the direction, so change dma_sync_single_for_device() to behave in the same vein and perfom _either_ invlidate or flush of the given region. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: cache-l2x0: Make use of IS_ALIGNED and ALIGN_DOWNAndrey Smirnov2018-08-221-6/+6
| | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: MMU: fix wrong dma_flush_range in arm_create_pte()Sascha Hauer2018-08-151-1/+1
| | | | | | | | | | | Since 7ba0f2d299 arm_create_pte() flushes the page table entries itself and it's no longer done in arch_remap_range(). Unfortunately it does not flush the modified 1st level page table entry, but instead the base of the page table. Fix it up. Fixes: 7ba0f2d299 ARM: mmu: fix cache flushing when replacing a section with a PTE Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/imx'Sascha Hauer2018-08-132-2/+54
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| * ARM: Add code to support SMCCC on AArch64Andrey Smirnov2018-08-082-2/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Port SMCCC code from Linux kernel. To accomodate that: - Introduce CONFIG_ARM_SMCCC, to allow enabling the code independent of CONFIG_ARM_SECURE_MONITOR - Bring <linux/arm-smccc.h> in - Add necessary constants to arch/arm/asm-offsets.c Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: mmu: fix cache flushing when replacing a section with a PTELucas Stach2018-07-271-45/+32
|/ | | | | | | | | | | | | | When replacing a section with a PTE, we must make sure that the newly initialized PTE entries are flushed from the cache before changing the entry in the TTB. Otherwise a L1 TLB miss causes the hardware pagetable walker to walk into a PTE with undefined content, causing exactly that behaviour. Move all the necessary cache flushing to arm_create_pte(), to avoid any caller getting this wrong in the future. Fixes: e3e54c644180 (ARM: mmu: Implement on-demand PTE allocation) Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
* ARM: MMU: fix arch_remap_range() across section boundariesSascha Hauer2018-07-121-1/+1
| | | | | | | | | | | Fixes: e3e54c6441 ARM: mmu: Implement on-demand PTE allocation PGD_FLAGS_WC_V7 lacks the PMD_TYPE_SECT and PMD_SECT_BUFFERABLE flags. Without them a dma_alloc_writecombine() creates an invalid section when it crosses a section boundary. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
* Merge branch 'for-next/imx8mq'Sascha Hauer2018-07-091-0/+1
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| * ARM: Specify HAVE_PBL_IMAGE for CPU_64Andrey Smirnov2018-06-151-0/+1
| | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: mmu: psci: Make use of get_ttbr()Andrey Smirnov2018-06-183-5/+11
| | | | | | | | | | | | | | | | Introduce a simple inline function to get TTBR and use it in mmu.c and sm.c Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: psci: Make use of set_ttbr() in armv7_secure_monitor_install()Andrey Smirnov2018-06-181-2/+1
| | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: psci: Remove unused code in psci_entry()Andrey Smirnov2018-06-181-6/+0
|/ | | | | | | | Remove what looks like a leftover code that doesn't appear to be referenced anywhere. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/arm-mmu'Sascha Hauer2018-06-116-211/+221
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| * ARM: mmu: Make use of dsb() and isb() helpersAndrey Smirnov2018-06-081-2/+2
| | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: no-mmu: Disable building for ARMv8Andrey Smirnov2018-06-081-1/+1
| | | | | | | | | | | | | | Disable building for ARMv8 since no-mmu.c only supports ARMv7 Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: mmu64: Convert flags in arch_remap_range()Andrey Smirnov2018-06-081-0/+11
| | | | | | | | | | | | | | | | | | Flags passed to arch_remap_range() are architecture independent, so it can't be passed as is to map_region(). Add code to do the proper conversion to avoid subtle bugs that this confusion brings. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: mmu64: Make use of create_table()Andrey Smirnov2018-06-081-4/+1
| | | | | | | | | | | | | | | | Make use of create_table() instead of calling xmemalign() and memset() explicitly. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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