| Commit message (Collapse) | Author | Age | Files | Lines |
|
|
|
|
| |
Link: https://lore.barebox.org/20240104141746.165014-12-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
| |
Link: https://lore.barebox.org/20240104141746.165014-10-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
|
|
|
|
| |
Drop generic erratum_a00i9008_layerscape() and move its implementation
into the SoC specific pendants to make the way free for more SoC
support.
Link: https://lore.barebox.org/20240104141746.165014-9-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
|
|
|
|
|
| |
set_usb_txvreftune() works on the USB Parameter 1 Control Register.
USB Parameter 2 Control Register has a different register layout and
calling set_usb_txvreftune() on it is wrong. Drop the bogus errata
workaround.
Link: https://lore.barebox.org/20240104141746.165014-8-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
|
|
|
|
| |
Drop generic erratum_a009798_layerscape() and move its implementation
into the SoC specific pendants to make the way free for more SoC
support.
Link: https://lore.barebox.org/20240104141746.165014-7-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
|
|
|
|
| |
Drop generic erratum_a008997_layerscape() and move its implementation
into the SoC specific pendants to make the way free for more SoC
support.
Link: https://lore.barebox.org/20240104141746.165014-6-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
|
|
|
|
|
|
|
| |
Drop the generic erratum_a009007_layerscape() function and move the
code into its SoC specific pendants to make the way free for additional
SoCs.
While at it remove the USB_PHY_RX_EQ_VAL_x defines from immap_lsch2.h
to get rid of conflicting defines in that file.
Link: https://lore.barebox.org/20240104141746.165014-5-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
|
|
|
| |
SCFG endianess differs between SoCs. Currently supported SoCs have a big
endian SCFG unit, but upcoming LS1028a support has a little endian SCFG.
Link: https://lore.barebox.org/20240104141746.165014-4-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This updates the Layerscape support in preparation for the
introduction of the LS1021A-IOT:
- Makefile/Kconfig
- LS1021A specific register maps and configurations
- errata workarounds update
Signed-off-by: Renaud Barbier <renaud.barbier@ametek.com>
Link: https://lore.barebox.org/BL0PR07MB56654DCD4F18A3B1A6A2F2E4ECB99@BL0PR07MB5665.namprd07.prod.outlook.com
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
|
|
|
|
|
| |
Currently arch specific headers can be included with
longer possible as there won't be a single mach anymore.
Move all layerscape specific header files to include/mach/layerscape/ to
prepare for multi-arch support.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
This adds basic Layerscape support:
- Makefile/Kconfig
- Register maps
- errata workarounds
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|