summaryrefslogtreecommitdiffstats
path: root/arch
Commit message (Collapse)AuthorAgeFilesLines
* Merge branch 'for-next/misc'Sascha Hauer2013-02-0422-21/+188
|\
| * arm-mmu: switch pte flags vars to lower caseAlexander Aring2013-01-251-14/+15
| | | | | | | | | | | | | | | | | | | | | | | | Old cache/uncache pte flags were declared as defines. Since these flags are determine at runtime they are static variables. This patch switch the naming style of these variables to lower case which is typically used for variables. Signed-off-by: Alexander Aring <alex.aring@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * console: switch select to choiceJean-Christophe PLAGNIOL-VILLARD2013-01-236-6/+6
| | | | | | | | | | | | | | so we can add easly the console_none support Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * barebox-data: add barebox-data sectionsAlexander Aring2013-01-187-0/+11
| | | | | | | | | | | | | | | | Add barebox-data section in arm branch to get complete barebox regions in sdram regions tree. Signed-off-by: Alexander Aring <alex.aring@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * arm-mmu: move PAGE_ALIGN macro to common.hAlexander Aring2013-01-181-2/+0
| | | | | | | | | | | | | | | | | | | | PAGE_ALIGN macro is needed to align addresses to page boundaries. Move this macro to another PAGE_* defines. Commands which uses remap_range function needs this macro. Signed-off-by: Alexander Aring <alex.aring@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * remap_range: make function 'remap_range' globalAlexander Aring2013-01-189-1/+158
| | | | | | | | | | | | | | | | | | | | | | | | Change function remap_range in arm architecture to make it global accessable. For example command 'memtest' can change pte flags to enable or disable cache. Add dummy function for others architectures that doesn't have mmu or pte support. Signed-off-by: Alexander Aring <alex.aring@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/mips'Sascha Hauer2013-02-046-2/+40
|\ \
| * | MIPS: dlink-dir-320: use mips_add_ram0()Antony Pavlov2013-01-272-0/+13
| | | | | | | | | | | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | MIPS: rzx50: use mips_add_ram0()Antony Pavlov2013-01-272-0/+13
| | | | | | | | | | | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | MIPS: qemu-malta: use mips_add_ram0()Antony Pavlov2013-01-271-2/+2
| | | | | | | | | | | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | MIPS: introduce ram0 regions register functionAntony Pavlov2013-01-271-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On MIPS there are two segments in CPU address space that can be used for untranslated memory access: KSEG0 and KSEG1. KSEG0 is used for cached access and KSEG1 is used for uncached one. The instroduced mips_add_ram0() function registers two address regions for memory access: one in KSEG0 and the other one in KSEG1. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/imx-usb-chipidea'Sascha Hauer2013-02-047-12/+45
|\ \ \
| * | | ARM i.MX6: Add Chipidea supportSascha Hauer2013-01-202-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows to register the USB ports for the chipidea driver. For now the otg/h1 register functions also register the corresponding USB phys. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM i.MX6: Add usbphy clocksSascha Hauer2013-01-201-0/+5
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM i.MX6: Fix usb phy base addressesSascha Hauer2013-01-202-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | What we had as usb phy1 base address is really usb phy2. Fix the names and add the missing base address definition for usb phy1. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM i.MX6 USB phy: Fix phy function namesSascha Hauer2013-01-203-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The imx6_usb_phy1* functions are misnamed. It's usb phy2 that is configured here, so rename the functions accordingly. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | Merge branch 'for-next/imx'Sascha Hauer2013-02-0441-585/+319
|\ \ \ \
| * | | | defenv-2: migrate guf-vincell to config-boardMichael Olbrich2013-01-313-16/+7
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: efika-mx-smartbook: clean up whitespacesAntony Pavlov2013-01-291-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: ccmx51: Update defconfigAlexander Shiyan2013-01-251-9/+15
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: ccmx51js: Define reset pin for USB Host1Alexander Shiyan2013-01-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: ccmx51: Set MAC address before FEC device registrationAlexander Shiyan2013-01-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: ccmx51: Fix ethernet devices control by MC13892 GPOsAlexander Shiyan2013-01-231-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LAN9221 is eth1, FEC is eth0, so fix power/reset control by MC13892 GPOs. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: ccmx51: Remove SDRAM size settingsAlexander Shiyan2013-01-232-23/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes SDRAM memory size setting from board due to auto detect last one by ESDCTL. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | Merge branch 'pu/imx-external-nand-boot' into for-next/imxSascha Hauer2013-01-2122-439/+127
| |\ \ \ \
| | * | | | ARM i.MX boards: use helper function for external NAND bootSascha Hauer2013-01-2020-439/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use helper function for external NAND boot to get some positive diffstat. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | | | ARM i.MX: Add a common NAND entry for external boot modeSascha Hauer2013-01-202-0/+80
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pattern for i.MX boards starting in external NAND boot mode is always the same: - Check if we are running in NFC address space, if not call board_init_lowlevel_return() - copy binary to link address - execute relocated binary - call imx_nand_load_image() Add a common function for this to make the board code easier. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | Merge branch 'pu/tx25' into for-next/imxSascha Hauer2013-01-1810-69/+67
| |\ \ \ \
| | * | | | ARM Ka-Ro Tx25: Switch to new environmentSascha Hauer2013-01-187-64/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also update config for supporting external NAND boot. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | | | ARM Ka-Ro TX25: Increase NAND partitionsSascha Hauer2013-01-182-3/+4
| | |/ / / | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | i.MX27: fix shift amount for PCCR1_PERCLK3_ENDaniel Mierswa2013-01-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Daniel Mierswa <d.mierswa@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | i.MX21/27: don't enable lcd bus clocks too earlyDaniel Mierswa2013-01-173-7/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the MX27 based board phycard-i.MX27 the display won't properly come up. Before removing imx-regs.h and the code that sets the register in the i.MX video driver, the PCCR registers were set _after_ the screen start (LSSAR) was set. This restores that old behaviour and makes the display come up properly again. I did not have a chance to test this on any other i.MX27 or i.MX21 hardware though I assume that the "old" order is required there too. Signed-off-by: Daniel Mierswa <d.mierswa@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | i.MX21: Add periph. clock register name macrosDaniel Mierswa2013-01-172-12/+50
| | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | Also put those names solely in the .c file as it's done with the i.MX27 code. Signed-off-by: Daniel Mierswa <d.mierswa@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | Merge branch 'for-next/compile-log-level'Sascha Hauer2013-02-048-15/+37
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | Conflicts: drivers/usb/host/ehci-hcd.c
| * | | | ARM pcm038: Specify pr_fmt and change messages to pr_*Sascha Hauer2013-01-271-2/+3
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM mmu: Use pr_debugSascha Hauer2013-01-271-3/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also, specify a pr_fmt and add missing GPL header. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | blackfin: Use unsigned long for __kernel_size_tSascha Hauer2013-01-271-1/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | nios2: Use unsigned long for __kernel_size_tSascha Hauer2013-01-271-1/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | nios2: Let readl return an unsigned intSascha Hauer2013-01-271-1/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | treewide: fix format specifiersSascha Hauer2013-01-273-7/+7
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | | Merge branch 'for-next/at91'Sascha Hauer2013-02-04130-518/+7215
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/boards/at91rm9200ek/init.c arch/arm/boards/pm9263/init.c arch/arm/configs/at91sam9n12ek_defconfig arch/arm/mach-at91/Kconfig
| * | | | | sama5d3k: the nand flash is 4 bit ecc capable so use itJean-Christophe PLAGNIOL-VILLARD2013-02-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | this will require to update the bootstrap Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | usb-a926x: only provide the resource if the driver is enableJean-Christophe PLAGNIOL-VILLARD2013-02-041-3/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | usefull for bootstrap Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | at91sam9_ddrsdr: fix register on mdr read and sdram detection for ddr sizeJean-Christophe PLAGNIOL-VILLARD2013-02-041-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | it's currently working by luck Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | at91: bootstrap: add menu supportJean-Christophe PLAGNIOL-VILLARD2013-01-311-25/+190
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This will allow to change the boot mode Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | at91sam9261ek: add first stage supportJean-Christophe PLAGNIOL-VILLARD2013-01-313-4/+92
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | | | | at91sam9261ek: add boostrap supportJean-Christophe PLAGNIOL-VILLARD2013-01-314-0/+138
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | | | | at91sam9261ek: add spi supportJean-Christophe PLAGNIOL-VILLARD2013-01-313-1/+45
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | | | | at91: introduce AT91_LOAD_BAREBOX_SRAM to specifcy which size load for ↵Jean-Christophe PLAGNIOL-VILLARD2013-01-312-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | external boot Some SoC as sam9261 or sam9263 have enough sram to directly load a barebox from external boot. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | | | | sama5d3xek: add lcd supportJean-Christophe PLAGNIOL-VILLARD2013-01-313-0/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-28 10:46:28 +0000