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* arm: bootm: don't fall over if image is padded with less than 40 bytesLucas Stach2017-10-231-1/+3
| | | | | | | | | | | If the zImage has a padding, which is less than 40 bytes (sizeof struct fdt_header) the amount of read bytes would be propagated as an error code. Fix this by only propagating real errors and treating failure to read less than the expected amount as no concatenated DT being present. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/mips'Sascha Hauer2017-10-196-20/+86
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| * MIPS: dts: ar9344: add pll nodeOleksij Rempel2017-10-061-0/+11
| | | | | | | | | | Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * MIPS: dts: ar9344: add APB busOleksij Rempel2017-09-201-17/+25
| | | | | | | | | | | | | | and move nodes which belong to APB. Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * MIPS: tplink-wdr4300_defconfig: add network supportOleksij Rempel2017-09-201-3/+7
| | | | | | | | | | Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * MIPS: dts: tl_wdr4300: rename it to tl_wdr4300 v1.7Oleksij Rempel2017-09-202-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | The minor version of TP-Link are usually big enough that it need extra vendor partition on the flash with additional configurations like PLL, CPU and RAM freqs. Visually I was able to confirm at least different SPI Flash and RAM chips. Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * MIPS: dts: tl_wdr4300: remove RO flag from barebox partitionOleksij Rempel2017-09-181-1/+0
| | | | | | | | | | | | | | we need it RW for barebox updates. Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * MIPS: dts: tl_wdr4300: add alias for spiflashOleksij Rempel2017-09-181-0/+1
| | | | | | | | | | | | | | to unify the naming with TP-Link TL-MR3020. Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * MIPS: dts: tl_wdr4300: enable mac0Oleksij Rempel2017-09-181-0/+4
| | | | | | | | | | Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * MIPS: dts: ar9344: add mac0 nodeOleksij Rempel2017-09-181-0/+10
| | | | | | | | | | | | | | this node is supported by ag71xx driver Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * add ar9331.dtsi and enable mac0Oleksij Rempel2017-09-182-0/+17
| | | | | | | | | | Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * net: ath79: add ag71xx Ethernet driverYegor Yefremov2017-09-181-0/+12
| | | | | | | | | | | | | | Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/imx'Sascha Hauer2017-10-1922-29/+271
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| * | ARM: Add i.MX6ull evk supportSascha Hauer2017-10-179-0/+237
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i.MX6ull-EVK is a evaluation board for the i.MX6ull from NXP. The upstream DTS is used, support should be fairly complete: - 2x fec ethernet - 1x USB Host - 1x USB OTG - 2x SD Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX6ul: Add SoC specific lowlevel_init functionSascha Hauer2017-10-176-2/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On i.MX6ul(l) (Cortex A7) We have to set the SMP bit before enabling the caches, otherwise they won't work. Add a SoC specific lowlevel_init function to be called by the i.MX6ul(l) boards. Since this is a quirk of the Cortex A7 core we put the functionality into a separate function to be reused by other Cortex A7 cores. Change existing i.MX6ul(l) boards to use the new initialisation function. It seems this is only needed when booting from USB, in other boot modes the ROM will already have done the initialisation. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: rename flush_icache to icache_invalidateSascha Hauer2017-09-275-5/+5
| | | | | | | | | | | | | | | | | | | | | flush_icache is a misnomer since the icache is invalidated, not flushed. Rename the function accordingly. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: cache-armv7: Use designated instructions for isb/dsb/dmbSascha Hauer2017-09-271-11/+11
| | | | | | | | | | | | | | | | | | | | | armv7 has designated instructions for the barrier operations, so use these rather than cp15 operations. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX53 QSB: drop phy reset handling in board fileUwe Kleine-König2017-09-261-11/+0
| |/ | | | | | | | | | | | | | | | | | | | | | | Since commit 5c1846b62524 ("ARM: i.mx53: Parse Reset GPIO pin in FEC driver from Devicetree") the fec driver ensures a phy reset. As there is little use in resetting twice, drop the reset from the board file. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: socfpga: dts: sockit: remove upstreamed nodesSteffen Trumtrar2017-10-171-108/+0
| | | | | | | | | | | | | | Remove devicetree entries that are already in the upstream devicetree. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: vexpress: add fixup handler for 'virtio, mmio' devicesMichael Olbrich2017-10-171-0/+29
| | | | | | | | | | | | | | | | | | | | | | Qemu adds 'virtio,mmio' nodes to the device tree. Before passing it to the bootloader or the Linux kernel. This fixup handler copies these nodes to the new device tree. Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de> Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | vexpress: add bootstate node to the device treeMichael Olbrich2017-10-171-0/+63
| | | | | | | | | | | | Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | vexpress: use device tree provided by QEMU if availableMichael Olbrich2017-10-171-2/+18
| | | | | | | | | | | | Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: vexpress: regenerate configLucas Stach2017-10-171-3/+13
| | | | | | | | | | | | | | | | Enable some more features, so the default configuration gets more in line with other platforms. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: vexpress: switch to DT probe and multi-image buildLucas Stach2017-10-1712-285/+80
| | | | | | | | | | | | | | | | | | | | This switches the VExpress support to use an internal DT, instead of probing the peripherals from a board file. It also switches to a multi-iamge build with both CA9 and CA15 variants of the VExpress board being supported. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | clk: versatile: add basic clocksLucas Stach2017-10-171-0/+1
| | | | | | | | | | | | | | | | This adds the necessary basic clocks used on the ARM versatile platforms. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: vexpress: always build relocatable imageLucas Stach2017-10-163-53/+3
|/ | | | | | | | | This allows to make more space available for the malloc area and allows us to drop the special CA9 defconfig, which had a different text base. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/omap'Sascha Hauer2017-09-089-8/+87
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| * arm: configs: AM335x: Enable mmc-extcsd commandDaniel Schultz2017-09-061-0/+1
| | | | | | | | | | | | | | This tool is for setting up eMMC devices. Signed-off-by: Daniel Schultz <d.schultz@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * arm: dts: am335x: Add phycore emmc device treeDaniel Schultz2017-09-063-0/+37
| | | | | | | | | | | | | | | | Add a new device tree for phyCORE SOMs with EMMC enabled and NAND disabled. Signed-off-by: Daniel Schultz <d.schultz@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * arm: dts: Enable NAND in DTS instead of DTSIDaniel Schultz2017-09-067-8/+25
| | | | | | | | | | | | | | | | | | Starting with PCM-062, NAND isn't the main non-volatile memory for the AM335x. Because that, NAND has be disabled in the SOM dtsi file and will be enabled in a specific NAND SOM file. Signed-off-by: Daniel Schultz <d.schultz@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * arm: dts: am335x: Add emmc node to phycore-somDaniel Schultz2017-09-061-0/+24
| | | | | | | | | | | | | | | | Add the EMMC node to the phycore-som device tree. It's by default disabled, because NAND is the primary boot device. Signed-off-by: Daniel Schultz <d.schultz@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/mvebu'Sascha Hauer2017-09-082-0/+47
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| * | ARM: mvebu: armada-xp: configure PLL and PHY registerJan Luebbe2017-08-152-0/+47
| |/ | | | | | | | | | | | | | | | | The PLL setup is needed to use the USB ports in Linux. This code is ported from mainline U-Boot arch/arm/mach-mvebu/cpu.c. Signed-off-by: Jan Luebbe <jlu@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
* | Merge branch 'for-next/misc'Sascha Hauer2017-09-084-3/+21
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| * | x86: asm: include asm-generic.hOleksij Rempel2017-09-081-0/+15
| | | | | | | | | | | | | | | | | | | | | make io[read,write]* defines available on x86 platform Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | asm-generic: partially sync io.h with linux kernelOleksij Rempel2017-09-083-3/+6
| | | | | | | | | | | | | | | Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | Merge branch 'for-next/mips'Lucas Stach2017-08-1619-162/+1339
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* | \ \ Merge branch 'for-next/mips'Sascha Hauer2017-09-0819-162/+1339
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| * | | MIPS: tplink-mr3020.dts: add partition tableOleksij Rempel2017-08-151-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need partition table for barebox update handler and for barebox environment Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
| * | | MIPS: tplink-mr3020_defconfig: enable more optionsOleksij Rempel2017-08-151-2/+38
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
| * | | MIPS: tplink-mr3020: pbl: move hornet_mips24k_cp0_setup after flash addr testOleksij Rempel2017-08-151-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | this is needed to start zbarebox.bin from running barebox. Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
| * | | MIPS: tplink-mr3020: pbl: move WMAC init after flash addr testOleksij Rempel2017-08-151-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | if this function is called in the RAM, we won't be able to continue start sequence. It brakes boot over JTAG use case. Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Cc: Yegor Yefremov <yegorslists@googlemail.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
| * | | MIPS: ath79: add TP-Link WDR4300 board supportOleksij Rempel2017-08-157-0/+243
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This provides low level initialization of pll and ddr2. Resulting binary should work from SRAM, DDR2 and SPI flash. If started from DDR2 RAM level initialization will skipped. Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
| * | | MIPS: ath79: add initial QCA AR9344 SoC supportOleksij Rempel2017-08-156-158/+978
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the documentation: "The AR9344 is a highly integrated and feature-rich IEEE 802.11n 2x2 2.4/5 GHz System-on-a-Chip (SoC) for advanced WLAN platforms. It includes a MIPS 74Kc processor, PCI Express 1.1 Root Complex and Endpoint interfaces, five port IEEE 802.3 Fast Ethernet Switch with MAC/PHY, one MII/RMII/RGMII interface, one USB 2.0 MAC/PHY, and external memory interface for serial Flash, SDRAM, DDR1 or DDR2, I2S/SPDIF-Out audio interface, SLIC VOIP/PCM interface, two UARTs, and GPIOs that can be used for LED controls or other general purpose interface configurations. The AR9344 supports 802.11n operations up to 144 Mbps for 20 MHz and 300 Mbps for 40 MHz respectively, and 802.11a/b/g data rates. Additional features include Maximal Likelihood (ML) decoding, Low-Density Parity Check (LDPC), Maximal Ratio Combining (MRC), Tx Beamforming (TxBF), and On-Chip One-Time Programmable (OTP) memory." Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
| * | | MIPS: ath79: provide CONFIG_SOC_QCA_AR9331 optionOleksij Rempel2017-08-151-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | QCA AR9331 and QCA AR9344 have some similar part but different uart engines. We need this flag to provide common debug_ll support. Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
| * | | MIPS: add virt_to_phys() and phys_to_virt()Antony Pavlov2017-08-151-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Peter Mamonov <pmamonov@gmail.com> Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
| * | | MIPS: ath79: add barebox update handlerOleksij Rempel2017-08-152-0/+29
| | |/ | |/| | | | | | | | | | | | | | | | | | | Most of ar93xx SoCs seem to work only with spi. spifash handler should be enough for now. Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
* | | Merge branch 'for-next/imx'Sascha Hauer2017-09-082-46/+52
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| * | | ARM: phycore-imx6ul: use MAC address from OCOTPLucas Stach2017-09-061-0/+4
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | The Phycore MX6UL modules are correctly fused with a MAC address. Use this for the Barebox network connection and fixing up the kernel DT. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: imx: phyCORE i.MX7: use register defines in dcd tableUwe Kleine-König2017-08-151-46/+48
| |/ | | | | | | | | | | | | This was done using scripts/regsubst.pl. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
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