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* bmp: rename it to splashJean-Christophe PLAGNIOL-VILLARD2012-09-1219-23/+23
| | | | | | | so be can add more format support Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* fsl TSEC: register map boundaryRenaud Barbier2012-09-111-3/+3
| | | | | | | | The end boundary of each registers set may overlap with the start of the next register set. Subtract 1 to the end boundary. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* arm: mxs: add proper resource lengthWolfram Sang2012-09-112-11/+11
| | | | | | | | | | | For some reason, the mxs-boards missed some length parameters when adding devices. This made reading from ocotp crash in the current version. Provide missing lengths, use a consistent format and fix the length for the LCDIF. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* i.MX51: unbreak FEC iomuxEric Bénard2012-09-071-7/+7
| | | | | | | | | | | | in commit 2bdc9f57a86dff41cfc1f87b644a2e53fdcce2b6 the iomux was synced with the kernel but this leads to some changes in the PAD_CTRL of some FEC pins leading to a non working FEC on our cpuimx51 board. This patch set back the PAD_CTRL of the missing pins to the initial value. Signed-off-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCM049: nand_bootstrap add shebangJan Weitzel2012-09-061-1/+1
| | | | | Signed-off-by: Jan Weitzel <j.weitzel@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Atmel sam9x boards: enable the pblJean-Christophe PLAGNIOL-VILLARD2012-09-067-0/+7
| | | | | | | so we are smaller than the 256KiB reserved for barebox Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Calao boards: enable the pblJean-Christophe PLAGNIOL-VILLARD2012-09-0610-0/+10
| | | | | | | so we are smaller than the 256KiB reserved for barebox Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/smc911x'Sascha Hauer2012-09-051-1/+6
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| * smc911x: add support to pass the shift via platform dataJean-Christophe PLAGNIOL-VILLARD2012-09-031-1/+6
| | | | | | | | | | | | | | switch ipe337: to it at the same time to do not brake it Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/sandbox'Sascha Hauer2012-09-053-32/+64
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| * | sandbox: fix malloc argumentAlexander Aring2012-09-031-30/+57
| | | | | | | | | | | | | | | | | | | | | Fix malloc argument for sandbox system. Signed-off-by: Alexander Aring <alex.aring@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | sandbox: fix whitespaces in board fileAlexander Aring2012-09-031-1/+1
| | | | | | | | | | | | | | | | | | | | | Fix whitespaces in board file. Signed-off-by: Alexander Aring <alex.aring@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | sandbox: add asm-generic/io.hAlexander Aring2012-09-031-1/+6
| |/ | | | | | | | | | | | | | | Add in sandbox asm/io.h the asm-generic/io.h header file. Needed by NAND support. Signed-off-by: Alexander Aring <alex.aring@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/ppc'Sascha Hauer2012-09-056-0/+108
|\ \ | | | | | | | | | | | | | | | | | | Conflicts: arch/ppc/boards/freescale-p2020rdb/p2020rdb.c arch/ppc/configs/p2020rdb_defconfig arch/ppc/mach-mpc85xx/include/mach/immap_85xx.h
| * | ppc: P2020RDB Ethernet configurationRenaud Barbier2012-08-102-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | Minimal support of the Ethernet interface on the P2020RDB board. Only the eTSEC3 interface is supported. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | fsl: Freescale TSEC specific initialization.Renaud Barbier2012-08-102-0/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | The fsl_eth_init function maps the TSEC registers (MAC, TBI and external PHY access registers). It also passes the PHY address and TBI registers initialization values. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | net: GIANFAR driverRenaud Barbier2012-08-101-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | This update adds the GIANFAR driver along with the configuration and build files. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ppc: GIANFAR base address definitionRenaud Barbier2012-08-101-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | In view of the introduction of the GIANFAR Ethernet driver, the mdio and gianfar base address are defined. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/pbl'Sascha Hauer2012-09-0564-149/+626
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| * | | create a common ARM flush_icache functionSascha Hauer2012-08-133-6/+14
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM pbl: enable MMU during decompressionSascha Hauer2012-08-132-0/+75
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM MMU: call __mmu_cache_* as regular C functionsSascha Hauer2012-08-132-19/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that __mmu_cache_* restore the registers they can be called as regular C functions. Create a header file for them and use C functions rather than inline assembly. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM __mmu_cache_*: Do not clobber registersSascha Hauer2012-08-132-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Save/restore the registers used in __mmu_cache_* so that they can be called as regular C functions. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM pbl: generate zbarebox.map in $(obj)Sascha Hauer2012-08-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All other linker generated files are there, too, so it seems logical to put the map file there aswell. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | | ARM: fix netx/MLO/s5p image build for pblSascha Hauer2012-08-121-16/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If pbl support is enabled only zbarebox.bin was built, but not the SoC specific images. Fix this. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | | ARM Makefile: Do not hardcode targets in MLO/netx/davinci/s5pSascha Hauer2012-08-121-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | use $< rather than barebox.bin directly Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | | ARM boards: Make boards pbl safeSascha Hauer2012-08-1237-5/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With pbl support enabled most boards need a pbl-y for their lowlevel stuff. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | | ARM s3c boards: Do not hardcode image sizesSascha Hauer2012-08-123-21/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The existing nand_boot functions all do the same, so move it to a common place. To be flexible enough for future boards the real image size is used instead of hardcoded 256k. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Juergen Beisert <jbe@pengutronix.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | | ARM eukrea cpuimx25: Move flash_header to seperate fileSascha Hauer2012-08-123-34/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The flash header is needed for pbl support, so move it to separate file to be able to add it to pbl-y Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | | Makefile: generate a barebox-flash-image linkSascha Hauer2012-08-124-10/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Depending on the SoC a barebox.bin, barebox.netx, barebox.s5p, MLO image is generated. With pbl support there now is an additional arch/arm/pbl/zbarebox.bin image. To help the user to determine which image should be flashed to his device, generate a barebox-flash-image link. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | | arm: always enable the garbage collector for pblJean-Christophe PLAGNIOL-VILLARD2012-08-031-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | This allow to save arround 1KiB on at91 Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | | at91: add lowlevel init to the pblJean-Christophe PLAGNIOL-VILLARD2012-08-031-0/+2
| | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | | ARM pbl: Add .gitignore for generated filesSascha Hauer2012-08-031-0/+5
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | | compressed image: add gzip supportJean-Christophe PLAGNIOL-VILLARD2012-08-033-0/+11
| | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | | ARM: add early malloc support needed by the decompressorJean-Christophe PLAGNIOL-VILLARD2012-08-031-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | This is not needed by lzo but by gunzip, xz and others. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | | Add compressed image supportJean-Christophe PLAGNIOL-VILLARD2012-08-032-4/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows for creating a lzo compressed binary unsing the pbl. Only copy the piggydata if needed. Add CONFIG_PBL_FORCE_PIGGYDATA_COPY option In some case we need to copy the PIGGYDATA as the link address as example we run from SRAM and shutdown the SDRAM/DDR for reconfiguration but most of the time we just need to copy the executable code. based on Sascha Hauer Add compressed image support Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | | pbl: discard unwind symbol if enable in bareboxJean-Christophe PLAGNIOL-VILLARD2012-08-035-2/+29
| | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | | Add pre-bootloader (pbl) image supportJean-Christophe PLAGNIOL-VILLARD2012-08-0310-40/+277
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows for creating a pre-bootloader binary for - nand boot - mmc boot - compressed image The pbl will be incharge of the lowlevel init if needed. The barebox will skip it. Import string functions from linux 3.4 (arch/arm/boot/compressed/string.c) and implement a dummy panic. For now on introduce dummy zbarebox* targets and c code that will contain later the decompressor. This only implemeted on ARM. This patch is based on Sascha Hauer <s.hauer@pengutronix.de> Add compressed image support patch Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | | Merge branch 'for-next/omap'Sascha Hauer2012-09-0518-86/+309
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| * | | pcm049: use NAND_BUSWIDTH_AUTOJan Weitzel2012-08-281-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | autodetect bus width Signed-off-by: Jan Weitzel <j.weitzel@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | OMAP4460: clock initJan Weitzel2012-08-147-17/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Change clock init to allow early gpio access. Add support for 4460 clocks. Signed-off-by: Jan Weitzel <j.weitzel@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | OMAP4460: ram init changesJan Weitzel2012-08-142-2/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | configure Memory Adapter for 4460 Signed-off-by: Jan Weitzel <j.weitzel@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | Add support for OMAP4460 TPS62361Jan Weitzel2012-08-147-6/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | based on: [U-Boot] [PATCH v 4/5] omap4: support TPS programming TPS62361 is the new power supply used in OMAP4460 that supplies vdd_mpu. VCORE1 from Phoenix supplies vdd_core and VCORE2 supplies vdd_iva. VCORE3 is not used in OMAP4460. Signed-off-by: F. Gasnier fabrice.gasnier@cenosys.com Signed-off-by: Jan Weitzel <j.weitzel@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM OMAP4: use writel and readlJan Weitzel2012-08-131-14/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | replace *(volatile int*) by writel and readl Signed-off-by: Jan Weitzel <j.weitzel@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | mtd OMAP NAND: Use prefetch engineSascha Hauer2012-08-032-3/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the prefetch engine to improve NAND performance. The howto is derived from the Kernel. Unlike the kernel we do not make the access mode configurable. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM OMAP gpmc nand: specify platform data in boardsSascha Hauer2012-08-036-29/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of passing several options into the nand register function it is much more straight forward to just pass the platformdata. While at it, rename the function to omap_add_gpmc_nand_device to better describe what it does. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | mtd OMAP NAND: Fix dev_ready handlingSascha Hauer2012-08-022-15/+0
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - dev_ready is supposed to return whether the device is ready or not, not to poll until the device is ready. - dev_ready should return true for ready and false for not ready - waitpin polarity is not needed (at least the kernel does not have it) - wait_mon_mask must be 32bit. The code was unused since no board specified a wait pin, so no breakage included. This also removes the now unused timeout variable from platformdata. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/misc'Sascha Hauer2012-09-055-0/+155
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| * | | Add documentation for the calao boardsgregory hermant2012-08-295-0/+155
| | |/ | |/| | | | | | | | | | Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/mc13xxx'Sascha Hauer2012-09-053-5/+3
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